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1. A four-processor building block for SIMD processor arrays.

Author

Fisher, A.L., Highnam, P.T., and Rockoff, T.E.

Abstract

A four-processor chip, for use in processor arrays for image computations, is described. The full-custom 2-μm CMOS chip contains 56669 transistors and runs instructions at 10 MHz. 512 16-bit processors and external memory fit on two industry standard cards to yield 5-GIPS (billions of instructions/s) peak throughput [ABSTRACT FROM PUBLISHER]

Published
1989
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