Search

Wideband receiver (RX) and transmitter (TX) RF front-ends for wireless universal radio applications are presented. The RX is comprised of a two-stage low-noise amplifier (LNA) applying feedback and shunt peaking, a combiner buffer for performance boosting, and an inverter-based in-phase/quadrature (IQ) down-conversion mixer. The wideband LNA provides input matching of better than -\ 10 dB from dc to beyond 10 GHz. The conversion gain (CG) of the RX front-end has a peak value of 31 dB with a 3-dB bandwidth up to 9 GHz. The minimal noise figure is 6 dB and kept below 9 dB within the entire operational bandwidth. The RX has a linearity in terms of intermodulation distortion of better than -\12 dBm. The direct conversion TX involving inverter-based IQ modulator and Darlington-type pre-power amplifier features operation up to 9 GHz with 10-dB mean CG and an average output power of 4 dBm at 1-dB compression level. Excluding buffers and local oscillator generation, the RX and TX dissipate 54 and 84 mW, respectively, from a 1.2-V voltage supply. The circuit prototypes have been fabricated in a standard 65-nm CMOS low-power process without any additional RF options and occupy an area of only 0.77 \ mm^2 and 0.53 \ mm^2, respectively. [ABSTRACT FROM PUBLISHER]

A GSM-compliant local oscillator consuming a tiny die area of only 0.06 mm² and drawing 9 mA from a 1.2 V supply has been designed in a 65 nm CMOS process using thin-oxide devices only. The system is made of a 13 to 15 GHz LC VCO followed by a divide-by-four injection-locked frequency divider. The divider employs a ring oscillator-based topology leading to a two octave locking range with limited area and power consumption. The phase noise at the output of the divider is below -133 dBc/Hz at 3 MHz offset over the tuning range. [ABSTRACT FROM AUTHOR]

In this work, direct injection locking is applied to a ring oscillator topology to design a wideband divide-by-two frequency divider circuit with a locking range covering bands through Ku, namely input frequencies from 2 to 16 GHz. A thorough analysis is carried out: a behavioral model is developed that allows us to capture the operation of the two-stage differential ring oscillator. The mixing operation inherent in the direct injection scheme is deeply investigated and compared with tail injection locking. The design guidelines leading to a wide locking range are derived and exploited. Prototypes implemented in a digital 65-nm CMOS technology draw 1.6 mA from a 1.2-V supply. Since the design is inductorless, the divider area is as low as 130 µm². The output phase noise tracks the reference's one with the expected 6-dB difference over the entire range of operation frequencies. [ABSTRACT FROM AUTHOR]

This paper presents the design and implementation of a low power wideband mixer for multistandard receivers, covering global system for mobile communications, universal mobile telecommunications system, wireless local area network, Bluetooth, and ultra-wideband. The circuit topology is based on the folded technique with a current reuse shunt feedback RF input stage operating at a low supply voltage of 1 V. The mixer offers a peak gain of 12.8 dB, a 3-dB bandwidth from 1 to 10.5 GHz, and a minimum double-sideband noise figure of 7.6 dB. The input referred compression point is better than -15 dBm with an output referred intercept point of better than 5.75 dBm over the entire bandwidth. The mixer circuit was fabricated in a 65-nm standard CMOS process and draws 5 mA of dc current, leading to a power dissipation of only 5 mW. Gain and noise performance can be further increased when operating at nominal supply voltage of 1.2 V at the expense of an increasing power dissipation. [ABSTRACT FROM AUTHOR]

A new concept of noise reduction in CMOS circuits is presented taking advantage of a strong reduction of MOSFET low-frequency noise occurring under switched gate bias conditions and forward substrate bias. The effect of forward substrate bias on noise reduction is significantly larger in switched compared to constant gate bias conditions. Experimental results reveal that forward substrate bias is most effective when applied during the off-state of the transistor. A bias scheme adopting forward substrate bias only during the transistor off-state is suggested by the measurement results of transconductance efficiency gm/Id and intrinsic voltage gain gm/gds showing that these figures of merit are degraded when a forward substrate bias is applied during the on-state. As a first example exploiting the found noise reduction on circuit level, a 14 GHz pMOS VCO is presented. Our results show a significant reduction of close to carrier phase noise when a forward substrate bias is applied to the MOSFETs providing the negative conductance stage for the oscillation of the VCO. The outlined principles can be extended to other circuits and motivate new topologies and biasing schemes for analog and radio frequency CMOS circuits. [ABSTRACT FROM AUTHOR]

On-chip transformers are best suited to lower the supply voltage in RF integrated circuits. A design method to achieve a high current gain with an on-chip transformer operating in resonance is presented. The proposed method will be proven analytically and has been applied to a downconversion mixer. Thereby part of the overall gain of the mixer has been shifted from the RF input stage to the transformer. Thus, the power consumption has been reduced and, in spite of the low supply voltage, moderate linearity has been achieved. Although the transformer has a bandpass behavior, a 3-dR bandwidth of 900 MHz at a center frequency of 2.5 GHz has been achieved. The downconversion mixer has been realized in 0.13-μm CMOS. It consumes 1.6 mW from a 0.6-V supply. A gain of +5.4 dB, a third-order intercept point of -- 2.8 dBm, an input 1-dB compression point of -- 9.2 dEm, and a single-sideband noise figure of 14.8 dB have been achieved. [ABSTRACT FROM AUTHOR]

In this work, direct injection locking is applied to a ring oscillator topology to design a wideband divide-by-two frequency divider circuit with a locking range covering bands through Ku, namely input frequencies from 2 to 16 GHz. A thorough analysis is carried out: a behavioral model is developed that allows us to capture the operation of the two-stage differential ring oscillator. The mixing operation inherent in the direct injection scheme is deeply investigated and compared with tail injection locking. The design guidelines leading to a wide locking range are derived and exploited. Prototypes implemented in a digital 65-nm CMOS technology draw 1.6 mA from a 1.2-V supply. Since the design is inductorless, the divider area is as low as 130 µm². The output phase noise tracks the reference's one with the expected 6-dB difference over the entire range of operation frequencies. [ABSTRACT FROM AUTHOR]

A physical model of a novel MOS varactor design is presented. The voltage and frequency dependent results for the varactors small-signal capacitance and resistance agree well with measured values for different device geometries. The model is further tested through simulating a fully integrated voltage controlled oscillator (VCO) for UMTS applications. Measured frequency tuning and phase noise of the VCO are accurately reproduced. [Copyright &y& Elsevier]