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As the importance of renewable energy increases, the capacity of dispersed generations (DGs) has increased worldwide. However, the connection of DGs in the power distribution system can cause the fault current to increase as well as malfunction of the overcurrent relay (OCR) due to the reverse directional fault current. As the countermeasure to limit the fault current in the power distribution system with DG, though the superconducting fault current limiter (SFCL) is reported to be more effective, the research on the protection algorithm of the protective relay considering the application of SFCL is preferentially required. In this paper, the correction method of the OCR using voltage components for application of SFCL in a power distribution system with DG was suggested. To verify the effectiveness of the suggested method, the fault simulation for the power distribution system with DG including the OCR and the SFCL was performed. By applying the proposed correction method in the OCR, the protection coordination of OCRs for the application of SFCL in power distribution system with DG was confirmed to be improved through the suppression of the malfunction of the OCR. [ABSTRACT FROM AUTHOR]

Unlike the short circuit faults, the breakage fault does not offer distinctive characteristics compared with normal operation transients in DC distribution system and the fault information is difficult to be analyzed, which bring great challenges to breakage protection. In this case, this paper introduces a fault characteristic analysis method for breakage faults and proposes a novel breakage protection scheme based on ratio of positive and negative fault currents for DC distribution network. By establishing the fault circuit equations, the breakage fault features are analyzed for protection. Meanwhile, the ratio of current summation over their subtraction is used to further amplify fault characteristics, which overcomes the reliability problem of conventional breakage protection. A six-terminal flexible DC distribution network is built in PSCAD/EMTDC to verify the proposed protection method. Simulation results show that the protection is robust to the measurement noise and can identify an internal breakage fault and realize the broken pole selection rapidly. [ABSTRACT FROM AUTHOR]

The phasor estimation of the fault current signal in the presence of dc offset results in the significant error, which is not suitable for the power system monitoring. To reduce the phasor estimation error of the fault current in the presence of dc offset, primarily the dc offset needs to be mitigated. In this letter, a four-sample method, which requires four sub-cycle samples as the input and estimates the dc offset parameters present in the signal, is proposed. The test results show that the proposed method is simple and more accurate in mitigating the dc offset from the fault signal. [ABSTRACT FROM AUTHOR]

Power transmission with HTS dc cables has the characteristics of high capacity, high efficiency, more compact size, and environmental friendly. It has become an alternative and revolutionary upgrade of the traditional dc power transmission. The self-acting limit function during its quenching for fault current is unique to HTS dc cables. Fault-current-limiting capability of the HTS DC cable in a line-commutated converter (LCC) HVDC system is therefore analyzed with HTS current-limiting features in different short-circuit situations to identify the HTS dc transmission system design and operation features and verification achieved with the HTS dc cable characteristics and parameters, especially the peak value of the fault currents in the LCC HVDC systems. [ABSTRACT FROM AUTHOR]

As Type-3 wind turbine (WT) has already become a typical type of highly penetrated power sources in modern power systems, characterizing its properties during grid fault is a basic requirement for system analysis. However, many significant factors have not been considered in the existing analytical methods and results, such as various switching of internal control and protection circuits in low voltage ride through (LVRT) solutions. In this paper, performance of Type-3 WT during LVRT is first illustrated and summarized as the sequential switching characteristic in multi time scales, viz., instant control, ac control, dc voltage control, and rotor speed control time scales. Thus, for magnitude drops in stator voltage, a mathematical model is proposed to understand this characteristic and fault current analysis's features. Then, an analytical method, based on the operational inductance, is proposed so that fault current components, with the sequential switching considered, can be depicted with a unified and simple analytical expression. By identifying magnitude of symmetrical current, the transient and steady-state equivalent circuits of Type-3 WT are proposed to estimate momentary current and electrical power approximately. Finally, analytical results are verified by comparisons with real-time simulation results of a detailed 1.5 MW WT model in RT-LAB. [ABSTRACT FROM AUTHOR]

This paper proposes a smart dual function series resonance ferroresonance overvoltage and fault current limiter (SRFFCL) for distribution networks. The studied network has potential transformers (PTs) with a typically low thermal capacity and high accuracy. The PT core losses are assumed to be constant during ferroresonance oscillation. The MATLAB software is used for simulation of the novel SRFFCL in distribution network, to study the PT ferroresonance overvoltage and fault current. Also, experimental results are obtained using a laboratory prototype. Both the simulation and experimental results, which are in good agreement with each other, show that the suggested SRFFCL can not only control the fault current but also adequately decrease the ferroresonance oscillation of the PT. [ABSTRACT FROM AUTHOR]

The high fault current of dc line is a major threat to multiterminal voltage-source-converter-based HVDC (VSC-HVDC) system. However, dc circuit breaker (DCCB) with large capacity and fast breaking speed is still under development. Therefore, fault current limitation is vital for the multiterminal VSC-HV DC system. This paper proposes a simple and easily applied hybrid current-limiting circuit (HCLC) at dc side, which consists of a current-limiting inductor (CLI) and an energy dissipation circuit (EDC) in parallel with the CLI. The CLI is designed to reduce the requirement for the DCCB's capacity and breaking speed. The EDC, which consists of thyristor-controlled resistors, is proposed to reduce the stress on energy absorption element (metal oxide arrester) in DCCB and to accelerate the fault current interruption. The design and discussion about the HCLC parameters are performed in detail. By employing the proposed HCLC, dc line fault in the multiterminal system can be isolated effectively with existing DCCB technology, and fast system restoration without power interruption of healthy part can be achieved. Numerous simulations with real-time digital simulator and comparisons with traditional schemes have demonstrated the promising performance of the proposed HCLC. The effectiveness of the HCLC's topology has also been verified by a simplified and scaled test circuit. [ABSTRACT FROM PUBLISHER]

Current-transformer (CT) saturation threatens accurate discrimination between internal fault current and magnetizing inrush current of a transformer and endangers the proper operation of a differential relay. Thus, compensation of CT saturation could substantially improve the performance and security of transformer differential relays. So far, almost all of the technical literature in this field has focused exclusively on fault current compensation. However, this paper proposes an efficient compensation algorithm to reconstruct the fault and inrush currents which are distorted by CT saturation. Some of the attractive features of the proposed method are its accuracy, fast response time, desired sample-by-sample output, no dependency on power system topology, immunity against noise and harmonics, and its simplicity. These features are extracted through the application of numerous test cases reflecting a wide range of variations in fault and inrush currents. The proposed algorithm proves to be fast, accurate, and reliable. [ABSTRACT FROM PUBLISHER]

Single-phase-to-ground faults in power stations sometimes cause a second phase-to-ground fault in another phase. If the phase-to-ground faults are located on different sides of the generator circuit breaker (CB), one has a double earth fault of a special and so far not analyzed kind with respect to the CB. It may lead to high stresses for the last CB pole to clear. The general expressions for the current, the rate of rise of recovery voltage, and the power frequency recovery voltage across this CB pole have been deduced as function of the sequence values of the short-circuit impedances and surge impedances, respectively. The corresponding results are discussed for typical cases. A detailed case analysis by means of the Electromagnetic Transients Program shows that at rated load, such a double earth fault, produces CB stresses comparable to out-of-phase conditions. A combination of double earth fault and out-of-phase conditions, however, causes a peak value of the transient recovery voltage, which will significantly exceed the values laid down in the standards. [ABSTRACT FROM AUTHOR]

This paper presents a stator ground protection scheme based on the fault current flowing in the breakdown channel. It trips only if the fault current exceeds the fault current tolerance capacity of the generator. Otherwise, it will just emit alarm signals. Thereby, the unnecessary trip-out of large generator can be avoided. The stability of the power system and the generator security can then be ensured. To achieve the scheme, methods of calculating the fault current in real time are proposed for three common generator neutral grounding methods based on the zero-sequence equivalent circuits. In addition, a ground fault location algorithm is presented which can automatically identify the faulted coil in a large generator with multicircuit stator winding. It greatly reduces the workload of repair. An implementation scheme is given on the basis of the subharmonic injection protection device. Simulation results show the validity of the protection scheme and the accuracy of the fault location algorithm. [ABSTRACT FROM PUBLISHER]

Traditional impedance-based fault-locating methods implemented in modern overcurrent protection relays require voltage and current measurements to provide reasonable fault-location estimates. Although they capture voltage and current, depending on field condition or due to equipment failure, relays may record current measurements only. Voltage measurements are thus missing or unavailable. The objective of this paper is to develop practical impedance-based fault-locating algorithms with current data (magnitude or phasors) as the only input and demonstrate the efficacy of the algorithms with simulated and actual field data. These algorithms use the circuit model of the distribution feeder and Kirchhoff's circuit laws in estimating the fault voltage at the relay location and then use impedance-based methods for fault location. Based on the analysis conducted on actual fault data, error in estimation is generally less than 0.5 mi from the actual location of the fault. [ABSTRACT FROM AUTHOR]

This paper presents a comparative survey of research activities and emerging technologies of solid-state fault current limiters for power distribution systems. [ABSTRACT FROM AUTHOR]

A novel type of circuit breaker is introduced for operation at medium-voltage dc with future naval ship power systems as a targeted application. The breaker utilizes a z-source LC circuit in order to automatically commutate a main-path SCR during a fault. Compared to existing dc circuit breakers, the z-source breaker features fast turn-off, simple control, and the source does not experience the fault current. The operation and analysis of the new breaker is presented. Component sizing is carried out for three medium-voltage power levels. Incorporation of the new breaker within a drive system is also explored. Laboratory validation is carried out on a low-voltage prototype. [ABSTRACT FROM AUTHOR]

Saturation of current transformers (CTs) can lead to maloperation of protective relays. Using the waveshape differences between the distorted and undistorted sections of fault current, this paper introduces a novel method to quickly detect CT saturation. First, a symmetrical variable-length window is defined for the current waveform. The least error squares technique is employed to process the current inside this window and make two estimations for the current samples exactly before and after the window. CT saturation can be identified based on the difference between these two estimations. The accurate performance of this method is independent of the CT parameters, such as CT remanence and its magnetization curve. Moreover, the proposed method is not influenced by the fault current characteristics, noise, etc., since it is based on the significant differences between the distorted and undistorted fault currents. Extensive simulation studies were performed using PSCAD/EMTDC software and the fast and reliable response of the proposed method for various conditions, including very fast and mild saturation events, was demonstrated. [ABSTRACT FROM AUTHOR]

Generally, the peak amplitude of the fault current after the fault occurrence depends on the transient component of the fault current, which is determined by the fault condition such as the fault angle. In the suggested flux-lock type superconducting fault current limiter (SFCL), the fault current of the lower peak amplitude causes the only high-TC superconducting (HTSC) element connected in series with one of two coils comprising the flux-lock type SFCL to be quenched, which the fault current can be limited by the lower limiting impedance of the flux-lock type SFCL. On the other hand, the fault current with the higher peak amplitude makes another HTSC element connected with the third winding to be quenched after the HTSC element connected in series with one of the SFCL's two coils is quenched, which contributes to the higher limiting impedance of this SFCL. Therefore, the effective fault current limiting operation of the flux-lock type SFCL can be performed by generating the SFCL's limiting impedance in proportion to the peak amplitude of the fault current. To confirm the current limiting operation of the proposed flux-lock type SFCL, the short-circuit tests of the flux-lock type SFCL using its third winding according to the fault angle were carried out and its effective fault current limiting operations were discussed. [ABSTRACT FROM AUTHOR]

Superconducting fault current limiter (SFCL) is a promising novel electric equipment to reduce excessive fault current in electric power systems effectively. However, in practical application of this novel device into electric networks, SFCL could cause some unfavorable impacts on the electric power system. Especially, coordination between the SFCL and the recloser which has a conventional protection scheme is a major concern because it could cause severe reliability and stability problems in power systems. Several important characteristics of SFCL, which affects on a recloser operation scheme, are quenching phenomena, recovery from the quenching state, limiting impedance and its triggering time. Therefore, careful assessment of coordination issues with a recloser should be investigated to evaluate reliabilities of electric power system by installing SFCL into conventional power networks. This paper presents the impacts of SFCL on the recloser operation by considering various aspects of newly developed hybrid resistive SFCL into distribution systems in Korea. Consequently, it was deduced that conventional recloser scheme might be altered in order to meet the performance and requirements of hybrid SFCL into distribution electric power systems. [ABSTRACT FROM AUTHOR]

KEPCO decided to apply the HTS FCL and cable in real substation in 2009. This is the first commercial demonstration case and starting point of the HTS equipment in South Korea, even though this is not a general perfect commercialization. For a successful application on this commercialization preliminary, it is quite important to design the HTS-FCL specification with regard to the current status of the application site (for example, the existence of NGR (Neutral Grounding Reactor), 3-winding low% impedance and so on). This paper evaluates the necessary and sufficient design specifications of the 22.9 kV HTS-FCL to fulfill the real power system conditions. It investigates the detailed design criteria, short circuit capacity, FCL impedance, protection scheme, fault limiting type and other design parameters to learn the real status of ICHEON substation which will be using the HTS- FCL. [ABSTRACT FROM AUTHOR]

The west coast and islands of Taiwan have abundant wind resource, which offers a great opportunity for large-scale offshore wind power generation. In Taiwan, the first stage of the offshore wind farms at the Jhang-Bin and Penghu areas has been planned. In particular, the Jhang-Bin wind farm will become the first and one of the largest wind farms in Taiwan. Therefore, its impacts on system operation and security have to be investigated and studied in advance. Following a general connection design discussion, this paper is consist of four major system impact analyses: load flow, fault current, voltage variation, and transient stability. Moreover, three types of typical wind turbines have been adopted in this paper in order to compare their performances on the wind farm integration system. From the simulation results, some significant conclusion and recommendations have been extracted, which would contribute to the first offshore wind farm development in Taiwan. [ABSTRACT FROM AUTHOR]

This paper presents the results of arcing energy by the initiation of arcing, the arc clearing voltage, the system impedance (X/R), and the making angle. To perform this analysis, current limiting fuse (CLF) model was developed using the ATP-Draw program. The violent activation of arc is affected by the voltage level, the voltage rise rate when the arcing starts, and the minimum and the maximum positions of the arcing energy that can be moved to zero degree by the X/R, and the more severe interrupted condition has to be considered. The model developed using ATP-Draw enables a non-expert to use it without spending excessive time and effort. [ABSTRACT FROM AUTHOR]