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Spintronics attracts much attention because of the potential to build novel spin-based devices which are superior to nowadays charge-based microelectronic devices. Silicon, the main element of microelectronics, is promising for spin-driven applications. Understanding the details of the spin propagation in silicon structures is a key for building novel spin-based nanoelectronic devices. We investigate the surface roughness- and phonon-limited electron mobility and spin relaxation in ultra-thin silicon films. We show that the spin relaxation rate due to surface roughness and phonon scattering is efficiently suppressed by an order of magnitude by applying tensile stress. We also demonstrate an almost twofold mobility increase in ultra-thin (0 0 1) SOI films under tensile [1 1 0] stress, which is due to the usually neglected strain dependence of the scattering matrix elements.

Properties of semiconductors provided by the electron spin are of broad interest because of their potential for future spin-driven microelectronic devices. Silicon is the main element of modern charge-based electronics, thus, understanding the details of the spin propagation in silicon structures is key for novel ��

Display Omitted Electron spin lifetime increases in (001) thin silicon film under shear strain.Intervalley scattering is suppressed with applied shear strain in 110].Spin lifetime is enhanced for in-plane spin injection orientation. Electron spin attracts much attention as an alternative to the electron charge degree of freedom for low-power reprogrammable logic and non-volatile memory applications. Silicon appears to be the perfect material for spin-driven applications. An order of magnitude enhancement of the electron spin lifetime in (001) silicon thin films by shear strain is shown. It is demonstrated that spin-flip scattering processes between the two 001] valleys are responsible for spin relaxation in thin (001) silicon films. The enhancement of the spin lifetime is the result of the suppression of inter-valley scattering caused by the shear strain induced equivalent 001] valley splitting.

Semiconductor spintronics is promising, because it allows creating microelectronic elements which are smaller and consume less energy than present charge-based devices. Silicon is the main element of modern charge-based electronics, thus, understanding the peculiarities of spin propagation in silicon is the key for designing novel devices. We investigate the electron momentum and the spin relaxation in thin (001) oriented SOI films using a k ⋅ p-based approach with spin degree of freedom properly included. We demonstrate that shear strain routinely used to enhance the electron mobility can boost the spin lifetime by an order of magnitude.

We study the transport properties of the Datta–Das spin field-effect transistor built on InAs and Si. First, we demonstrate that the amplitude of the magnetoresistance oscillations as a function of the band mismatch between the ferromagnetic contacts and the semiconductor channel made of InAs decreases dramatically with increasing temperature. A shorter InAs channel is needed to create an InAs-based SpinFET which will operate at higher temperatures. Second, we show that the [1 0 0] orientation of the fin is preferable for silicon SpinFETs due to stronger modulation of the conductance as a function of spin–orbit interaction and magnetic field. Short silicon fins can be used for current modulation as a function of the conduction band mismatch between the channel and the ferromagnetic contacts only at relatively low temperatures. In contrast, longer silicon channels allow a TMR modulation at room temperature by changing the strength of the spin–orbit interaction through the gate bias.

We investigate the transport properties of ballistic spin field-effect transistors (SpinFET). We show that temperature exerts a significant influence on the device characteristics. For the InAs-based SpinFET an ambient temperature higher than T=150K leads to the absence of the ability to modulate the value of the tunneling magnetoresistance through changing the bandgap mismatch between the channel and the contacts. The length of the semiconductor channel impacts significantly the device characteristics. A shorter channel is preferred for potential operations at room temperature. For the silicon-based SpinFET the spin-orbit interaction has to be taken in the Dresselhaus form. We demonstrate that silicon fins with [100] orientation exhibit a stronger dependence on the value of the spin-orbit interaction and are thus preferable for practical realization of SpinFETs.

We investigate the properties of ballistic fin-structured silicon spin field-effect transistors. The spin transistor suggested first by Datta and Das employs spin-orbit coupling to introduce the current modulation. The major contribution to the spin-orbit interaction in silicon films is of the Dresselhaus type due to the interface-induced inversion symmetry breaking. The subband structure in silicon confined systems is obtained with help of a two-band k·p model and is in good agreement with recent density functional calculations. It is demonstrated that fins with [100] orientation display a stronger modulation of the conductance as function of spin-orbit interaction and magnetic field and are thus preferred for practical realizations of silicon SpinFETs.

Spintronics attracts much attention because of the potential to build novel spin-based devices which are superior to nowadays charge-based microelectronic devices. Silicon, the main element of microelectronics, is promising for spin-driven applications. We investigate the surface roughness and electron-phonon limited spin relaxation in silicon films taking into account the coupling between the relevant valleys through the Γ-point. We demonstrate that applying uniaxial stress along the [110] direction considerably suppresses the spin relaxation.

Semiconductor spintronics is a rapidly developing field with large impact on microelectronics. Using spin may help to reduce power consumption and increase computational speed. Silicon is perfectly suited for spin-based applications. It is characterized by a weak spin-orbit interaction which should result in a long spin lifetime. However, recent experiments indicate the lifetime is greatly reduced in gated structures. Thus, understanding the peculiarities of the spin-orbit effects on the subband structure and details of the spin propagation in surface layers and thin silicon films is urgently needed. We investigate the contribution of the spin-orbit interaction to the equivalent valley splitting and calculate the spin relaxation matrix elements by using a perturbative k ⋅p approach. We demonstrate that applying uniaxial stress along the [110] direction may considerably suppress electron spin relaxation in silicon surface layers and thin films.

Silicon is the main element of modern charge-based electronics. Understanding the details of the spin propagation in silicon structures is elementary for novel spin-based device applications. We investigate valley splitting, surface roughness scattering, and spin relaxation matrix elements in thin silicon films by using a perturbative k·p approach. We demonstrated that applying uniaxial stress along the [110] direction considerably suppresses the intersubband spin relaxation elements.

Significant progress in integrated circuits performance has been supported by the miniaturization of the transistor feature size. With transistor scalability gradually slowing down new concepts have to be introduced in order to maintain the computational speed increase at reduced power consumption for future micro- and nanoelectronic devices. A promising alternative to the charge degree of freedom currently used in MOSFET switches is to take into account the spin degree of freedom. We computationally investigate transport properties of ballistic spin field-effect transistors (SpinFETs). These simulations require a significant amount of computational resources. To achieve the best performance of calculations we parallelize the code for a shared-memory multi-CPU system. As the result of the optimization of the whole model a significant speed-up in calculations is achieved. We demonstrate that the [100] oriented silicon fins are best suited for practical realizations of a SpinFET.

A spin field-effect transistor (SpinFET) is composed of source and drain contacts which sandwich a semiconductor region [1]. Current modulation is achieved by electrically tuning the gate voltage dependent strength of the spin-orbit interaction in the semiconductor region.

We investigate the transport properties of ballistic spin field-effect transistors. The transistor characteristics are examined for a broad range of parameters including the semiconductor channel length, the conduction band mismatch between the channel and the contacts, the strength of the spin-orbit interaction, and the magnetic field. We show that temperature exerts a significant influence on the device characteristics. For the InAs-based transistors a shorter channel is preferred for potential operations at room temperature. For the silicon-based transistors we demonstrate that the [100] fin orientation displays a stronger dependence of the magnetoresistanse on the strength of the spin-orbit interaction and is therefore best suited for practical realization of the silicon spin transistor.

We investigate the properties of ballistic spin field-effect transistors (SpinFETs). First we show that the amplitude of the tunneling magnetoresistance oscillations decreases dramatically with increasing temperature in SpinFETs with the semiconductor channel made of InAs. We also demonstrate that the [100] orientation of the silicon fin is preferred for practical realizations of silicon SpinFETs due to stronger modulation of the conductance as a function of spin-orbit interaction and magnetic field.

Spintronics attracts at present much interest because of the potential to build novel spin-based devices which are superior to nowadays charge-based microelectronic elements. Utilizing spin properties of electrons opens great opportunities to reduce device power consumption in future electronic circuits. Silicon, the main element of microelectronics, is promising for spin-driven applications. Understanding the details of the spin propagation in silicon structures is a key for building novel spin-based nanoelectronic devices. We investigate the influence of shear strain on surface roughness induced spin relaxation in a thin silicon-on-insulator-based transistor. Shear strain dramatically influences the spin, which opens a new opportunity to boost spin lifetime in a silicon spin field-effect transistor.