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Predicting the formability of perovskite structure for hybrid organic-inorganic perovskites (HOIPs) is a prominent challenge in the search for the required materials from a huge search space. Here, we propose an interpretable strategy combining machine learning with a shapley additive explanations (SHAP) approach to accelerate the discovery of potential HOIPs. According to the prediction of the best classification model, top-198 nontoxic candidates with a probability of formability (Pf) of >0.99 are screened from 18560 virtual samples. The SHAP analysis reveals that the radius and lattice constant of the B site (rB and LCB) are positively related to formability, while the ionic radius of the A site (rA), the tolerant factor (t), and the first ionization energy of the B site (I1B) have negative relations. The significant finding is that stricter ranges of t (0.84-1.12) and improved tolerant factor τ (critical value of 6.20) do exist for HOIPs, which are different from inorganic perovskites, providing a simple and fast assessment in the design of materials with an HOIP structure.

It is difficult to establish a constitutive model of damage for rock materials due to the complex meso-mechanism of the rock deterioration process. In this paper, by analysis of the damage mechanism, the reason for the existence of a rock damage threshold is explained and we conclude that damaged rock elements of micro scale can still bear stress. The correlation between damaged and undamaged elements is examined in relation to stress distribution. Rocks under different initial conditions can be defined as undamaged materials with different properties, to avoid the issue of the solution of the undamaged condition and to simplify the damage model. On the basis of the Mohr-Coulomb criterion and theories of continuum damage and statistical mechanics, a constitutive model of rock materials affected by the load-bearing capacity of damaged elements under triaxial compression is established. Compared with previous experimental data and theoretical results, we show that this model can reflect the stress-strain relationship of the whole process of rock failure. In particular, the description of the strain softening stage after peak strength is proved to be more reasonable. Programming of the constitutive model applied to stability analysis of the Qingdao subway station is achieved by secondary development of FLAC3D. The computing results compare very well with field monitoring data, indicating that the constitutive model of damaged rock can reflect the deterioration effect of weathered rock at the site. This constitutive model of rock damage may provide a useful reference for practical application.

Objective: To introduce a kind of method of hypospadias comprehensive typing, approach correlation of the characteristic of urethra plate growth and the operation method choice for hypospadias repair, Methods: 180 patients suffering of hypospadias were assessed in accordance with the classification of hypospadic orifice and urethral plate and chose their methods of operation accordingly, among which 89 patients accept Tubularized Incised Plate Plasty (TIP), 48 patients accept Mathieu plasty, 36 patients accept Onlay plasty and 7 patients accept Koyanagi plasty. Result: In the 180 cases, the total occurrence rate of urethral fistula was 5.56% (10/180), the occurrence rate of urethral stricture was 3.89% (7/180), the cure rate of one stage operation was 90.56% (163/180), the reoccurrence rate of clubbed penis was 4.44% (8/180), the occurrence rate of poor development of penis was 2.22% (4/180), the occurrence rate of poor appearance of penis was 2.78% (5/180), with overall satisfaction rate was 90.56% (163/180). 12.78% (23/180) of the patients required two stage operation. There was no significant difference on the cure rate of one stage operation among different operation methods chosen (p>0.01). The cure rate in patients with one stage operation from the 6 months group (p

An optical receiver circuit with automatic gain control (AGC) for radio-over-fiber (RoF) system is presented. The AGC optical receiver is designed on the standard 0.18µm CMOS technology. The proposed circuit uses a differential variable gain amplifier (VGA), implemented by a Gilbert cell and provides an exponential function circuit for the dB linearity of the gain voltage. A large dynamic range of the receiver is from 13dB to 75dB. The AGC loop bandwidth is 3.3GHz, with a power consumption of 101mW and a low noise current of 1.45µA, and the eye diagram of the receiver is also good.

A lattice-matched InAlN/GaN heterostructure was grown on sapphire substrate by using low-pressure metal organic chemical vapor deposition (MOCVD), and Hall effect measurements shown that the sheet charge density and electron mobility were 2.6×1013 cm−3 and 1210cm2/V•s, respectively. Large gate periphery (2.5mm) high electron mobility transistors (HEMTs) with a gate length of 250nm and a source-drain spacing of 4 µ m were fabricated. The measurement results revealed that the drain current density was 248mA/mm at a gate-source voltage of •1V with a maximum extrinsic transconductance of 271.1mS/mm, and the extrapolated threshold voltage was •1.95V. The measurement of the gate leakage current indicated that the tunneling current is likely the primary mechanism.

An optical receiver with automatic gain control (AGC) function is presented in this paper, which is based on the 0.15um low power InGaAs pHEMT technology provided by WIN semiconductors corp in Taiwan and used in the RoF technologies in IMT-Advanced (4G) system. The gain of the optical receiver varies from 55dB to 85dB. The •3dB bandwidth is about 9GHz, the noise current is about 700nA and the sensitivity is •24dBm. The characteristics of this optical receiver meet the requirements of the RoF techniques. The performance of the optical receiver greatly exceeds th e initial requirements because of the better high frequency performance of the pHEMT technology. Therefore, this circuit can be used for other applications, such as the RoF technology of wideband radar signals.

A 512 bit EEPROM IP which is based on the SMIC 0.18 µm 2P6M embedded EEPROM process has been designed for RFID tag IC in this paper. The main improvement of the IP circuits includes timing control circuit of the digital circuit, charge pump and sense amplifier of the artificial circuit. A block erasing signal is added in the timing control circuit. Considering the request of low power consumption, the high voltage generator and the regulator of the charge pump are also improved. Current sensing scheme is employed in the design of sense amplifier (SA).

This paper presents an automatic gain control (AGC) circuit which is used in a single-chip UHF RFID reader transceiver system. The VGA is a fully differential circuit with differential output swing of 1-Vpp. The gain of the two VGAs can be varied linearly from 0dB to 60dB with respect to a control voltage from 0.28V to 0.93V. The exponential voltage to current (V-I) convertor is based on Taylor’s series expansion. The AGC circuit consumes 4.5mA current and has a 2.7MHz 3-dB bandwidth when the gain is 60dB. A differential positive peak detector is used in the AGC circuit loop. The AGC circuit is based on UMC 0.18-μm single-poly six-metal CMOS process technology.

A distributed computing application often uses multiple networked computers to work together to accomplish a complex task. So, it can be used to do calculation-intensive multimedia content computing too, such as video optical character recognition, shot detection and so on. Meanwhile, the Web is catalyzing a transition from PC-based software and file systems to Internet-based applications and Web services. We aim at the combination of multimedia computing and Web Services together that supports uniform naming, protection, and access for Multimedia Content objects stored by Web services to accomplish distributed computing. At a high level, it creates an integrated file and object system from heterogeneous, multimedia content objects dispersed across the Internet. Based on this fact, we proposed a novel framework of distributed multimedia computing in this paper. In this framework, the concept of workflow which can describe business processes logically is introduced. Some experiments show the effectiveness of the proposed framework.

The performance of an 8 GHz LO-Echoing FET up-converter is presented. A conversion gain of 1.3 dB from 70 MHz IF to the up-converted output and a conversion loss of 4.7 dB from 8.350 GHz LO to the up-converted output are obtained. The maximum up-converted output power is 16.7 dBm. The up-converter can be used as the output of a microwave transmitter. It can replace the diode up-converter and the first two stages in the FET high-power amplifier. >

A differential automatic gain control (AGC) circuit is presented. The AGC architecture contains two-stage variable gain amplifiers (VGAs) which are implemented with a Gilbert cell, a peak detector (PD), a low pass filter, an operational amplifier, and two voltage to current (V—I) convertors. One stage VGA achieves 30 dB gain due to the use of active load. The AGC circuit is implemented in UMC 0.18-μm single-poly six-metal CMOS process technology. Measurement results show that the final differential output swing of the 2nd stage VGA is about 0.9-Vpp; the total gain of the two VGAs can be varied linearly from −10 to 50 dB when the control voltage varies from 0.3 to 0.9 V. The final circuit (containing output buffers and a band-gap reference) consumes 37 mA from single 1.8 V voltage supply. For a 50 mV amplitude 60% modulation depth input AM signal it needs 100 μs to stabilize the output. The frequency response of the circuit has almost a constant −3 dB bandwidth of 2.2 MHz. Its OIP3 result is at 19 dBm.

This paper presents a low power and high efficiency high voltage generator circuit embedded in electrically erasable programmable read-only memory (EEPROM). The low power is minimized by a capacitance divider circuit and a regulator circuit using the controlling clock switch technique. The high efficiency is dependent on the zero threshold voltage (Vth) MOSFET and the charge transfer switch (CTS) charge pump. The proposed high voltage generator circuit has been implemented in a 0.35 μm EEPROM CMOS process. Measured results show that the proposed high voltage generator circuit has a low power consumption of about 150.48 μW and a higher pumping efficiency (83.3%) than previously reported circuits. This high voltage generator circuit can also be widely used in low-power flash devices due to its high efficiency and low power dissipation.

A novel matching method between the power amplifier (PA) and antenna of an active or semi-active RFID tag is presented. A PCB dipole antenna is used as the resonance inductor of a differential power amplifier. The total PA chip area is reduced greatly to only 240 × 70 μm2 in a 0.18 μm CMOS process due to saving two on-chip integrated inductors. Operating in class AB with a 1.8 V supply voltage and 2.45 GHz input signal, the PA shows a measured output power of 8 dBm at the 1 dB compression point.

A rail-to-rail amplifier with constant transconductance, intended for audio processing, is presented. The constant transconductance is obtained by a constant current technique based on the input differential pairs operating in the weak inversion region. MOSFETs working in the weak inversion region have the advantages of low power and low distortion. The proposed rail-to-rail amplifier, fabricated in a standard 0.35 μm CMOS process, occupies a core die area of 75 × 183 μm2. Measured results show that the maximum power consumption is 85.37 μW with a supply voltage of 3.3 V and the total harmonic distortion level is 1.2% at 2 kHz.

A monolithically integrated optical receiver, including the photodetector, has been realized in Chartered 0.35 μm EEPROM CMOS technology for 850 nm optical communication. The optical receiver consists of a differential photodetector, a differential transimpedance amplifier, three limiting amplifiers and an output circuit. The experiment results show that the receiver achieves an 875 MHz 3 dB bandwidth, and a data rate of 1.5 Gb/s is achieved at a bit-error-rate of 10−9. The chip dissipates 60 mW under a single 3.3 V supply.

This paper presents a realization of a silicon-based standard CMOS, fully differential optoelectronic integrated receiver based on a metal–semiconductor–metal light detector (MSM photodetector). In the optical receiver, two MSM photodetectors are integrated to convert the incident light signal into a pair of fully differential photogenerated currents. The optoelectronic integrated receiver was designed and implemented in a chartered 0.35 μm, 3.3 V standard CMOS process. For 850 nm wavelength, it achieves a 1 GHz 3 dB bandwidth due to the MSM photodetector's low capacitance and high intrinsic bandwidth. In addition, it has a transimpedance gain of 98.75 dBΩ, and an equivalent input integrated referred noise current of 283 nA from 1 Hz up to –3 dB frequency.

We reported on the fabrication and characterization of AlGaN metal-semiconductor-metal (MSM) photodetectors (PDs). AlGaN epitaxial material with an Al content of 0.6 were grown on sapphire substrates by metalorganic chemical vapor deposition (MOCVD). Schottky contacts were made with Ni/Pt/Au by the way of standard lift-off technique. We measured the performance of PDs. The cutoff wavelength is 276nm. Ultraviolet/visible contrast is about 3 orders of magnitude. The dark current is about 1nA at 1.5V bias and 1µA at 5.3V bias.