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The advances in chemically synthesized semiconductor nanowires used as nanoelectronic devices and the basic nanowire field-effect transistor structures for both p- and n-channel homogeneous composition nanowires are reviewed. The application of thin-film nanowire transistor arrays on low-cost substrates for relatively high-frequency ring oscillators and completely transparent device arrays are discussed.

The successful fabrication of nitride-based multiquantum-well (MQW) photodetectors (PDs) with the semi-insulating Mg-doped GaN cap layer is discussed. Findings reveal that the responsivity was 0.372 A/W at 380 nm when the device was biased at 5 V.

The 3-D finite difference time domain (FDTD) design, simulation, and modeling of micro-pillar microcavity geometries, suitable for the construction of high-efficiency single-photon sources, is described. The outcomes of the computations of the microcavity mode structure of distributed-Bragg-reflector (DBR) micro-pillar microcavities of group III-V semiconductor materials demonstrate that the high light extraction efficiencies can be achieved limited by sidewall scattering and leakage.

All-dielectric cables separately suspended along high voltage overhead transmission routes are vulnerable to ageing through dry-band arcing. The differences between this process and dry-band arcing on traditional high voltage insulators are reviewed. Solutions to the problem on all-dielectric self supporting (ADSS) cables which involve the introduction of controlled conductivity into the cable are considered. Analysis suggests that arcs which are both electrically stable and spatially confined must be avoided. It is shown that the cable can be protected by limiting either the current or the voltage available to an arc. These considerations reveal that a semiconductive element does not have to cover the whole cable length to provide effective protection against dry-band arcing in this application. Index Terms--ADSS cable, dry-band arc, semiconductive, arc stability.

Understanding the high frequency characteristics of the materials that make up medium voltage extruded cables is important in establishing diagnostics schemes based on electromagnetic pulse propagation methods. Two measurement techniques have been developed and used to characterize the high frequency material properties of semi-conducting screens and cross linked polyethylene (XLPE) insulation up to 100 MHz. The experimental details, parameter extraction and limitations of the two measurement techniques are presented. Index Terms--Complex permittivity, scattering parameters, insulation, semi-conducting, two-port, one-port, high frequency, measurements, characterization.

The purposes of multivariate statistical process control (MSPC) are to improve process operations by quickly detecting when process abnormalities have occurred and diagnosing the sources of the process abnormalities. In the area of semiconductor manufacturing, increased yield and improved product quality result from reducing the amount of wafers produced under suboptimal operating conditions. This paper presents a complete MSPC application method that combines recent contributions to the field, including multiway principal component analysis (PCA), recursive PCA, fault detection using a combined index, and fault contributions from Hotelling's [T.sub.2] statistic. In addition, a method for determining multiblock fault contributions to the combined index is introduced. The effectiveness of the system is demonstrated using postlithography metrology data and plasma stripper processing tool data. Index Terms--Combined index, contribution plots, fault detection, fault diagnosis, multiblock principal component analysis, recursive principal component analysis.

An index that would reliably rank the relative radiation hardness of semiconductors would be very helpful for selecting materials for many applications. The concept of 'concentration of primary defects' (CPD) has been proposed as such an index. Here we show that for the GaAs-InP family of semiconductors used in solar cells, CPD yields results that do not agree with experiment. The long-established concept of damage constants for various semiconductor properties is a more reliable index. For solar cells the relevant damage constant is that for the degradation of minority carrier lifetime. Although the damage constants reported for different semiconductors are specific to a particular type and energy of radiation, we show they can be extended beyond the type and particle energy for which they were originally determined by using nonionizing energy loss (NIEL), thereby greatly extending their possible application. Index Terms--Displacement damage, nonionizing energy loss (NIEL).

A methodology for extracting between the source and drain the spatial variations of surface dopant-impurity concentration and oxide thickness in the channel drain/extension and source/extension regions are described. The experimental tunnel direct current current-voltage data of the drain source and basewell terminal currents versus the gate/base voltage are used.

Complete gate silicidation is an excellent technique for the integration of metal gates into MOSFETs, and NiSi is the most scalable silicide gate material. A versatile method, which relies on doping the poly-Si with various impurities prior to silicidation, for controlling the workfunction of a NiSi gate is presented.

This paper evaluates the electric stress enhancement due to surface protrusions on the tape of semiconductive shield compounds used in power cables. The results of a conventional grade and a supersmooth grade shield compounds are reported. Using a laser-scanning instrument, the shape of protrusions on the tape surface of these compounds can be quantitatively determined. An algorithm is developed to portray the geometry of a protrusion so as to allow the calculation of its stress enhancement. First the supersmooth grade shield compound is illustrated as much smoother than the conventional shield compound. Besides exhibiting a lower number of protrusions, the surface protrusions on a supersmooth shield compound also are much 'flatter' than those of the conventional shield compounds. Insulation thickness is confirmed to influence the stress enhancement and, consequently, different distributions of stress enhancement factor are observed with low voltage, say, 15 kV, and high voltage, say, 500 kV, applications. The conventional shield compound exhibits higher stress enhancement than the supersmooth grade compound in higher voltage cables, though the difference is much less with lower voltage settings. Since the total number of protrusions on the conventional shield surface is more than one order of magnitude higher, the supersmooth shield therefore can offer much better protection to a cable by minimizing the electric stress degradation in its insulation material. Index Terms--Electric stress enhancement, semiconductive shields, conventional grades, supersmooth grade, surface smoothness measurement, surface protrusions, quality control, quality assurance testing.

The simulation of the emission characteristics of self-assembled semiconductor quantum dash (QDash) active materials, characterized by high length-to-width and width-to-height ratios of the dash size and by a wide spreading of the dash dimensions, is studied. The model can be used to predict the gain properties of different QDash ensembles having various size distributions.

Reporting the status of research aimed at exploring the limits and the real possibilities of an approach when the magnetron sputtering technique and conventional substrates are employed the results point toward the scalability/integrability of the technology with silicon processing when the main target consists of networking for integrated electronics.

The paper presents a general approach for modeling the effects of thermal response in semiconductor devices as they are seen at the electrical terminals. It is shown that this can be achieved by properly connecting at the electrical ports an equivalent electrical network representing the transformed thermal impedance. The equivalent model is employed to investigate electrothermal interactions in MOSFETs and bipolar junction transistors. Precise conditions for which electrothermal resonant oscillations arise are deduced and an experimental technique for thermal-impedance extraction is presented. Index Terms--Circuit modeling, electrothermal analysis, thermal instability.

Mechanical holding systems of a wafer might cause serious problems in the semiconductor industry. Electrostatic wafer handling might be one of the possible solutions for such problems. We have investigated an attractive force on a silicon wafer by using an electrostatic chuck which consists of interdigitated electrodes and a dielectric thin film. Electrostatic attractive force increases as the applied voltage increases, and with a thinner dielectric layer. With the narrower width and spacing of interdigitated electrodes, the stronger electrostatic force is obtained. When 1-mm width and spacing interdigitated electrodes and 50-[micro]m-thick polymer film are used, the strongest force obtained was about 17 N in the vertical direction at 3.5 kV, for a 4-in silicon wafer. When dc high voltage is used, some residual force remains, even after the applied voltage is removed. This was overcome by using variable-frequency ac high voltage. Index Terms--Dielectric thin film, electrostatic chuck, electrostatic force, holding system for silicon wafer, interdigitated electrodes system.

A device-level simulation is presented for studying wave propagation along metal-insulator-semiconductor interconnects. A set of nonlinear equations is first formulated by combining the motion equations of charged carriers and Maxwell's equations. The set of nonlinear equations is then transformed into the frequency domain, which leads to sets of nonlinear equations for the fundamental mode and its harmonics. Finally, the sets of nonlinear equations in the frequency domain are discretized using the finite-element method and solved using Newton's iterations. Special numerical enhancements are implemented to speed up the computational convergence and handle the boundary layer nature of the problem under study. This device-level simulation provides knowledge on field-carrier interactions, semiconductor substrate loss, and nonlinearity, as well as slow-wave and screening effects of charged carriers. This device-level simulation scheme enables a rigorous full-wave study of nonlinearity effects that arise from semiconductor substrates. Numerical examples for some practical material and geometrical parameters are included to illustrate capabilities and efficiency of the proposed device-level simulation scheme. Index Terms--Boundary layer problem, device-level simulation, electromagnetic analysis, field-carrier interactions, finite-element method, MIS interconnects, semiconductor nonlinearity and loss, slow-wave effect.

High-current effects in InGaP/GaAs heterojunction bipolar transistors (HBTs) were modeled and characterized. In addition to the self-heating effect, high currents were found to degrade large-signal performance mainly through Kirk and quasi-saturation effects. New formalisms in terms of base transit time and base--collector diffusion capacitance were used to modify the conventional Gummel--Poon model. This new model was verified against large-signal characteristics measured at 2 GHz. The validity of the new model for HBTs of different emitter geometry was also explored. Index Terms--Charge carrier injection, charge carrier lifetime, charge carrier processes, heterojunction bipolar transistors, microwave devices, microwave power amplifiers, semiconductor heterojunction.

This paper compares a matrix converter (MC) and a dc-voltage link converter with an active front end for a 7.5-kW, 460-V induction motor drive. Part count, semiconductor losses, input filter design, and protection aspects are discussed. It is shown that the matrix converter's semiconductor losses are smaller only at full load operation for the same silicon area in both converters. A 33 % reduction of the device current rating of the MC is possible, resulting in comparable thermal device stress. The overall passive component count and rating is only slightly better for the MC. Index Terms--AC motor drives, input filter design, matrix converter, semiconductor losses, voltage-source converter.

The room temperature extraordinary magnetoresistance (EMR) of a mesoscopic sensor structure prepared from an InSb quantum well of dimension 30 nm wide x 100 nm high x 3 [micro]m long is reported. The observed EMR is 4.75% at a relevant field of 0.05 T. The advantages and disadvantages of this nonmagnetic composite semiconductor/metal structure relative to that of conventional magnetic giant magnetoresistance (GMR) and tunneling magnetoresistance (TMR) devices for use as read-heads in high-density magnetic recording are discussed. Index Terms--Extraordinary magnetoresistance, inhomogeneities, InSb, nonmagnetic narrow-gap semiconductors.

This paper presents a study on techniques for characterization of metal--oxide--semiconductor field-effect transistor (MOSFET) transconductance mismatch, using matched pairs with intentional 1% dimensional offsets. The relevance of this kind of work is demonstrated by the introduction of a new mismatch phenomenon that can be attributed to mechanical strain, associated with metal dummy structures that are required for backend chemical mechanical polishing (CMP) processing steps. Index Terms--Microelectronic test structure, MOSFET measurement method, systematic parametric mismatch.

A procedure for compensating for the self-heating effect in DC and pulse characteristics of heterojunction bipolar transistors (HBT), inserting a specified resistance in a bias circuit, is described and demonstrated.

Instabilities exhibited by bipolar junction transistors (BJT) during inductive turn-off are classified and are examined using a two-dimensional (2-D) simulator, with devices being simulated within realistic external circuits and experimentally, using a nondestructive method. It is shown that many instabilities result from interaction between electric field and charge within a cell, which cause transit time oscillations.

A time-domain large-signal model is proposed, for investigating nonlinear interactions between picosecond optical pulses and semiconductor active waveguide devices, including distributed-feedback lasers, Fabry-Perot lasers, and optical amplifiers. The model predicts phenomena such as transform-limited superluminal transmission and directional distributed-feedback (DFB) amplification.

Numerical simulations of a new sub-threshold device, the Schottky Junction Transistor, are described. Results for a device with a 0.5-micromillimeter gate length indicate that cutoff frequencies approaching 10GHz are possible, making the SJT suitable for radio frequency (RF) micropower analog circuit applications.

How to partially fill the intermediate band formed by the confined states of quantum dots with electrons is examined. Efficiencies of up to 63.2 percent are possible in ideal situations.

Dimensionless equations are presented, unifying independent studies involving numerical investigations of rate equations modeling self-pulsating laser diodes. Low values of decay rates of the carriers generate analytical approximations for the domain of self-pulsation.

Dependence of current and power efficiencies of bi-layer organic light-emitting diodes (OLED) on the thickness of organic layers is examined. Thicknesses of electron and hole transport layers are varied to determine the best configuration for power efficiency.

Capacitive-coupling coefficient dependence on bias and W/L is examined, and classic methods to extract values from electrical characterizations are reviewed. results obtained from a new model are compared to classic values.

It is shown that Cz wafers with an implanted boron layer can be used instead of p- on p[superscript +] epi-wafers in CMOS technology to strengthen latch-up performance.

Synthesis of a high-quality graded oxide is described. Grading is accomplished by growing a high-temperature oxide above the silicon dioxide viscoeleastic temperature under a pregrown lower-temperature silicon dioxide layer.

Complementary metal-oxide semiconductor (CMOS) Magnetotransistor (MT) offset is experimentally characterized. Its causes are analyzed for two commercial CMOS processes.

An analytical model is proposed that permits calculation of the current response of a (SML) spatially modulated light CMOS (complementary metal-oxide semiconductor) detector . This response is compared with responses of traditional CMOS photodetectors.

A fully pseudomorphic SiGe pMOSFET (positive-channel metal oxide semiconductor field-effect transistor) is shown to be compatible with modern CMOS (complementary metal oxide semiconductor technology over a limited range of epitaxial architectures. Hole transport is investigated in these structures using boron doping to supply SiGe with holes.

Full chemical mechanical polishing (CMP) process integration of a W/TiN damascene metal gate is optimized and is shown to be compatible with ultra large-scale integration (ULSI) circuit fabrication. Uniform and reliable electrical characteristics are demonstrated for diverse metal oxide semiconductor (MOS) pattern structures.

An experimental and theoretical investigation of memory-cell structures that use either natural nitride traps or semiconductor nano-crystals is proposed. Charging/discharging phenomena are examined, and an interpretation of experimental results is presented.

A new structure of silicon carbide (SiC) accumulation-mode MOSFET (ACCUFET) is proposed. Detailed analysis of the structure's design parameters is performed, and the structure is compared to alternative ACCUFET approaches.

A general estimation can be made of the carrier lifetime in the base, in high-voltage SiC diodes, using steady-state current-voltage characteristics at high injection levels. The transient time of the switch-on process can also be used for an estimate. Given an estimate of lifetime magnitude, the injection efficiency of the emitter can be evaluated.

An investigation of the quantum yield (QY) experiment reveals that stress-induced leakage current (SILC) and QY are caused by different defects in the oxide. It is concluded that it is not correct to interpret reduction in QY after stress as a measure of energy loss of SILC electrons.

Low-frequency noise (LFN) properties of field-effect transistor s (FET) that rely on polymers as substrate materials are examined. Explanation is provided in terms of nonstationary mobility in the semiconducting polymer.

Multiple-peak current-voltage (I-V) characteristics of four series-connected negative differential resistance (NDR) devices are examined. Results suggest ideas for integrated circuits (IC) based on NDR devices.

A model for metal-insulator-semiconductor (MIS) interconnects is presented. The model is based on device-level simulation results.

Design of heterojunction bipolar transferred electron devices (HBTED) for millimeter-wave oscillator applications is investigated. Conclusions regarding the design of practical HBTED structures for mm-wave oscillator applications are presented.

An iteration scheme is developed for calculating the base transit time for a given collector current density, for determining the best doping and Ge profiles to minimize transit time of heterojunction bipolar transistors (HBT) under all levels of injection before onset of the Kirk effect. Results indicate that a retrograde doping profile with a trapazoidal Ge profile yields the minimum transit time.

A new camel-like high-barrier gate field-effect transistor (FET) with a high breakdown voltage and low leakage current is described. The device shows promise for high-temperature applications.

Super self-aligned field-effect transistor (FET) technology is implemented in a low-loss integrated circuit (IC) switch. An insertion loss of 0.25 dB is obtained under a gate control voltage of 5V.

An enhancement-mode AlGaAs/InGaAs/AiGaAs heterojunction field-effect transistor (HJFET) has been developed, with a 5mm Al[sub 0.5]Ga[sub 0.5]As barrier inserted between an In[sub 0.2Ga[sub0.8]As channel layer and an upper Al[sub 0.2]Ga[sub 0.8]As electron supply layer. Results indicate that the HJFET is appropriate for single low voltage power applications.

Electrical properties of InP/InGaAs heterojunction bipolar transistors (HBT) between room temperature and near liquid helium temperature are discussed. Findings are important for optimizing low-temperature indium phosphide (InP) technology and for developing a quantitative model for circuit design.

Research into the influence of fluorine on reliability and parametrics in dual gate oxides is presented. Investigations showed that fluorine had a beneficial effect on the p-type field-effect transistors.

The results of two-dimensional hydrodynamic simulations of single finger power heterojunction bipolar transistors on gallium arsenide are presented.

The modeling and measurements of metamorphic high-electron mobility transistors are presented. Enhancement mode Al0.66In0.34As/Ga0.67In0.33As structures are used.