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This study proposes an implementation based on a low-cost field-programmable gate array (FPGA) of a high-resolution pulse width modulation applied on a single-phase power factor correction (PFC) converter operating with 2 MHz switch frequency. The PFC was implemented using a half-bridge enhancement-mode Gallium Nitride (eGaN) field effect transistor with on-board gate drives (EPC9003 development board) and the MAX10 FPGA.

This paper presents the design and development of a DC-DC step-down converter, operating with 1 MHz switching frequency. The use of this switching frequency is intended to reduce the physical size of the device. To achieve this operating frequency, while maintaining acceptable levels of efficiency, GaN-FET transistors are used. The converter acts on the Synchronous Buck scheme and converts 12 V to 1 V supporting 30 A of output current. The control is performed by the TPS53632 integrated circuit and three LMG5200 power stage integrated circuits are also used, both are manufactured by Texas Instruments. The tests performed with the converter demonstrates a peak efficiency of 85%, reducing to 70% at maximum load. In addition to the design of the converter, this paper addresses the losses calculation for a comparison between GaNFET and MOSFET based converters, the effects of using a high frequency switching, as well as techniques available to reduce these effects.

A single-phase GaN-based bridgeless PFC Boost converter design is proposed regarding multi-domain optimisation concepts. A design guideline describing elements losses are presented concerning the selected power converter topology. Experimental results are also depicted in 750 W power prototype digitally controlled by an FPGA device using switching frequency up to 500 kHz per active switch.

This paper presents a three-phase multilevel power factor correction (PFC) rectifier employing multistate switching cells. A generalized converter structure is presented based on the connection of switching networks of Vienna-type rectifier topologies through multiinterphase transformers (MIPTs). The resulting rectifier presents the intrinsic benefits to the employed building blocks and the ones added by a modular construction that enables the reduction of passive components and overall losses. The operation of the PFC rectifier is described, including appropriate modulation and control strategies. Design guidelines for the magnetic components are derived for the MIPTs, boost inductors, and power semiconductor devices. Finally, a lab prototype is used to present experimental results. This prototype is rated at 7.5 kW and uses a modular structure to assemble a four legs per phase rectifier. Efficiency above 98% from 40% load and IEC61000-3-2 requirements are observed.

Poly-phase systems have been used for many years in machines and recently in wind power generations. They usually are built by a dual three-phase system, shifted by 30 electrical degrees from each other and with no neutral connection. Typically, this system employs a twelve-pulse diode rectifier to converter ac to dc voltages. However, it may be improved if an active rectifier is used, because it can provide lower distortion in generator currents and regulated output voltage. Taking that into account, this paper proposes a six-phase active rectifier topology for a dual three-phase system. A stationary frame reference for six-phase system is applied to obtain the converter dynamic model in the αβ coordinates and thus a control strategy is proposed in this frame reference. The proposed topology, dynamic model and control strategy were verified by simulation for following specification: 12 kW, 220 V at input voltage and 800 V at the output voltage. The results were appropriated, providing a regulated output voltage, an input current with reduced harmonic distortion and thus high power factor.

Alternating current (ac) active electronic loads (AELs) based on pulsewidth modulation (PWM) converters, capable of emulating nonlinear loads, require effective current control techniques and power stages. These two aspects of an AEL are interdependent mainly due to the presence of electromagnetic compatibility filters to reduce electromagnetic emissions. However, the filter components affect the dynamics of the system. In this context, this paper proposes a digitally implemented control strategy comprising the state feedback, robust observer, phase-locked loop, and linear current controller to cope with ac AEL applications. The control-oriented modeling and the control system design are presented. Experimental results obtained from a 10-kW three-phase three-level PWM converter prototype illustrate and demonstrate the feasibility of the proposed AEL control strategy.

Novel simple indirect control concepts for an active power filter (APF) application are proposed here. The concepts are exemplarily presented to control a modified APF structure. The main advantage over other control strategies is the achieved excellent simplicity-to-performance ratio. The proposed control strategies are based on the concept of virtual impedance emulation to provide high power factor in a system. To validate the operating principle, a single-phase low-power prototype has been built and experimentally tested. This prototype operates at a remarkably low switching frequency of 5 kHz and is digitally controlled by a digital signal processor.

Poly-phase systems have been used for many years in machines and recently in wind power generations. Typically, this system employs diode rectifiers, however, it may be improved employing active rectifier. Considering it, this paper proposes a six-phase active rectifier topology controlled in synchronous frame reference. Results were validated by simulation.

A novel three-phase hybrid multilevel converter is proposed for medium-voltage applications. The converter employs a conventional three-phase voltage source inverter (VSI) linking series connected half-bridge modules at each phase. With the proposed connection, a large portion of energy can be processed by the VSI by employing a single multi-pulse rectifier, while smaller power shares are processed within the half-bridge modules. Thus, the requirements for galvanically insulated dc sources are reduced. Modularity is naturally achieved. A modulation scheme for a four-level version is proposed and analyzed in detail. This scheme allows unidirectional power flow in all dc sources and, consequently, enables diode bridges to be employed in the rectification input stage for unidirectional applications.

The single-phase multilevel power-factor correction rectifier employing multistate switching cells is analyzed regarding different operational aspects. The generalization of the number of switching states is performed in order to clarify issues such as the input current ripple, the output currents rms values, power semiconductor stresses, and others. A discussion on the optimal number of switching states is carried out, based on the generated models. In this context, this work is a first step aiming in the efficiency-based optimization of the concept.

Novel symmetric hybrid multilevel topologies are introduced for both single- and three-phase medium-voltage high-power systems. The topology conception is presented in detail, where a three-level switching cell with low component count, and its modulation pattern give the origin of the proposed converters. Voltage sharing and low output-voltage distortion are achieved. The theoretical frequency spectra are derived. Switching devices are separated into high- and low-frequency devices, generating hybrid converters. Five-level three-phase topologies are generated from only three insulated dc sources, while the number of semiconductors is the same as for the cascaded H bridge. Both simulation and experimental results are provided showing the validity of the analysis.

Almost two decades of research on unidirectional three-phase multilevel boost-type pulsewidth modulation (PWM) rectifiers have shown the benefits of employing this technology to comply with power quality standards while assuring high efficiency and low volume and weight. However, the unidirectional topologies directly derived from the conventional three-level bidirectional converters, such as the neutral point clamped (NPC), the flying capacitor and the cascaded H-bridge converters have not been properly analyzed. This letter introduces some of the unidirectional topologies that arise from the inspection of the widespread conventional bidirectional converters. Special emphasis is put in the analysis of the NPC-based three-phase/-level PWM rectifier operating as power factor corrector.

This paper presents the T-Type Zero Voltage Switching Pulse Width Modulated isolated DC-DC converter (TT-ZVS-PWM Converter). The proposed topology is composed of four switches. Two of these are subjected to the input voltage and the other two to half the input voltage. All switches commutate under zero-voltage. The proposed converter has the following in common with the Full Bridge Zero-Voltage Switching (FB-ZVS-PWM) and the Three-Level Zero-Voltage Switching (TL-ZVS-PWM) converters: (a) symmetrical operation of the isolation transformer, (b) modulation by pulse-width with constant frequency, (c) zero voltage switching, and (d) three-level voltage applied to the primary winding of the transformer. Theoretical analysis, design example and experimental data for a 3 kW, 400 VDC input, 60 VDC output, and 50 kHz switching frequency laboratory prototype, are included in the paper. Measured efficiency was 93% at full load and 95.2% at 1.2 kW.

Multilevel multistate switching cell-based rectifiers have been presented as interesting alternatives for modern power electronics applications. Due to their modular nature, it is possible to build such converters with various semiconductor legs, which results in different performance levels, assembly complexity and cost. This paper presents a theoretical evaluation of how the number of legs influences the semiconductor losses in two particular situations, where switching frequency and apparent frequency are paramount parameters in the design. Experimental results of a 1.5-kW single-phase multilevel multistate switching cell-based rectifier with two semiconductor legs are presented.

It is presented the study and simulation of a novel hybrids matrix converters (HMC) based on the Cuk AC-AC converter [17], mainly focused on residential wind power applications where the input voltage presents great variability in amplitude and frequency. The main feature of these circuits is their wide input voltage range, operating with a gain greater than unity. Furthermore, due to its hybrid feature, energy storage elements present low values. As a result, a voltage gain greater than unity is achieved, which is the main limitation of the current matrix converters (MC). Theoretical expressions shown through digital simulations on PSIM environment are validated.

The design expressions of an indirect matrix converter (IMC) and a Δ-Switch IMC are discussed in this work based on the specifications of a 10 kW motor drive system with 1.2 kV SiC power semiconductor devices. The conduction and switching losses models for both topologies are presented to be used in the dimensioning. The ΔIMC leads to a peak efficiency of 97.7% at a switching frequency of 20 kHz with power density of 2.88 kW/dm3.

This paper proposes a method for calculation of the instantaneous active and reactive power in six-phase system, derived from the Akagi three-phase instantaneous power theory, the proposed method is physical analyzed and the results are validated by simulation.

Targeting the rapid development, with reduced complexity, of power converters control techniques, a field-programmable gate array (FPGA) based platform is proposed. The aim of the platform is to provide an effective support to the developer in the error-prone process associated to a traditional FPGA design flow. This work also enables remote hardware reconfiguration, and networking monitoring of power converters.

This paper approaches the implementation of a control strategy with communication for three-phase four-wire VSI parallel connected, which is based on distributed control. The paper presents details of implementation of one control strategy that employs two loops, one voltage control and one parallelism control, all system is done on instantaneous values and the parallelism control shares only a voltage reference signal among the VISs. The strategy ensures power load shared among the inverters in steady-state and a fast dynamic response during connection or disconnection of VSI and load step. The control system was implemented in a TMS320F28069 DSP and verified in two 2 kVA VSI parallel-connected.

This paper presents a nonisolated multilevel buck+boost dc-dc converter suitable for high voltage and high power application. It is composed by a Buck-type and a Boost-type converters, both multilevel and bidirectional. The main features of proposed converter are: reduced voltage stress across the semiconductors, allowing its use in high voltage; bidirectional power flow; frequency operation of the inductor is a multiple of the switching frequency, reducing the volume of magnetic component. This paper focuses on the five-level structure of the proposed converter, in which the theoretical analysis is carried out and discussed. In order to validate the theoretical analysis, a prototype with 10 kW output power capability, 1 kV to 750 V input-to-output voltage and 20 kHz of switching frequency was constructed and experimented. The results attest the advantages of the new dc-dc topology and it is reported herein.

This paper presents an complete investigation of an active capacitor voltage balancing strategy for multilevel dc-dc converter. The proposed technique may be applied to various dc-dc converters, such as the well-known flying-capacitor converter. The voltage balancing analysis is carried out for a five level dc-dc converter, in which the small-signal modeling is realized. The obtained converter mathematical model presents cross-coupling among the variables, as well as the dependence of the load current. Thus, a control strategy is proposed in this paper, in which incorporates a decoupling action. Besides that, a feedforward technique is used to eliminate the dependence of load current of the converter model, improving the performance of the closed loop system in light load. In order to demonstrate the performance of proposed capacitor voltage balancing control loop, it was applied to a 5-level dc-dc converter and experimental results are reported herein. The results attest the advantages of the proposed capacitor voltage balancing control.

This paper describes a theoretical and experimental study on a digital communication system, which is employed in a control strategy for parallelism of three-phase voltage inverter (VSI). This control strategy only needs that all VSIs use a same voltage reference and thus it ensures the sharing of the load current and avoids current circulation among the inverters during transient and steady-state operation. Therefore, the communication among the inverter is implemented to transmit only the voltage reference. The paper proposes this communication system based on two bus, one that uses the own electrical grid and is called of Voltage Reference bus and another makes by CAN bus. The first puts the reference voltage of all inverters in synchronism and the second keeps the reference voltage in synchronism even during a fault of electrical grid. The proposed system was digitally implemented in a TMS320F2812 DSP and was verified through experimental results with a 10 kVA prototype, which has the parallel operation of two three-phase VSIs.

Multistate switching cells-based multilevel rectifiers (MLMSR) are a promising technology in power factor correction applications. They are here arranged in a modular structure that is the basis for a Power Electronics Building Block (PEBB). By the implementation of the multi-interphase transformers (MIPT) in a “whiffletree” configuration, multiple cells can be structured in a way that virtually any number of PEBBs can be used to increase a converter rated power. This work presents the conception and development of such a PEBB exemplarily for multi state switching cells multilevel based rectifiers. The proposed PEBB is presented and two lab prototypes are built. Experimental results are presented.

Even more the needs of efficiency and productivity are required in industrial processes. Medium and high voltage inverter topologies are used in high scale industrial processes to achieve these goals. This work presents two variants of a modified hybrid symmetrical multilevel inverter topology based in [8] using Half Bridge commutation cells, proper to use in medium voltage levels. These topologies are able to create a 7-level phase-voltage waveform and a 13-level line-voltage waveform. A reduction in the number of switches and isolated sources is achieved when compared to traditional multilevel topologies, specially the cascaded topologies. A low power prototype was assembled using a programmable device (FPGA) and a modular platform developed to test new topologies.

A discrete control design of a single phase PFC boost converter with FPGA is presented. The average current mode control (with current reference) and Self Control (without current reference) are analyzed when implemented with discrete hardware controller. Simulation and experimental results are shown to verify the performance of both controllers. (5 pages)

The one cycle control (OCC) technique has been implemented in power electronics boost converters by analog controllers. In discrete time control system the OCC is rarely used. The main obstacle is the discrete resetable integrator implementation in numeric processor and the limit-cycle caused by discrete-time control system. The digital control in power electronics is a trend, due to various advantages over the analog control. The noise immunity, flexibility in the implementation of control law and parametric invariability are some of many benefits to use digital control. Although, there are some limitations and characteristics should be considered to design the control system. In fact, exactly the inherent discrete-time characteristics are the limitation to implement of OCC technique by digital control. The discrete-time resetable integrator, used in OCC technique, is the main obstacle to experimental implementation. The numeric resolution limitation and consequently duty cycle error can exhibit instability in operation, alike when the converter is lightly loaded. Therefore in this paper, a new approach to implement the discrete-time One Cycle Control PWM modulator is proposed into a single-phase PFC boost converter. The OCC is implemented in FPGA in hardware description language. Simulation results are presented to validate the proposed OCC PWM modulator.

This paper presents a novel symmetrical hybrid multilevel inverter for applications aiming at high power densities and high resolution of the output voltages. This proposal is the connection of a given number N of switching three levels cells consisting of semiconductor devices connected in parallel through multi-interphase transformers. This arrangement provides a balanced distribution of currents, thus, increasing the power density and providing an output voltage with high number of voltage levels. Therefore, the harmonic contents of the voltages applied to a given load are small. The achieved output voltages are analyzed by means of the Fourier series for a given number N of cells connected in parallel. Simulation results illustrate the operational principles of the proposed converter concept.

With the current quest for ever more efficient, smaller and better power converters, the role of the power semiconductors becomes very important. Increasing switching frequencies seems key to the development of this area. This is based on the steady development of semiconductor switching devices, in which switching losses is perhaps the most important figure in the mentioned context. Thus, the accurate characterization of such losses leads to optimized converter designs. This work presents the practical development of a flexible test system that aims in the reduction of lab test time to perform switching losses measurements.

Converters aiming at high power density and efficiency require an optimized design of their constituent components. In this context, the detailed knowledge of the harmonic spectrum generated by the converter is very important in order to design EMC filters and passive components. This work presents a theoretical analysis of the input voltage generated by multi-state switching cells-based single-phase multilevel rectifiers, including its harmonic contents. The proposed study is supported by simulation and experimental results.

Rectifiers employing multi-state switching cells concepts are promising alternatives for high power, high power density and high efficiency applications. Multi-state switching cells-based multilevel three-phase PWM rectifiers (MLMSR) require proper modulation strategies to operate. Several modulation strategies are applicable to such rectifiers. However, each modulation strategy leads to a given set of performance indicators. These include differential- (DM) and common-mode (CM) electromagnetic emissions, voltage gain, passive components physical dimensions and power semiconductor efforts. This work introduces the fundamental analysis of a MLMSR. Additionally, three carrier-based modulation patterns are evaluated with respect to the common mode voltage generation, input current ripple, multi-interphase transformer magnetizing current and the current through the dc-link midpoint. Finally, simulation results are presented in order to highlight the characteristics of each modulation strategy for two MLMSR configurations.

The Hybrid Cascaded Half-Bridge (HC½B) converter is a multilevel circuit topology that is able to replace a Hybrid Cascaded H-Bridge (HCHB) converter regarding voltage vector generation, modularity and other features. However, there is not a complete correspondence between the converters since they present different operation principles. This work presents a comparison between the (HC½B) and the (HCHB). The converters are analyzed in their four-level versions, but the results are valid for other configurations. The comparison comprehends the power semiconductors, the generated voltages, the isolated dc supplies and the dc-link capacitors. It is shown that the main differences are with the dc link capacitors. Thus, these are analyzed in detail and a modeling procedure to design and compare them is proposed.

This paper presents the experimental results of a proposed system of energy sources integration in which the TAB converter serves as interface. In TAB converter, a transformer serves to magnetically link the converters. Besides the advantage of galvanic isolation, this topology easily affords different levels of voltages on its ports. This can be done by the proper choice of the turns ratio of the transformer windings and suitable adjustment. The proposed system has a load, a main source of voltage and an auxiliary power source formed by a photovoltaic panel and a Sepic converter that is used with MPPT for PV panel. The MPPT of the PV panel is made with the method of constant voltage. It is observed a smooth exchange of power between the ports. The current in the system has good behavior, even without control. The proposed system can be used in UPS and micro-grids.

Matrix converters have been considered as one of the future converter concepts for renewable energy applications, due to higher power density and efficiency. Typically, these converters are employed in voltage step-down operation mode, e.g. variable speed drives. In this paper, the voltage step-up operation mode is analyzed for the indirect matrix converters. Simulations results demonstrate the performance of the analyzed system.

This work presents a novel five-level hybrid Half-Bridge/ANPC multilevel inverter. Along with the switching states possibilities, employed modulation techniques, conduction losses analysis, and simulation results from a three-phase topology, it is presented the experimental results from a monophasic structure, operating with 1020Hz switching frequency, output frequency of 60Hz, phase output voltage of 220Vrms, output power of 2.3kW and power factor of 0.92. From the presented results, it can be noticed the reduced losses and better harmonic content.

Normally, one cycle control (OCC) technique is implemented in PFC boost converters by analog controllers and rarely in discrete-time systems. In this paper, a discrete-time OCC PWM modulator is proposed to single-phase PFC boost converter. The discrete-time control system is implemented in FPGA. Simulation and experimental results validate the analyses.

The FPGA device is an IC that can be programmable by software, to implement any logical function. Its inner architecture offers possibility to execute complex algorithms, even some parts running in parallel, improving law control dynamics. In consequence, the FPGA can control power electronics converters successfully. The several segments of the converter control are connected and synchronized by a state machine. Thus, this paper proposes a design of a synchronous state machine to control a PFC boost converter with FPGA. The communication between FPGA and ADC is implemented by SPI communication. The controllers and PWM modulator are build in FPGA to control the converter. Experimental results show the mains signals of state machine and also the boost converter in operation.

Ac electronic loads are of interest in applications such as loss measurements in distribution transformers and small generators, UPS testing and other. In order to achieve high control bandwidth to inject current harmonics, it is important that EMC filters use small value passive components. Based on this requirement, three-level regenerative rectifiers are able to achieve better performance than two-level ones. Two candidate topologies for the implementation of a high performance 3.5 kW regenerative rectifier operating as ac electronic load are compared with respect to achievable efficiency numbers. Both topologies present the same external characteristics. The operation of the topologies is briefly reviewed in order to compute current efforts across the power devices. Based on which the losses for the converters are estimated along with their efficiency.

A novel hybrid three-phase multilevel converter is proposed for medium-voltage applications. The converter employs a conventional three-phase voltage source inverter (VSI) linking series connected half-bridge modules at each phase. With the proposed connection, a large portion of energy can be processed by the VSI without the need for insulation or by employing a single transformer, while smaller power shares are processed within the half-bridge modules. Thus, the requirements for galvanically insulated dc sources are reduced. Modularity is naturally achieved. A modulation scheme for a four-level version is proposed and analyzed in detail. This scheme allows unidirectional power flow in all dc sources and, consequently enables diode bridges to be employed in the rectification input stage for unidirectional applications.

This paper shows a comparison between two different control strategies to the bidirectional rectifier with high power factor. The same hardware was applied during the tests for both control techniques and with the controllers implemented on Texas TMS320F2812 DSP. Besides the techniques, this paper will focus on the differences to carry out the controllers and in the results for each applied methodology.

Power quality disturbances, such as voltage sags and instantaneous power interruptions, are probably the most frequent and damaging phenomenon in industrial environments. Thus, to improve the sustainability of electrical equipment, the power supplies should tolerate these disturbances. The PFC boost converter operating in CCM is exhaustively used as a first-stage in the power supplies. The average current mode control is the most popular technique and implemented with analog or discrete-time controllers. However, at instantaneous power interruption, the inner controllers go to saturation mode. Consequently, the switching device (MOSFET), of the converter, might be permanently damage when the power returns after voltage interruption. Another current control technique is self-control. In this case, the dynamics controllers are different. Therefore, this paper investigates the operation of the converter at instantaneous power interruption. The average current mode control and self-control are analyzed. Protection strategy is implemented, by FPGA, in a single-phase CCM PFC boost converter. Simulation and experimental results confirm and validate the analysis.

This paper presents the difficulties encountered and alternatives found in the implementation of algorithms based on CSV-PWM (Centered Space Vector PWM) and PD-PWM (Phase Disposition PWM), applied to three-phase multilevel inverters, using the TMS320F2812 DSP. Some limitations such as the number of available comparators, the absence of a level disposition or a phase disposition, and the adjustment possibilities, made this task challenging and required the development of new strategies to deal with these limitations.

The single-phase three-level PFC rectifier employing multi-state switching cells is modeled regarding different operational aspects. The generalization of the number of switching states is performed in order to clarify issues such as the input current ripple, the output currents RMS values, semiconductor efforts and others. A discussion on the optimal number of switching states is carried out, based on the generated models. In this context, this work is a first step aiming in the efficiency based optimization of the concept.

The newly introduced Symmetrical Hybrid Multilevel (SHM) inverter is analyzed in this paper. Topics covered in this study include a brief presentation of the topology, dc link voltage balance and a comparison with other multilevel topologies by means simulations. Part count, loss distribution and installed switch power are considered. Experimental results of the dc link balance in a 300W/200Vdc 1-phase prototype are exposed. Results indicate a naturally balanced voltage in the dc link capacitors, a rather simple topology compared to other 5-level converters and the highest efficiency among the analyzed converters for line voltages of 6 kV at switching frequencies under 750 Hz.

Recently, power quality disturbances such as voltage sags and instantaneous power interruptions are, probably, the most frequent and damaging phenomenon in industrial environments. Thus, to improve the sustain-ability of electrical equipment, the power supplies should tolerate these disturbances. The PFC boost converter operating in CCM is exhaustively used as a first-stage in power supplies. The average current mode control is the most popular technique and is usually implemented by IC UC3854. However, at instantaneous power interruption, the inner controllers go to saturation mode. Consequently, the switching device (MOSFET) of the converter might be permanently damage when the power returna after voltage interruption. Another current control technique is self-control. In this case, the dynamics controllers are different. Therefore, this paper investigates the operation of the converter at instantaneous power interruption. The average current mode control and self-control are analyzed. Protection strategy is implemented, by FPGA, in a single-phase CCM PFC boost converter. Simulation and experimental results confirm and validate the analysis.

This article discusses the application of the NIOS II processor in a PFC converter. This processor was provided by ALTERA to be implemented in FPGA. The FPGA is capable of a parallel processing and hardware modification, and also offers the possibility of microprocessor implementations, which can be programmed in Assembly or C. The NIOS II is a versatile embedded processor family that has a high performance and was created for FPGA. This processor family consists of three processor cores that implement a common instruction set architecture, each optimized for either a specific cost or performance, and all supported by the same software tools. The NIOS II Processor propitiates flexibility such as: selecting the exact set of CPUs, peripherals, and interfaces, accelerating only relevant functions and eliminating the risk of processor obsolescence. The focus of this paper is the use of this processor applied to the digital control of a single-phase pre-regulated rectifier, showing the advantages and disadvantages of the use of this technology. The control strategy used aims to obtain Power Factor Correction (PFC) of a single-phase voltage doubler rectifier with a center tap at the voltage output. The FPGA used in this study is an ALTERA Cyclone II EP2C35F672C6.

This article presents the study of an alternating voltage indirect conditioner, showing the main aspects of its digital control using multiple loop control to regulate and match the output voltage. The objective of this study was to verify the operation of a line conditioner when subjected disturbances, using a digital PLL to generate the reference. The generation of the sinusoidal reference for the output voltage control loop is discussed and digital PLL (DPLL) based on the three-phase instantaneous power theory is proposed. The advantage of the use of a PLL in this work, as a reference, is due to it being immune to variations and disturbances from the mains, being sensitive to the frequency variation that enables the fundamental component of the voltage to be monitored. The conditioner control is based on the concept of multi-loop, one being to control the output voltage RMS value and other for the pre-feeding of the input voltage. Simulation and experimental results obtained with a 3kVA conditioner are presented.

Risks of energy shortage and control of greenhouse gases emission increase the demand for high efficiency power conversion. Power quality standards require electronic equipment with power factor correction. This adds an extra conversion stage that decreases overall efficiency. Therefore, research on PFC converters with high efficiency is paramount for power conversion equipment. This work proposes new concepts that make use of multilevel topologies and multi-state switching cells in order to improve the efficiency of PWM rectifiers. Analytical and experimental analysis are provided in order to validate this objective.