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The article presents an analysis of a review of world literature on the diagnosis and treatment of critical lower limb ischemia (CLLI). The concepts and nature of critical lower limb ischemia are analyzed in detail. The main modern examination methods are described, in particular, the assessment of blood circulation through large and peripheral vessels. The work also reflects the modern principles of complex conservative treatment using vasoconstrictive drugs to a new generation of angioprotectors in combination with intravenous laser blood irradiation (ILBI).

Objective: Conduct an analysis of the clinical-epidemic process of HIV infection amongst the population and convicted individuals, and the development of the preventive measures to persons in the risk groups. Methods: 3000 maps of epidemiological survey of the nidus of HIV-infection viruses among the population were analyzed, including 500 maps of the epidemiological survey amongst convicted for 2007-2012 periods, and 1 342 043 of express-testing of HIV-infection among the population, including 37 417 amongst convicted were conducted. As a result, 752 HIV-positive people were identified, of whom 356 were among those convicted. Results: The epidemic mostly affected people aged 20-39 (83%) of the total number of HIV-infected people registered in 2012 among the civilian population. As of July 1, 2008, the share of the sexually transmitted diseases, according to registration, accounted for 25.1% of cases, in 2012 – 30.1 %, in 2016 – 42.4%. In penitentiary institutions, among injected prisoners in 2012 was 92.3%, and the sexual way – 7.0%, and in 2016 – 91.2% and 7.5% respectively. Conclusion: Comparison data on the incidence of HIV infection among the population of the Republic of Tajikistan with registered data amongst convicted established essential distinctions. Counteraction is the priority of the HIV/AIDS agents and methods of non-specific prevention. Providing the risk group with information on the character of the behavior associated with HIV transmission, its change over time in certain areas improves the prognosis of the spread of HIV infection and allows analyzing the effectiveness of preventive and anti-epidemic measures. Keywords: HIV infection, HIV/AIDS, epidemiological surveillance, penitentiary system.

Traditional speedup models, such as Amdahls, facilitate the study of the impact of running parallel workloads on manycore systems. However, these models are typically based on software characteristics, assuming ideal hardware behaviors. As such, the applicability of these models for energy and/or performance-driven system optimization is limited by two factors. Firstly, speedup cannot be measured without instrumenting the original software codes, and secondly, the parallelization factor of an application running on specific hardware is generally unknown. In this paper, we propose a novel method, whereby standard performance counters found in modern many-core platforms can be used to derive speedup without instrumenting applications for time measurements. We postulate that speedup can be accurately estimated as a ratio of instructions per cycle for a parallel manycore system to the instructions per cycle of a single core system. By studying the application instructions and system instructions for the first time, our method leads to the determination of the parallelization factor and the optimal system configuration for energy and/or performance. The method is extensively demonstrated through experiments on three different platforms with core numbers ranging from 4 to 61, running parallel benchmark applications (including synthetic and PARSEC benchmarks) on Linux operating system. Speedup and parallelization estimations using our method and their extensive cross-validations show negligible errors (up to 8%) in these systems. Additionally, we demonstrate the effectiveness of our method to explore parallelization-aware energy-efficient system configurations for many-core systems using energy-delay-product based formulations.

Trade-offs between extra-functional properties, such as performance, reliability and resource utilisation, have been recognised as crucial in system design. The concept of Holistic Fault Tolerance (HFT) is aimed at targeting these trade-offs in run-time system control. Previous work has shown that HFT systems can have significant complexity, which may require sophisticated modelling at the design stage. This paper presents a novel HFT design methodology based on hierarchical modelling and stochastic simulations. The former caters to system complexity and the latter estimates extra-functional properties in the trade-offs. The method is demonstrated with an application example of number plate recognition software.

This article studies the interplay between the performance, energy, and reliability (PER) of parallel-computing systems. It describes methods supporting the meaningful cross-platform analysis of this interplay. These methods lead to the PER software tool, which helps designers analyze, compare, and explore these properties. The web extra at https://youtu.be/aijVMM3Klfc illustrates the PER (performance, energy, and reliability) tool, expanding on the main engineering principles described in the article.

With the increase of system complexity in both platforms and applications, power modelling of heterogeneous systems is facing grand challenges from the model scalability issue. To address these challenges, this paper studies two systematic methods: selective abstraction and stochastic techniques. The concept of selective abstraction via black-boxing is realised using hierarchical modelling and cross-layer cuts, respecting the concepts of boxability and error contamination. The stochastic aspect is formally underpinned by Stochastic Activity Networks (SANs). The proposed method is validated with experimental results from Odroid XU3 heterogeneous 8-core platform and is demonstrated to maintain high accuracy while improving scalability.

Modern embedded systems execute multiple applications, both sequentially and concurrently. These applications are exercised on heterogeneous platforms generating varying power consumption and system workloads (CPU or memory intensive or both). As a result, determining the most energy-efficient system configuration (i.e. the number of parallel threads, their core allocations and operating frequencies) tailored for each kind of workload and application scenario is extremely challenging. In this paper, we propose a novel runtime optimization approach with the aim of achieving maximized power normalized performance considering dynamic variation of workload and application scenarios. Fundamental to this approach is a comprehensive study to investigate the tradeoffs between inter-application concurrency with performance and power consumption under different system configurations. Using real experimental measurements on an Odroid XU-3 heterogeneous platform with a number of PARSEC benchmark applications, we model power normalized performance (in terms of IPS/Watt) underpinning analytical power and performance models, derived through multivariate linear regression (MLR). Using these models, we show that with increasing number of concurrent CPU intensive applications show variable gains in IPS/Watt compared to the memory intensive applications in both sequential and concurrent application scenarios. Furthermore, we demonstrate that it is possible to continuously adapt system configuration through a low-cost and linear-complexity runtime algorithm, which can improve the IPS/Watt by up to 125% compared to the existing approach.

The interplay between pairs of critical factors such as performance, energy and reliability within modern computing systems has always been an interesting topic of study. However, studying the interplay of all three factors together in a many-core, multi-layer design setting has been a relatively recent undertaking. This work explores the practical problems encountered in such studies and introduces the modelling framework ArchOn, which is based on a novel resource-driven graph representation. ArchOn facilitates the analysis and potentially design and synthesis of systems whose design domains are more conveniently organized into multiple layers or levels (e.g. application, OS, hardware, etc.) and potentially large scale and diverse types of concurrency. The layer-agnostic formalism helps designers reason about cross-layer issues and the resource-driven approach is advantageous for reasoning about such issues as energy and time. Example single- and multi-core case studies help explain and illustrate the method.

In this paper we continue work to investigate how we can engage young adults in behaviors of recycling and the prevention of food waste through social media and persuasive and ubiquitous computing systems. Our previous work with BinCam, a two-part design combining a system for the collection of waste-related behaviors with a Facebook application, suggested that although this ubiquitous system could raise awareness of recycling behavior, engagement with social media remained low. In this paper we reconsider our design in terms of engagement, examining both the theoretical and practical ways in which engagement can be designed for. This paper presents findings from a new user study exploring the re-design of the social media interface following this analysis. By incorporating elements of gamification, social support and improved data visualization, we contribute insights on the relative potential of these techniques to engage individuals across the lifespan of a system’s deployment.

The purpose of secure devices such as smartcards is to protect secret information against software and hardware attacks. Implementation of the appropriate protection techniques often implies non-standard methods that are not supported by the conventional design tools. In the recent decade the designers of secure devices have been working hard on customising the workflow. The presented research aims to collect the up-to-date experiences in this area and create a generic approach to the secure design flow that can be used as guidance by engineers. In the presented paper the emphasis is put on multi-valued logic synthesis and asynchronous system design. The proposed flow employs the tool based on higher radix and mixed radix Reed-Muller expansions, power-balanced logic component libraries and TiDE design environment. The challenge of the research here is interfacing between different EDA tools and technologies. An example is also presented and described from the view of the system designer.