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With the current global energy crisis, the renewable energy shows a great development potential, in which the wind power generation is one of the most sophisticated means of power generation in technology. How-ever, for the doublyfed-induction-generator-based (DFIG-based) wind generation system, the grid voltage harmonics will result in the severe power oscillation, electromagnetic torque ripple and the grid current distortion since the stator is connected to the grid directly. In this paper, a novel control algorithm, which mainly includes two parts: one is the advanced phase-locked loop (APLL) and the other is the harmonics voltage compensation algorithm (HVCA), is proposed to eliminate the harmful effect caused by the grid voltage harmonic. The APLL part is applied to extract the amplitude and phase of each harmonic in the power grid, then the extracted amplitude and phase are fed to the HVCA part to control the LCL-type inverter to generate the harmonic compensation voltage, which shows the same amplitude but the opposite phase with the grid voltage harmonics. Finally, the harmonic compensation voltage is fed into the grid voltage through the series transformer which is cascaded between stator and grid. The simulation results are carried out to verify the effectiveness of the proposed control algorithm.

The moving average filter (MAF) is widely utilized to improve the disturbance rejection capability of the phase-locked loops (PLLs), which is of vital significance for the grid-integration and stable operation of power electronic converters to the electric power systems. However, the open-loop bandwidth is drastically reduced after incorporating MAF into the PLL structure, which makes the dynamic response sluggish. To overcome this shortcoming, some new techniques were proposed recently to improve the transient response of MAF-based PLLs. In this paper, a comprehensive performance comparison among the advanced MAF-based PLL algorithms is presented, which includes HPLL, MPLC-PLL, QT1-PLL, and DMAF-PLL. Various grid voltage disturbance scenarios, such as grid voltage sag, voltage flicker, and harmonics distortion, phase-angle and frequency jumps, DC offsets and noise, are considered to experimentally test the dynamic performances of these PLL algorithms. Finally, an improved positive sequence extraction method for HPLL under frequency jumps scenario is presented to compensate the steady-state error caused by the non-frequency adaptive DSC, and a satisfactory performance has been achieved.

The orthogonal signal generator based phase-locked loops (OSG-PLLs) are among the most popular single-phase PLLs within the areas of power electronics and power systems, mainly because they are often easy to be implement and offer a robust performance against the grid disturbances. The main aim of this paper is to present a survey of the comparative performance evaluation among the state-of-the-art OSG-PLLs (include Delay-PLL, Deri-PLL, Park-PLL, SOGI-PLL, DOEC-PLL, VTD-PLL, CCF-PLL, and TPFA-PLL) under different grid disturbances such as voltage sags, phase and frequency jumps, and in the presence of dc offset, harmonic components, and white noise in their input. This analysis provides a useful insight about the advantages and disadvantages of these PLLs. The performance enhancement of Delay-PLL, Deri-PLL, and CCF-PLL by including a moving average (MAF) filter into their structure is another goal of this paper.

Several advanced phase-lock-loop (PLL) algorithms have been proposed for single-phase power electronic systems. Among these algorithms, the orthogonal signal generators (OSGs) are widely utilized to generate a set of in-quadrature signals, owing to its benefit of simple digital implementation and low computational burden. Meanwhile, some other techniques have been proposed to enhance system robustness and stability characteristics. In this paper, a comprehensive comparison among the OSG-based PLLs and the advanced single-phase PLLs is presented when the grid voltage undergoes disturbances, and the performance comparison of transient response and disturbance rejection capabilities are presented. Finally, the moving average filter (MAF) is applied to enhance steady state and dynamic response of the delayed-type PLL, derivator-based PLL and the complex-coefficient filter (CCF-PLL) under grid frequency variations, harmonics and white noise contamination scenarios.

The phase-locked loop (PLL) algorithms are of crucial significance for the stable operation and effective grid-integration of power converters and renewable energy systems. In this paper, a comprehensive analysis and performance comparison is presented on the detection performance for three PLLs (NTD-PLL, DCOC-PLL and TPFA-PLL) under grid voltage disturbances, such as phase jump, frequency step change, voltage sag, harmonics, dc offset scenarios and noise. Through theoretical analysis and digital simulations, it is found that the NTD-PLL has the best performance under frequency step change scenario, and under dc offset scenario, the DCOC-PLL would be a good choice. For the TPFA-PLL, a strong harmonic immunity is realized due to the application of the moving average filter (MAF). Besides, the small-signal models of the three PLLs are proposed in this paper. The stability analysis, PI parameters design guidelines of the PLLs are presented as well. Finally, the simulation results are presented to validate the effectiveness of the theoretical analysis.