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The paper presents a method for the improvement of product reliability based on screening at the wafer fabrication stage, which is time and money saving for manufacturer. It relates to the manufacture of automotive rectifier diodes in DO21 case. The aim was to establish a mechanical screening procedure based on the correlation between the resistance to applied pressure of glass passivated chips and the results of standard reliability RTV test (rapid thermal variations).

The paper presents a method for the estimation of product reliability based on tests performed at the chip fabrication stage, which is time and money saving for manufacturer. It relates to the manufacture of automotive rectifier diodes in DO21 case. The aim was to establish to a correlation between the pressure resistance of chips and the results of standard reliability test, RTV (rapid thermal variations).

A low cost and reliable glass passivated structure for 35 Arms thyristors has been manufactured using sealed tube diffusions, mesa etching from both sides of the wafer and a lift-off metallisation technique. Best trade-off I/sub G_T_/d/spl nu//dt performance has been designed using two dimensional simulation of triggering mechanisms, followed by experimental validation of calculated values.

An optimization of the double diffusion process performed with B-Al and P paint-on sources is presented. An increase of the yield by 25-35% for the fabrication of the power rectifier diodes having V/sub BR/spl ges//1200V is obtained. The work was carried out within the frame of CALIST National Program.

The authors developed a computer modeling program which solves the one-dimensional heat flow problem for a sequence of layers of material; dissipated power waveform is input in the form of an analytical function of time and junction temperature; heat flow at the borders may be given as constant temperature or zero gradient (or any combination thereof). The program was used to simulating as closely as possible medium power automotive suppresser diodes currently produced in Baneasa, under real pulse-test conditions. Predicted temperatures have been found to agree with experimental findings, and suggest as a possible failure trigger mechanism the melting of the solder a the pellet-substrate interface.

Statistical analyses were used to build an efficient reliability monitor for power semiconductor devices. Benefits for the device manufacturing are obtained.

The investigation reported in this work was focused on the main characteristics of the recently developed two interdigitation level (TIL) gate turn-off (GTO) thyristors, which use neither lifetime killers nor anode shorts. The advantages of these TIL GTO's with low on-state losses are outlined in comparison with their identical, yet gold-doped, counterparts. It is shown that, except for the turn-off time, the main electrical characteristics of TIL GTO's using no induced recombination centers are superior to those of similar gold-doped devices. The current-handling capability of the former under tough electrothermal ratings is also better than that of gold-doped devices up to a commutation frequency of 5 kHz. The results of this work demonstrated that sought-for benefits could be obtained in TIL GTO's which use neither induced recombination centers nor anode shorts.

Based on the advanced three-transistor model of the two interdigitation levels (TIL) GTO thyristor structure, the theory underlying the device behavior in the ON-state is developed and experimentally validated. The mechanisms underlying the current balancing between the two p-n-p-n sections (standard and quasi-nonregenerative) constituting the TIL GTO structure are disclosed. It is shown that thanks to the current balancing, the effective cathode emitter area increases with the anode current level and that the current density along the standard p-n-p-n sections lags behind the level of load current i T . The broad implications of reported theoretical/experimental results for the physics of the novel device are outlined in the communication. It is shown, e.g., that current balancing is responsible for the drastic boost of the peak interruptable anode current I ATO reported for the recently developed TIL GTO thyristors.

This work reports the results obtained in the implementation of the novel two interdigitation level (TIL) gate-cathode configuration in high-voltage (2000 V), high-current (600 A), gate turn-off (GTO) thyristors. It is shown that the implementation of the TIL concept in high-power GTO's, while relaxing the trade-off between the doping/ width of the p base and the main electrical parameters, offers a fair balance between manufacturability ease/cost effectiveness and overall device performance. A distinct benefit obtained through the implementation of the TIL pattern in high-power GTO's is expressed by the ability of devices with an active area of only 1.7 cm2to safely switch off an anode current of 600 A with a practically usable operational turn-off gain G off of 5-8. The low on-state voltage drop of gold-doped, high-power TIL GTO's is accompanied by a high nonrepetitive surge current capability. The trial devices possess a good latching/turn-on sensitivity accompanied by an immunity to noise (high dV/dt capability).

The research reported in this work was focused on the turnoff performance of trial high-power gate-assisted turn-off thyristors (GATT's) based upon the novel double-interdigitated or two interdigitation levels (TIL) gate-cathode concept. The experiments were performed on high-voltage (2000 V) devices which were driven up to an anode current of i_{T} = 500 A. The test TIL GATT's were both gold-doped and normal (nongold,diffused). The investigations have shown that the application of a negative gate current of only 4 A leads to a reduction of the turn-off time i q by a factor of 3 and 4-4.5 in gold-doped and normal devices, respectively, at T j = 100°C. At constant gate current, the dependence of t q on the anode current level t T was found relatively weak. The additional experimental data provided in this work show clearly that sought-for benefits could be achieved by implementing the TIL pattern in power GATTs.

The development of ultrahigh voltage (> 3500 V), high current (> 1000A), 3.6cm2 area double-interdigitated (TIL) gate-assisted turnoff thyristors (GATTs) exhibiting a reduced turnoff time by a factor of more than two with a gate-assist of only 1A and having excellent overall electrical performance is reported.