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Availability of high-quality, large diameter SiC wafers in quantity has bolstered the commercial application of and interest in both SiC- and nitride-based device technologies. Successful development of SiC devices requires low defect densities, which have been achieved only through significant advances in substrate and epitaxial layer quality. Cree has established viable materials technologies to attain these qualities on production wafers and further developments are imminent. Zero micropipe (ZMP) 100 mm 4HN-SiC substrates are commercially available and 1c dislocations densities were reduced to values as low as 175 cm-2. On these low defect substrates we have achieved repeatable production of thick epitaxial layers with defect densities of less than 1 cm-2 and as low as 0.2 cm-2. These accomplishments rely on precise monitoring of both material and manufacturing induced defects. Selective etch techniques and an optical surface analyzer is used to inspect these defects on our wafers. Results were verified by optical microscopy and x-ray topography.

DC characteristics and reverse recovery performance of 4H-SiC Junction Barrier Schottky (JBS) diodes capable of blocking in excess of 10 kV with forward conduction of 20 A at a forward voltage of less than 4 V are described. Performance comparisons are made to a similarly rated 10 kV 4H-SiC PiN diode. The JBS diodes show a significant improvement in reverse recovery stored charge as compared to PiN diodes, showing half of the stored charge at 25°C and a quarter of the stored charge at 125°C when switched to 3 kV blocking. These large area JBS diodes were also employed to demonstrate the tremendous advances that have recently been made in 4H-SiC substrate quality.

Recent advances in PVT c-axis growth process have shown a path for eliminating micropipes in 4HN-SiC, leading to the demonstration of zero micropipe density 100 mm 4HN-SiC wafers. Combined techniques of KOH etching and cross-polarizer inspections were used to confirm the absence of micropipes. Crystal growth studies for 3-inch material with similar processes have demonstrated a 1c screw dislocation median density of 175 cm-2, compared to typical densities of 2x103 to 4x103 cm-2 in current production wafers. These values were obtained through optical scanning analyzer methods and verified by x-ray topography.

We review the progress in the industrial production of SiC substrates and epitaxial layers for high power semiconductor devices. Optimization of SiC bulk growth by the sublimation method has resulted in the commercial release of 100 mm n -type 4H-SiC wafers and the demonstration of micropipe densities as low as 0.7 cm−2 over a full 100 mm diameter. Modelling results link the formation of basal plane dislocations in SiC crystals to thermoelastic stress during growth. A warm-wall planetary SiC-VPE reactor has been optimized up to a 8×100 mm configuration for the growth of uniform 0.01–80-micron thick, specular, device-quality SiC epitaxial layers with low background doping concentrations of p - and n -type doping from ∼1×1015 to >1×1019 cm−3. We address the observed degradation of the forward characteristics of bipolar SiC PiN diodes [H. Lendenmann, F. Dahlquist, J.P. Bergmann, H. Bleichner, C. Hallin, Mater. Sci. Forum 389–393 (2002) 1259], and discuss the underlying mechanism due to stacking fault formation in the epitaxial layers. A process for the growth of the epitaxial layers with a basal plane dislocation density

In recent years SiC has metamorphisized from an R&D based materials system to emerge as a key substrate technology for a significant fraction of the world production of green, blue and ultraviolet LEDs. Emerging markets for SiC homoepitaxy include high-power switching devices and microwave devices. Applications for heteroepitaxial GaN-based structures on SiC substrates include lasers and microwave devices. In this paper we review the properties of SiC, assess the current status of substrate and epitaxial growth, and outline our expectations for SiC in the future.

The current status of SiC bulk growth is reviewed, while specific attention is given to the effect of defects in SiC substrates and epitaxial layers on device performance and yield. The progress in SiC wafer quality is reflected in the achievement of micropipe densities as low as 0.92 cm−2 for a 3-inch n-type 4H-SiC wafer, which provides the basis for a high yielding fabrication process of large area SiC power devices. Using a Murphy Probe Yield Analysis for the breakdown characteristics of 10 kV PiN diodes we have extracted an “effective” defect density for 4H-SiC material to be as low as 30 cm−2, providing valuable information to further isolate and address the specific material defects critical for device performance. We address the problematic degradation of the forward characteristics (V f -drift) of bipolar SiC PiN diodes [CITE]. The underlying mechanism due to stacking fault formation in the epitaxial layers and possible effects of device processing are investigated. An improved device design is demonstrated, which effectively stabilizes this V f -drift. We show the progression in the development of semi-insulating SiC grown by the sublimation technique from extrinsically doped material to high purity semi-insulating (HPSI) 4H-SiC bulk crystals of up to 100 mm diameter without resorting to the intentional introduction of elemental deep level dopants, such as vanadium. Uniform resistivities in 3-inch HPSI wafers greater than 3 × 1011 Ω-cm have been achieved. Secondary ion mass spectrometry, deep level transient spectroscopy and electron paramagnetic resonance data suggest that the semi-insulating behavior in HPSI material originates from deep levels associated with intrinsic point defects. MESFETs produced on HPSI wafers are free of backgating effects and have resulted in the best combination of power density and efficiency reported to date for SiC MESFETs of 5.2 W/mm and 63% power added efficiency (PAE) at 3.5 GHz.

Hollow-core screw dislocations, also known as “micropipes”, along the [0001] axis in 6H-SiC single crystals, have been studied by synchrotron white beam x-ray topography (SWBXT), scanning electron microscopy (SEM), and Nomarski optical microscopy (NOM). Using SWBXT, the magnitude of the Burgers vector of screw dislocations has been determined by measuring the following four parameters: (1) the diameter of dislocation images in back-reflection topographs; (2) the width of bimodal dislocation images in transmission topographs; (3) the magnitude of the tilt of lattice planes on both sides of dislocation core in projection topographs; and (4) the magnitude of the tilt of lattice planes in section topographs. The four methods show good agreement. SEM results reveal that micropipes emerge as holes on the as-grown surface, with their diameters ranging from about 0.1 to a few micrometers. Correlation between topographic images and SEM micrographs shows that micropipes are hollow-core screw dislocations with Burgers vector magnitudes from 2c to 7c (c is the lattice parameter along the [0001] axis). There is no empirical evidence that 1c dislocations have hollow cores. The Burgers vector magnitude of screw disloca-tions, b, and the diameter of associated micropipes, D, were fitted to Frank’s prediction for hollow-core screw dislocations: D = μb2/4π2γ, where μ is shear modulus, and γ is specific surface energy. Statistical analysis of the relationship between D and b2 shows that it is approximately linear, and the constant γ/μ ranges from 1.1 × 10−3 to 1.6 × l0−3 nm.

Screw dislocations along the [0001] axis in 6H−SiC single crystals have been studied extensively by Synchrotron White-Beam X-ray Topography (SWBXT), Scanning Electron Microscopy (SEM), and Nomarski Optical Microscopy (NOM). Using SWBXT, the magnitude of the Burgers vector of screw dislocations has been determined by measuring the following four parameters: 1) the diameter of dislocation images in back-reflection topographs; 2) the width of bimodal dislocation images in transmission topographs; 3) the magnitude of the tilt of lattice planes on both sides of dislocation core in projection topographs; and 4) the magnitude of the tilt of lattice planes in section topographs. The four methods show good agreement. SEM results reveal that micropipes in the form of hollow tubes run through the crystal emerging as holes on the as-grown surface, with their diameters ranging from about 0.1 to a few micrometers. Correlation between topographic images and SEM micrographs shows that micropipes are screw dislocations with Burgers vector magnitudes from 2c to 7c (c is the lattice constant along the [0001] axis). There isno were fitted to Frank’s prediction for hollow-core screw dislocations:D =μb2/4π 2 γ, where μ is the shear modulus, and γ is the specific surface energy. Statistical analysis of the relationship betweenD and b2 shows that it is approximately linear, and the constant, γ/μ, obtained from the slope, ranges from 1.1×10−3 to 1.6×10−3 nm.

Synchrotron white-beam X-ray topography studies, in conjunction with Nomarski optical microscopy, have been carried out on 6H-SiC single crystals grown by the sublimation physical vapour transport technique. Two kinds of dislocations were observed using topography: dislocations exhibiting bimodal images of various widths and with line directions approximately parallel to the (0001) axis and dislocations confined to the basal plane, which appear to have emanated from the former dislocations. The larger bimodal image width dislocations were found to have hollow cores, known as 'micropipes'. Detailed contrast analysis of topographic images obtained in transmission and back-reflection geometries establishes that 'micropipes' are Frank-type hollow-core screw dislocations with Burgers vectors typically equal to 3-7 times the c lattice parameter. X-ray topography also revealed many line defects approximately parallel to the (0001) axis that were determined to be screw dislocations with Burgers vectors equal to the c lattice parameter and there were no discernible 'micropipes' associated with these latter screw dislocations.

A thermal anneal process has been developed that significantly enhances minority carrier lifetime (MCL) in bulk-grown substrates. Microwave photoconductivity decay (MPCD) measurements on bulk grown substrates subjected to this process have exhibited decay times in excess of 35 μs. Electron Beam Induced Current (EBIC) measurements indicated a minority carrier diffusion length (MCDL) of 65 μm resulting in a calculated MCL of 15 μs, well within the range of that measured by MPCD. Deep level transient spectroscopic (DLTS) analysis of samples subjected to this anneal process indicated that a significant reduction of deep level defects, particularly Z1/2, may account for the significantly enhanced lifetimes. The enhanced lifetime is coincident with a transformation of the original as-grown crystal into a strained or disordered lattice configuration as a result of the high temperature anneal process. PiN diodes were fabricated employing 350 μm thick bulk-grown substrates as the intrinsic drift region and thin p- and n-type epitaxial layers on either face of the substrate to act as the anode and cathode, respectively. Conductivity modulation was achieved in these diodes with a 10x effective carrier concentration increase over the background doping as extracted from the differential on-resistance. Significant stacking fault generation observed during forward operation served as additional evidence of conductivity modulation and underscores the importance of reducing dislocation densities in substrates in order to produce a viable bulk-grown drift layer.

The performance enhancements offered by the next generation of SiC high power devices offer potential for enormous growth in SiC power device markets in the next few years. For this growth to occur, it is imperative that substrate and epitaxial material quality increases to meet the needs of the targeted applications. We will discuss the status and requirements for SiC substrates and epitaxial material for power devices such as Schottky and PiN diodes. For the SiC Schottky device where current production is approaching 50 amp devices, there are several material aspects that are key. These include; wafer diameter (3-inch and 100-mm), micropipe density (−2 for 3-inch substrates and 16 cm−2 for 100-mm substrates), epitaxial defect densities (total electrically active defects −2), epitaxial doping and epitaxial thickness uniformity. For the PiN diodes the major challenge is the degradation of the Vf characteristics due to the introduction of stacking faults during the device operation. We have demonstrated that the stacking faults are often generated from basal plane dislocations in the active region of the device. Additionally we have demonstrated that by reducing the basal plane dislocation density, stable PiN diodes can be produced. At present typical basal plane dislocation densities in our epitaxial layers are 100 to 500 cm−2; however, we have achieved basal plane dislocation densities as low as 4 cm−2 in epitaxial layers grown on 8° off-axis 4H-SiC substrates.

MESFET's fabricated on high resistivity 4H-SiC substrates have attained an f/sub max/ of 30.5 GHz and an f/sub /spl tau// of 14.0 GHz. Both of these figures of merit are the highest ever reported for a SiC MESFET, and this is the first report of high resistivity 4H-SiC substrates. With the continued advances in bulk crystal growth, including the availability of high resistivity material, the development of two-inch substrates and the reduction of micropipe defect densities to

Publisher Summary During the past decade, silicon carbide (SiC) semiconductor device technology for electronic and optoelectronic applications has made tremendous progress resulting primarily from the commercial availability of SiC substrates of ever increasing diameter and quality. Throughout the technical evolution of semiconductor SiC, the fabrication of SiC crystals exhibiting the desired electrical and crystalline properties has played a central role in the realization of the full potential of this important semiconductor material. The aim of this chapter is to discuss, from an industrial viewpoint, the current state of SiC crystal growth technology and to present empirical results that reflect the recent advances in SiC crystal growth. Recent progress in the development of the physical vapor transport (PVT) technique for SiC bulk growth has led to substrate diameters up to 100-mm, residual impurities in the lO15 cm-3 range, thermal conductivity approaching 5.0 W/cmK in bulk crystals, transparent 6H and 4H-SiC at crystal diameters up to 75-mm, and micropipe densities as low as 0.9 cm-2 over a 50-mm diameter 4H-SiC wafer. These advances help to position SiC for an exciting future and provide a sound foundation for the realization of the full potential of SiC for high power density electronic devices, optoelectronic devices of high brightness, and SiC materials applications requiring low optical absorption.

Synchrotron white beam X-ray topography, along with optical microscopy and scanning electron microscopy, has been used to characterize structural defects which are potentially detrimental to device performance in PVT 6H-SiC single crystals. Line defects running along the [0001] axis, known as “micropipes”, were studied extensively. Detailed analysis of topographic image contrast associated with “micropipes”, based on the kinematical theory of X-ray diffraction, established that the so-called “micropipes” are screw dislocations with large Burgers vectors.

We present results of a thermal anneal process that increases the minority carrier lifetime in SiC substrates to in excess of 3μs, compared to the starting as-grown substrates with lifetimes typically in the

The paper summarizes the results of studies concerned with the processes of growing large silicon carbide single crystals of only one polytype. Vacuum sublimation has been found to be a suitable method of crystal growth. Mass-transfer aspects of crystal growth processes are analyzed, and the conditions of growing crystals of various polytypic structures are discussed. The as-grown crystals are suitable for the production of semiconductor devices.

Polytypic crystals of semiconductors, dielectrics and magnetic materials attract an increasing attention in science and technology. On one hand, the phenomenon of polytypism is one of the fundamental problems of solid-state physics; its solution would make it possible to elucidate- the problem of the interconnection of different structures and intraatomic forces acting in crystals. On the other hand, the polytypic difference in crystals is most strongly expressed in electro-physical properties, which makes their application promising, mainly in semiconductor electronics. Thus, the difficulties of producing modulated structures in polytypic crystals can be overcome since these crystals form a class of one-dimensional natural superlattices.