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A three level poly-silicon, buried channel Charge Coupled Device (CCD) technology has been tested for Co60 ionizing radiation damage up to a total dose of 90 krad(Si). For this purpose CCD image sensors have been irradiated together with their associated test structures. These include different types of MOSFET's, natural transistors, buried channel transistors, field transistors, and diodes. The devices have been fully characterized during irradiation and afterwards, as a function of time. The standard technology has been assessed, leading to the implementation of process and design modifications. The modified technology has been further tested according to the same procedure and significant improvement in the sensors' behaviour under irradiation and during annealing has been observed. The radiation hardness of the CCD's has been correlated with the results of the test structures, allowing a better understanding of the degradation phenomena and of the counter-measures needed for a radiation hardened technology.

A readout chip implemented in an array with 16 columns at 500 micrometers pitch and 63 rows at 75 micrometer pitch was studied. The chip was bonded with solder bumps to a silicon detector with matching pixel elements. A trigger signal strobes event information in a pixel which allows it to be read out. This process cannot be done in the absence of a strobe. The hybrid detector has been tested and found to be sufficiently effective.