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The concern about the reliability and need for the miniaturization has stimulated intense development efforts to yield new viable joint structures. One such development is to achieve the joint without a Cu pillar by instead integrating an embedding ball of Cu within the solder joint. With the ball occupying the joint volume, the use of solder is considerably reduced, preventing an IMC phase formation with the complete consumption of Sn in the solder. While this new joint structure has its benefits, there are also unknowns in terms of the failure mechanism induced by electromigration (EM). This paper addresses the concerns about the reliability and need for the miniaturization of microelectronic packages. We have carried out extensive studies of the solder joint with an embedded Cu ball in order to provide answers to a few key questions, and this paper reports a few outstanding findings. The samples used in our study are a microjoint with a ∼50um diameter Cu ball. The microstructure, specifically IMC growth at Cu-ball/solder interfaces, was characterized with its exposure to various thermal and EM loads. To our surprise, the resultant findings suggest that such a structure does not necessarily offer better resistance against EM-induced failure, nor does it offer much management against IMC growth. One notable finding is that EM failure occurs without the expected impedance because the EM flux is in fact intensified with the Cu ball in a limited amount of Sn. Also found is the possibility of an accelerated growth of IMC at the surface of the solder joint when the diffusion barrier coated on Cu ball is prevented IMC formation in center of the joint. The mechanism by which EM and the reaction-induced failure is accelerated by the ball, will be presented along with in-depth characterization results.

This article summarizes the mechanics of two mechanical fatigue methods, cyclic bending fatigue and shear fatigue, in inducing failure in solder joints in package assemblies, and it presents the characteristics of fatigue failures resulting from these methods using example cases of Sn-Pb eutectic and Sn-rich Pb-free solder alloys. Numerical simulation suggests that both testing configurations induce fatigue failure by the crack-opening mode. In the case of bending fatigue, the strain induced by the bending displacement is found to be sensitive to chip geometry, and it induces fatigue cracks mainly at the solder matrix adjacent to the printed circuit board interface. In case of shear fatigue, the failure location is firmly fixed at the solder neck, created by solder mask, where an abrupt change in the solder geometry occurs. Both methods conclude that the Coffin–Manson model is the most appropriate model for the isothermal mechanical fatigue of solder alloys. An analysis of fatigue characteristics using the frame of the Coffin–Manson model produces several insightful results, such as the reason why Pb-free alloys show higher fatigue resistance than Sn-Pb alloys even if they are generally more brittle. Our analysis suggests that it is related to higher work hardening. All these results indicate that mechanical fatigue can be an extremely useful method for fast screening of defective package structures and also in gaining a better understanding of fatigue failure mechanism and prediction of reliability in solder joints.

We demonstrate a large-scale placement of nanoparticles through a scheme named "electrostatic funneling", in which charged nanoparticles are guided by an electrostatic potential energy gradient and placed on targeted locations with nanoscale precision. The guiding electrostatic structures are defined using current CMOS fabrication technology. The effectiveness of this scheme is demonstrated for a variety of geometries including one-dimensional and zero-dimensional patterns as well as three-dimensional step structures. Placement precision of 6 nm has been demonstrated using a one-dimensional guiding structure comprising alternatively charged lines with line width of approximately 100 nm. Detailed calculations using DLVO theory agree well with the observed long-range interactions and also estimate lateral forces as strong as (1-3) x 10(-7) dyn, which well explains the observed guided placement of Au nanoparticles.

This paper presents experimental evidence suggesting that electromigration (EM) can be a serious reliability threat when the dimension of Cu interconnects approaches the nanoscale range. To understand the failure mechanism prevailing in nanoscale Cu interconnects, single-level, 400-µm long interconnects with various effective widths, ranging from 750 nm to 80 nm, were made, EM tested, and characterized in this investigation. The results indicate that interface EM (Cu/barrier) may be the predominant EM mechanism in all line widths. The evidence supporting the active Cu/barrier interface EM includes the fact that the EM lifetime is inversely proportional to the interface area fraction. Microscopic analysis of the failure sites also supports the conclusion of interface EM because voids and hillocks are found at the ends of the test strip, which is not possible if lines fail by grain-boundary EM in the test structure used in this study. In addition, our study finds evidence that failure is assisted by a secondary mechanism. The influence of this factor is particularly significant when the feature size is small, resulting in more uniform distribution of failure time in narrower lines. Although limited, evidence suggests that the secondary factor is probably attributed to pre-existing defects or grain boundaries.

Understanding multifaceted microstructural evolution mechanisms is a key enabling foundation that will enable computational modeling and prediction of electronic system lifetimes before anything is built.

The present paper reports the results of the controlled precipitation for the HgTe nano-crystals in the PbTe semiconductor matrix and demonstrates its effectiveness in producing well-organized and crystallographically aligned semiconductor nano-crystals. Following the same procedure used in metallic alloys, the semiconductor alloys are treated at 600°C for 48 h, quenched and aged up to 400 h at 300°C and 400°C to induce homogeneous nucleation and growth of HgTe precipitates. Examination of the resulting precipitates using transmission electron microscopy (TEM) reveals that the coherent HgTe precipitates form as thin disks along the {1 0 0} habit planes of PbTe matrix. It is also found that the precipitate undergoes a gradual shape change without any noticeable coarsening, from a disk to a cube, as the aging time increases. The microstructure after full aging is found to contain almost equal sized HgTe cubes, roughly 7 nm, that maintain coherency with {1 0 0} planes of the matrix. These results combined with the extreme dimension of the precipitates and the simplicity of the formation process leads to a belief that controlled precipitation can be an effective method in preparing a desirable quantum-dot microstructure.

The lattice misfit at the island-cap interface in two In0.15Ga0.85As p-i-n devices, with 5 layers of InAs quantum dots (QDs), was modified by depositing 2.1 and 3.2 ML of InAs while maintaining near identical capping layers. The device with 35 ± 3 nm island size distribution exhibited photoluminescence activity in the near infra-red range from 975 to 1150 nm while the device with 42 ± 12 nm size islands recorded lower PL intensity over a narrower range of 1000-1100 nm suggesting (a) increased island-cap interface misfit, (b) truncation of the islands, and (c) generation of structural defects.

This paper reports the findings supporting that solder joint grain structure within an assembly is not fixed but varies with the joint location and cooling rate. Also reported is the fact that such change in grain structure can make the joint fatigue resistance to be increased. These conclusions are made by comparing the grain structure and fatigue kinetics of the joints in BGA assembly with variation in cooling rate after thermal aging. Our study finds that the grain structure changes with cooling rate because of the kinetic interplay between plastic deformation by thermal strain and its relaxation process other than dislocation glide. The variation in the spontaneous plastic deformation and its storage in the solder promote recrystallization in one extreme, while the process of dynamic relaxation releases the stored energy and make the joint maintain its original grain structure in another extreme. Mechanical fatigue testing of these samples reveals that failure prone joint, corner joint, becomes immune to fatigue failure when its grain structure is changed to polygranular structure. The degree of reliability gain is not possible to quantify at the present moment because the failed joint is shifted to non-recrystallized joint and the failure kinetics is also affected by the amount of residual stress which is also affected by the cooling rate. However, there are many of indications that the joint with polygranular structure is much less susceptible to fatigue failure. Some of highlighting evidences are presented in this paper.

Epitaxially formed indium arsenide quantum dot (QD) structures formed by the Stranski-Krastanov growth mode have been investigated with respect to how quantum confinement and lattice strain behavior affects the optoelectronic performance in p-i-n type InGaAs devices. The introduction of a correction layer and the proper selection of the QD capping layer’s alloy and thickness parameters allowed the control and management of the lattice misfit in two QD structures, which led to reduced defects and improved dark current behavior under forward bias conditions when compared to an InGaAs p-n homojunction (HOM) device without quantum-dots. Although the dark-current of the HOM devices behaved as expected under forward and reverse biases, the QD device structures displayed an apparent anomalous behavior in their dark-current densities under forward and reverse biases. Closer analysis reveals that this behavior is not anomalous; instead the information gained can be used to extract greater understanding about how to optimize the optoelectronic performance in quantum confined structures. In addition, the analysis suggests that lattice strain behavior continues to be a critical benchmark for defining and optimizing the performance of epitaxially formed= QD devices.

Electromigration is a serious potential source of failure in the narrow, thin-film Al-Cu conductors used in modern microelectronic devices. The problem has become more acute as line widths have shrunk to below one micrometer, creating lines with quasi-bamboo microstructures. The usual mechanism of internal electromigration failure in such lines involves the formation of a transgranular void across a bamboo grain at the upstream end of a long, polygranular segment, preceded by the depletion of copper from both the polygranular segment and the upstream bamboo grain. At least three metallurgical mechanisms are available to inhibit this failure mechanism and improve the useful lifetime of the line, Each of these methods has been demonstrated in the laboratory environment.

One of the important phenomena in Electromigration (EM) is Blech Effect. The existence of Threshold Current Density-Length Product or EM Threshold has such fundamental and technological consequences in the design, manufacture, and testing of electronics. Temperature-dependence of Blech Product had been thermodynamically established and the real behavior of such interconnect materials have been extensively studied. The present paper reviewed the temperature-dependence of EM threshold in metallization lines of different materials and structure as found in relevant published articles. It is expected that the reader can see a big picture from the compiled data, which might be overlooked when it was examined in pieces.

A newly devised misfit management method was used to deftly balance the lattice strain in an InAs quantum dot (QD) based In 0.15 Ga 0.85 As p-i-n device. The photovoltaic behavior under AM0 conditions exhibited higher V oc and lower J sc in the QD-based device as compared to a control p-n device without quantum dots. To our knowledge, both of these observations are new and seemingly conflict with some of the current understanding of quantum-dot-based PV device physics. The PV behavior under infrared illumination confirms that the quantum-confined carriers of the InAs islands in the intrinsic region contribute to the photocurrent.

This paper reports the experimental and theoretical exploration of the fracture mechanism active in BGA lead-free solder assemblies under high speed shear fatigue test conditions. Our investigation finds that, contrary to common assumption, the crack growth in shear fatigue is not governed by shear stress but more by crack opening stress. Our theoretical analysis indicates that fracture by crack opening mode prevails because non-uniformity in the shear deformation of solder joint creates a body rotation which results in crack opening stress rather than shear. While the crack growth in shear fatigue is found to vary sensitively with variation in the mechanical constraints on the assembly, such as solder shape and elastic modulus of the chip mold, it is also sensitive to variation in solder microstructure. This, the sensitivity to the assembly constraints and solder microstructure, makes it ideal in investigating fatigue properties of solder joints as well as identifying the structural and microstructural features responsible for reliability failure.

Although single-electron devices have many advantages over conventional electronic devices and are therefore expected to have important applications for military, space, and commercial use, many fabrication challenges associated with nanoscale geometrical control have limited their implementation for practical use. The aim of this project was to create new single-electron device architecture and its associated fabrication techniques to realize single-electron device fabrication on a large scale, thereby enabling their implementation for practical applications. We demonstrated 1) chip-level fabrication of single-electron transistors, 2) that they can be fabricated in completely parallel processing, with each device individually addressable, 3) clear I-V characteristics of Coulomb blockade/staircase and Coulomb oscillations, and 4) that they can operate at room temperature. These results show that fabrication of integrated systems of room-temperature single-electron devices is now possible, paving a pathway toward practical use of single-electron devices.

Devices in which the transport and storage of single electrons are systematically controlled could lead to a new generation of nanoscale devices and sensors. The attractive features of these devices include operation at extremely low power, scalability to the sub-nanometre regime and extremely high charge sensitivity. However, the fabrication of single-electron devices requires nanoscale geometrical control, which has limited their fabrication to small numbers of devices at a time, significantly restricting their implementation in practical devices. Here we report the parallel fabrication of single-electron devices, which results in multiple, individually addressable, single-electron devices that operate at room temperature. This was made possible using CMOS fabrication technology and implementing self-alignment of the source and drain electrodes, which are vertically separated by thin dielectric films. We demonstrate clear Coulomb staircase/blockade and Coulomb oscillations at room temperature and also at low temperatures.

This paper reports the observation of HgTe precipitate formation and its subsequent evolution in a PbTe semiconductor matrix containing 4 mol. % HgTe (PbTe-4HgTe) produced by a controlled precipitation process. The controlled precipitation process is being developed as a new way to produce a large number of quality semiconductor nanocrystals more simply than the conventional methods. Characterization of the HgTe precipitates resulting from application of controlled precipitation to the PbTe-4HgTe alloy system provides evidence that this method is effective in generating nanocrystals. Transmission electron microscopy of the processed alloys reveals that HgTe precipitates are extremely small in size, maintain a coherent interface, and experience a unique shape evolution with aging.