1. 6.8 A 100Gb/s NRZ Transmitter with 8-Tap FFE Using a 7b DAC in 40nm CMOS
- Author
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Sheng-Tsung Lai, Wei-Chien Huang, Chiang-Wei Lin, Pen-Jui Peng, Ted Shih, and Wei-Hung Wang
- Subjects
Interconnection ,CMOS ,business.industry ,Computer science ,Transmitter ,Bandwidth (signal processing) ,Electronic engineering ,business ,Digital signal processing ,Jitter - Abstract
Recently, PAM-4 transmitters have been realized at 112Gb/s or even faster to satisfy the continuously growing demands for wireline communications [1]โ[5]. Although PAM-4 signaling performs two-fold bandwidth efficiency compared with the NRZ counterpart, the NRZ signal still has the advantage in low-loss scenarios like ultra-short-reach (USR) interconnection for optical engines due to its high output swing and better SNR. This paper presents a 100Gb/s NRZ transmitter fabricated in 40nm CMOS by incorporating a 7b DAC with an 8-tap FFE implemented in DSP. The DAC-based architecture demonstrates high resolution for FFE coefficients, achieving an output eye diagram with 73mV eye height and 760fs rms jitter under 7.1dB loss at 50GHz while consuming 619mW of power from 1.1V/1.2V/1.5V supplies.
- Published
- 2020
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