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Objectives: To understand the impact of 3-monthly treatment with paliperidone palmitate on patient management, including non-adherence and relapse, from a psychiatrist and nurse perspective for 73 patients enrolled in a patient familiarisation programme (PFP) in New Zealand. Methods: An online questionnaire was sent to clinicians with at least 6 months of regular interaction with PFP patients. Questions addressed treatment effectiveness and patient management changes. Analyses are descriptive only and do not represent patient or carer perspectives. Results: Seven psychiatrists, representing 58 of 73 (79.5%) of patients, and 17 nurses responded to the survey. Psychiatrists were satisfied with efficacy and tolerability and relapse prevention. Treatment goals were either ‘met’ (2/7; 28.6%) or ‘exceeded’ (5/7; 71.4%). The focus on adherence issues decreased and the focus on life areas and recovery goals increased. Conclusions: From the clinician perspective, 3-monthly paliperidone palmitate offers patients the potential to remain adherent and improve social functioning.

A new SEM-based in-line electron holography microscope has been under development. The microscope utilizes conventional SEM and BF-STEM functionality to allow for rapid searching of the specimen of interest, seamless interchange between SEM, BF-STEM and holographic imaging modes, and makes use of coherent low-energy in-line electron holography to obtain low-dose, high-contrast images of light element materials. We report here an overview of the instrumentation and first experimental results on gold nano-particles and carbon nano-fibers for system performance tests. Reconstructed images obtained from the holographic imaging mode of the new microscope show substantial image contrast and resolution compared to those acquired by SEM and BF-STEM modes, demonstrating the feasibility of high-contrast imaging via low-energy in-line electron holography. The prospect of utilizing the new microscope to image purified biological specimens at the individual particle level is discussed and electron optical issues and challenges to further improve resolution and contrast are considered.

Crystal diffraction is a well-established technique for high-resolution structural analysis of material science and biological samples. However, the recovered structure is a result of averaging over all the unit cells in the crystal, which smears out the imperfections, atomic defects, or asymmetries and chiral properties of the individual molecules. We propose Bragg holography, where a nano-crystal is imaged at a defocus distance allowing separation of the diffracted beams, without turning them into peaks. The presence of a reference wave gives rise to a Bragg hologram, which can be reconstructed by conventional holographic reconstruction algorithms. The recovered complex-valued wavefront contains the complete information about the atomic distribution in the crystal, including defects. Bragg holography is demonstrated for gold nano-crystals, and its feasibility for biological nano-crystals is shown.

Competition-related dietary intake has not yet been investigated in Gaelic football. The present study examined the precompetition macronutrient intake of elite male Gaelic football players. Forty players from two teams completed a food diary on the 2 days preceding competition (Day 1 and Day 2) and on the match day prior to the match (match day). Carbohydrate intake was significantly greater on Day 2 compared with Day 1, for both absolute (295 ± 98 vs. 318 ± 77 g;p = .048; −23.6 g, 95% confidence interval [−47.3, 0.2]; Cohen’sd = 0.27) and relative intake (3.4 ± 1.1 vs. 3.7 ± 1.0 g/kg;p = .027; −0.3 g/kg, 95% confidence interval [−0.6, −0.03]; Cohen’sd = 0.32). The number of players in accordance with and not in accordance with the guidelines for carbohydrate intake on Day 2 was significantly different to an expected frequency distribution, χ2(1) = 32.400;p ≤ .001; φ = 0.9, with a greater number of players not meeting the guidelines (observedN = 2 vs. 38). The number of players in accordance with and not in accordance with the recommendations for carbohydrate intake on match day was significantly different to an expected frequency distribution, χ2(1) = 8.100;p = .004; φ = 0.45, with a greater number of players meeting the guidelines (observedN = 29 vs. 11). The major finding from the current investigation was that a significantly greater number of players did not meet carbohydrate intake guidelines on the day before competition. Individualized nutritional interventions are required in order to modify the current prematch dietary intake.

Vertical integration of diverse semiconductor technologies can be achieved by utilizing interconnections through entire silicon substrates, known as through silicon vias (TSVs). TSVs present an interesting case study for reliability evaluation, given the particular fabrication technologies, geometries, and potential failure modes associated with such structures. A specific TSV technology is introduced, and key parameters for reliability assessment, such as residual stress, resistance, leakage, and dielectric breakdown, are discussed. Reliability data are presented, including the characterization of TSV parameters as a function of various accelerated lifetime stress tests, as well as assessments of the density and impact of TSV manufacturing defects. The presented data demonstrate that while the TSV is inherently quite robust, latent manufacturing defects pose a significant risk to long-term reliability. Screening methodologies, defect modes, failure analysis methods, process improvement, and correspondingly improved defect density results are discussed. The results are considered pertinent to the development and reliability of novel 3-D integrated process technologies.

Infra-red photoemission microscopy has been applied for the localization of defects in 3D integrated circuits containing Through Silicon Vias (TSVs). For these investigations, the familiar (planar) emission microscopy configuration was extended to allow imaging and emission microscopy on vertical TSV sidewalls, from versatile 3D viewpoints. Flexible viewing orientation was achieved by introducing an additional reflecting surface into the optical path. Precise alignment of the angle of incidence at the air–silicon interface, with sufficient accuracy to ensure no problematic refraction-related errors, was possible using this experimental set-up. Three examples are presented, showing defect localizations and underlying physical leakage mechanisms in TSV structures.

Mean inner potential is a fundamental material parameter in solid state physics and electron microscopy and has been experimentally measured in CdTe, a technologically important semiconductor. As a first step, the inelastic mean free path for electron scattering in CdTe was determined, using electron energy loss spectroscopy, to enable precise thickness mapping of thin CdTe lamellae. The obtained value was λi(CdTe, 300 kV) = 192 ± 10 nm. This value is relatively large, given the high density of the material, and is discussed in the text. Next, electron diffraction and specimen tilting were employed to identify weakly diffracting lattice orientations, to enable the straightforward measurement of the electron phase shift. Finally, electron holography was utilized to quantitatively map the phase shift experienced by electron waves passing through a CdTe crystal, with several different propagation vectors. Utilization of both thickness and phase data allowed computation of mean inner potential as V0 (CdTe) = 14.0 ± 0.9 V, within the range of previous theoretical estimates.

Through Silicon Via (TSV) technology, to serve as electrical connection between metallization layers on the front and backside of the same wafer, has been developed by austriamicrosystems AG. During the development phase, defects were found that could be assigned to an established defect type known as “contact liner volcano”. To our knowledge this is the first time that such a volcano formation is reported from the inside of a TSV.

Today 3D interconnection approaches are considered to provide one of the most promising enabling technologies for “More than Moore” solutions. In particular, 3D integration can provide significant progress in semiconductor device development regarding increased system functionality and integration density. In this paper, we describe an innovative concept for sensor integration based on a quality-proven “open” TSV technology on the basis of a 0.35μm CMOS process. An application-optimized sensor-layer is processed on a specific wafer substrate, whereas the CMOS circuits of the system can remain cost-efficiently on an appropriate 0.35μm CMOS or HV-CMOS technology. Another advantage of the proposed TSV solution is the geometric aspect. As the CMOS is attached to the sensor backside, almost 100% of the chip area can be used for the sensing functionality. In the presented technological approach, the sensor wafer is finalized with processing a top metal layer and successive bond oxide layers. The bond oxide layers are planarized by chemo mechanical polishing (CMP). The CMOS wafer is fabricated using a regular 0.35μm CMOS technology up to the vias before the last metal layer. A nitride layer is deposited in order to protect the integrated circuits from damages during the back grinding process. Prior to bonding, the CMOS wafer is thinned down to a thickness of 250μm and then bonded to the sensor wafer by plasma activated bonding followed by an annealing step to reinforce the bond strength. TSV etching is sequentially performed in three steps: firstly, the oxide of inter-metal dielectrics is opened. Secondly, the bulk silicon of the CMOS wafer is etched using a deep reactive ion etch (DRIE) process selectively stopping on the bond oxide of the sensor wafer. After several cleaning steps the spacer oxide is deposited followed by the spacer and bond oxide etching. For TSV metallisation, Tungsten as deposited in a CVD process is chosen providing uniform conformal coating inside the open TSVs. A sputtered Al forms the top metal and a subsequently produced passivation layer completes the fabrication process. With respect to the photo-lithography process for patterning the top metal and passivation layers, a specifically developed resist spray coating technique is used. This allows protecting the TSVs from damage due to the etching gases. The higher complexity of the lithography is compensated by a more simple and reliable processing regarding the TSV quality. The presented technological flow results in advantageous electrical properties of the TSV interconnects, e.g. low resistivity and a high breakdown voltage combined with excellent inherent reliability. The fabricated sensor devices were characterized by a variety of analytical techniques that have specifically been adapted to the requirements of 3D integrated wafer-bonded systems with TSVs. This approach allowed isolating, localizing and characterizing process related inhomogeneities and potential defects inside the open TSVs and in the wafer bond interface with improved analysis throughput. Electrical shorts of the TSV sidewall metallization to the Si substrate could be identified by Lock-in Thermography (LIT). The exact defect position at the sidewall could be estimated by applying a new defocusing technique to additionally determine the defect depth inside the TSV. As a consequence, the identified sidewall defects could subsequently be analyzed by high resolution transmission electron microscopy (HR TEM) to reveal their root causes. Scanning Acoustic Microscopy (SAM) with improved signal analysis and data evaluation was applied to identify and characterize local delamination defects in the wafer-bonded interface of the 3D sensor. The achieved progress regarding failure analysis methodology supported the technological developments and will contribute to secure quality and yield of 3D integrated devices during future manufacturing.

Depth-resolved IR photoemission microscopy was applied for localization of defects causing leakage currents within Through Si Vias (TSVs). Specifically, analyses of the changes in intensity and spatial distribution of the detected emission, as a function of the focal plane position, allow quantification of the depth of defects within the TSV. Physical failure analysis verified the presence of the defects at the coordinates specified by emission microscopy, and allowed defect failure mechanisms to be identified.

This paper is concerned with characterization and failure analysis challenges posed by 3D integration of semiconductor devices, with a particular focus on wafer bonded components and Through Silicon Vias (TSV). Requirements for sample preparation are discussed, along with advantages and limitations exhibited by various different techniques. Analysis examples with real devices are presented, along with successful sample preparation solutions enabled by a precision polishing toolset.

In this paper we will introduce novel methodical approaches for material and failure analysis of 3D integrated devices. The potential and advantages of the new concepts and tools will be demonstrated for flip-chip-like interconnects but in addition, for the first time, for Through Silicon Vias (TSV). The employed techniques combine non-destructive fault localization with efficient and accurate target preparation to get access for following microstructure diagnostics, forming a subsequent failure analysis workflow. The concept presented here involves the application of improved Lock-In Thermography (LIT), and three different innovative concepts of high rate Focused Ion Beam (FIB) techniques.