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For the realization of high breakdown voltages in power electronics, a low‐cost technology is developed, which allows the deep diffusion of aluminum from a physically deposited source. The approach requires only standard process steps that are already established in the manufacturing of silicon power devices. The sheet concentration of the diffusion profiles exceeds, with 8 × 1013 cm−2, the ones of comparable implanted and annealed profiles by up to a factor of two. A full numerical analysis of the resulting profiles is provided. [ABSTRACT FROM AUTHOR]

In this work, high-voltage monolithic 3D capacitors operating at 100 V (6 MV/cm) are fabricated by the use of a through silicon-via-based technology. Electric characteristics of the monolithic 3D capacitors exhibit a capacitance density of 17 times larger than that of the planar capacitors with an equal contact area and identical dielectric thicknesses. The impact of the 3D architecture of capacitors on their electrical properties is studied for various patterns and geometries. TSV-based capacitors with a hexagonal arrangement of the holes and 20 μm hole diameters exhibit a capacitance deviation of 0.8% at 150 °C in accumulation, justifying the capability of TSV-based capacitors to operate even at high-temperatures. Furthermore, a high dielectric-breakdown voltage of 280 V (18 MV/cm) was realized using a thick hybrid dielectric stack of SiO 2 /Si 3 N 4 . [ABSTRACT FROM AUTHOR]

A novel GaN trench gate (TG) MOSFET with P-type floating islands (FLI) in drift region, which can suppress the electric field peak at bottom of gate trench during the blocking state and prevent premature breakdown in gate oxide, is proposed and investigated by TCAD simulations. The influence of thickness, position, doping concentration and length of the FLI on breakdown voltage (BV) and specific on-resistance (R on_sp ) is studied, providing useful guidelines for design of this new type of device. Using optimized parameters for the FLI, GaN FLI TG-MOSFET obtains a BV as high as 2464 V with a R on_sp of 3.0 mΩ cm 2 . Compared to the conventional GaN TG-MOSFET with the same structure parameters, the Baliga figure of merit (BFOM) is enhanced by 150%, getting closer to theoretical limit for GaN devices. [ABSTRACT FROM AUTHOR]

• The effect of the transition region of SiC MOSFET has been studied in this work. • Two kinds of devices, which called S-MOS and G-MOS, have been fabricated to compare their characteristics. • The turn-on and turn-off delay time are reduced by 54% and 36% for the G-MOS by LTSPICE simulation. • The experimental values show a reduction of Ron of G-MOS by 2–12% and an increase of Cgd by 72% comparing to S-MOS. • The transition region barely influences the breakdown voltage of the devices, which are both higher than 1700 V. The transition region between the active area and the edge termination of silicon carbide (SiC) MOSFET is either used to place a poly-silicon gate runner (G-MOS) or electrically contacted to the source potential (S-MOS), which is studied experimentally and by TCAD simulation in this work. The simulation results indicate that the transition region of G-MOS can effectively alleviate the propagation delay in the poly-silicon gate and allow all elementary cells to turn on quickly at the same gate voltage magnitude, which leads to a lower on-resistance (R on), and small switching delay time. On the other hand, the transition region of G-MOS increases the Miller capacitance (C gd), which can be reduced by shortening the length of the transition region. The simulation results are further validated by the experimental values, which show a reduction of R on of G-MOS by 2–12% and an increase of C gd of G-MOS by 72% compared to S-MOS. Moreover, the transition region barely influences the breakdown voltage of the devices, which are both higher than 1700 V. [ABSTRACT FROM AUTHOR]