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Due to their high similarity to biological ion channels, low power consumption, small footprint, and the fact that they do not require reset circuits, threshold switching memristors have been intensively studied for simulating neurons in neuromorphic chips. Switching speed is one of the key challenges which limit the application of threshold switching memristors in chips. In this study, Ta2O5 threshold switching memristors with high switching speeds were prepared by doping with silver. The results show that 14 wt. % Ag doped Ta2O5 threshold switching memristors exhibit excellent bi-directional threshold switching performance, featuring fast switching speeds (<20 ns, <18 ns), low leakage currents (<10 pA), and high switching ratio (>107). According to the field nucleation theory, the rapid switching speed can be attributed to the low nucleation energy (0.26 eV) of silver within the Ta2O5 matrix, which is achieved by incorporating 14 wt. % Ag during the doping process. Based on Pspice, a LIF (leaky integrate-and-fire) neuron based on the silver nanoparticles doped Ta2O5 threshold switching memristors is built, and its firing function has been simulated. The results show that the LIF neuron with a short switching time is able to excite pulse spiking with high frequencies. These results demonstrated that the silver nanoparticles doped Ta2O5-based threshold switching memristors hold significant potential for constructing high-speed artificial neural networks. [ABSTRACT FROM AUTHOR]

Integrating both electrical and light-modulated multi-type neuromorphic functions in a single synaptic memristive device holds the most potential for realizing next-generation neuromorphic systems, but is still challenging yet achievable. Herein, a simple bi-terminal optoelectronic synaptic memristor is newly proposed based on kesterite Cu2ZnSnS4, exhibiting stable nonvolatile resistive switching with excellent spatial uniformity and unique optoelectronic synaptic behaviors. The device demonstrates not only low switching voltage (−0.39 ± 0.08 V), concentrated Set/Reset voltage distribution (<0.08/0.15 V), and long retention time (>104 s) but also continuously modulable conductance by both electric (different width/interval/amplitude) and light (470–808 nm with different intensity) stimulus. These advantages make the device good electrically and optically simulated synaptic functions, including excitatory and inhibitory, paired-pulsed facilitation, short-/long-term plasticity, spike-timing-dependent plasticity, and "memory-forgetting" behavior. Significantly, decimal arithmetic calculation (addition, subtraction, and commutative law) is realized based on the linear conductance regulation, and high precision pattern recognition (>88%) is well achieved with an artificial neural network constructed by 5 × 5 × 4 memristor array. Predictably, such kesterite-based optoelectronic memristors can greatly open the possibility of realizing multi-functional neuromorphic systems. [ABSTRACT FROM AUTHOR]

Brain-inspired neuromorphic sensory devices play a crucial role in addressing the limitations of von Neumann systems in contemporary computing. Currently, synaptic devices rely on memristors and thin-film transistors, requiring the establishment of a read voltage. A built-in electric field exists within the p–n junction, enabling the operation of zero-read-voltage synaptic devices. In this study, we propose an artificial synapse utilizing a ZnO diode. Typical rectification curves characterize the formation of ZnO diodes. ZnO diodes demonstrate distinct synaptic properties, including paired-pulse facilitation, paired-pulse depression, long-term potentiation, and long-term depression modulations, with a read voltage of 0 V. An artificial neural network is constructed to simulate recognition tasks using MNIST and Fashion-MNIST databases, achieving test accuracy values of 92.36% and 76.71%, respectively. This research will pave the way for advancing zero-read-voltage artificial synaptic diodes for neural network computing. [ABSTRACT FROM AUTHOR]

In conventional designs, sensory systems are segregated from memory and computing units. The conversion and transmission of data from analog sensing domains to digital storage result in inefficient power utilization and increased latency. Here, a multifunctional memristor capable of detecting gamma radiation while also serving as a data storage device and an artificial synapse is reported. Large‐scale integration of oxide‐based memristors for artificial neural networks faces major challenges due to the sneak‐path current issue in crossbar arrays. Consequently, material combinations and fabrication variables significantly shape nanoscale processes, which are essential in determining resistive switching properties and functionalities. Resistive switching in AlFeO3 is studied using different electrode materials (silver (Ag), gold (Au), chromium (Cr), fluorine‐doped tin oxide, and silicon), embedding metal (Ag, Au) nanocrystals to engineer a class of tunable memories capable of functioning as selector, memory, artificial synapse, and dosimeter. Techniques like electrode engineering, nanocrystal seeding, and temperature‐dependent thin film deposition are employed to tune resistive and threshold switching functionalities. Accessing different functionalities requires changing the electrode materials or changing the synthesis conditions of the AlFeO3 resistive switching layer and are not interconvertible in the same device simultaneously. The devices emulate critical neural functions and demonstrate interconversion dynamics between short‐term and long‐term plasticity. [ABSTRACT FROM AUTHOR]

Memristors have emerged as promising devices for enabling efficient multiply-accumulate (MAC) operations in crossbar arrays, crucial for analog in-memory computing (AiMC). However, variations in memristors and associated circuits can affect the accuracy of analog computing. Typically, this is mitigated by on-chip training, which is challenging for memristors with limited endurance. We present a hardware-software codesign using magnetic tunnel junction (MTJ)-based AiMC off-chip calibration that achieves software accuracy without costly on-chip training. Hardware-wise, MTJ devices exhibit ultralow cycle-to-cycle variations, as experimentally evaluated over 1 million mass-produced devices. Software-wise, leveraging this, we propose an off-chip training method to adjust deep neural network parameters, achieving accurate AiMC inference. We validate this approach with MAC operations, showing improved transfer curve linearity and reduced errors. By emulating large-scale neural network models, our codesigned MTJ-based AiMC closely matches software baseline accuracy and outperforms existing off-chip training methods, highlighting MTJ's potential in AI tasks. [ABSTRACT FROM AUTHOR]

Dynamic memristors are considered as the optimal hardware devices for reservoir computing (RC) enabled by their nonlinear conductance variations. This significantly reduces the extensive training workload typically required by traditional neural networks. Lead halide perovskites, with their tunable band structure and active ion migration properties, have emerged as highly promising materials for developing dynamic memristors. However, large‐scale and consistently stable production remains a challenge for perovskite functional films, while lead elements' toxicity and environmental impact also partly restrict their practical device utilization. In this work, lead‐free copper‐based perovskite (i.e., CsCu2I3) films are prepared by thermal evaporation for constructing dynamic memristors. The effective conductivity modulation of CsCu2I3‐based memristor can be utilized in artificial neural networks, achieving a high handwritten digit recognition accuracy of 91.2%. In addition, the RC system is also constructed based on the dynamic behavior of the devices, by which a letter recognition accuracy of 98.2% with simple training is achieved. This technology provides a feasible pathway to construct copper‐based perovskite dynamic memristors for future neural network information processing. [ABSTRACT FROM AUTHOR]

Mathematical models such as Fitzhugh–Nagoma and Hodgkin–Huxley models have been used to understand complex nervous systems. Still, due to their complexity, these models have made it challenging to analyze neural function. The discrete Rulkov model allows the analysis of neural function to facilitate the investigation of neuronal dynamics or others. This paper introduces a fractional memristor Rulkov neuron model and analyzes its dynamic effects, investigating how to improve neuron models by combining discrete memristors and fractional derivatives. These improvements include the more accurate generation of heritable properties compared to full-order models, the treatment of dynamic firing activity at multiple time scales for a single neuron, and the better performance of firing frequency responses in fractional designs compared to integer models. Initially, we combined a Rulkov neuron model with a memristor and evaluated all system parameters using bifurcation diagrams and the 0–1 chaos test. Subsequently, we applied a discrete fractional-order approach to the Rulkov memristor map. We investigated the impact of all parameters and the fractional order on the model and observed that the system exhibited various behaviors, including tonic firing, periodic firing, and chaotic firing. We also found that the more I tend towards the correct order, the more chaotic modes in the range of parameters. Following this, we coupled the proposed model with a similar one and assessed how the fractional order influences synchronization. Our results demonstrated that the fractional order significantly improves synchronization. The results of this research emphasize that the combination of memristor and discrete neurons provides an effective tool for modeling and estimating biophysical effects in neurons and artificial neural networks. [ABSTRACT FROM AUTHOR]

Previous work that studied hexagonal boron nitride (h‐BN) memristor DC resistive‐switching characteristics is extended to include an experimental understanding of their dynamic behavior upon programming or synaptic weight update. The focus is on the temporal resistive switching response to driving stimulus (programming voltage pulses) effecting conductance updates during training in neural network crossbar implementations. Test arrays are fabricated at the wafer level, enabled by the transfer of CVD‐grown few‐layer (8 layer) or multi‐layer (18 layer) h‐BN films. A comprehensive study of their temporal response under various conditions–voltage pulse amplitude, edge rate (pulse rise/fall times), and temperature–provides new insights into the resistive switching process toward optimized devices and improvements in their implementation of artificial neural networks. The h‐BN memristors can achieve multi‐state operation through ultrafast pulsed switching (< 25 ns) with high energy efficiency (≈10 pJ pulse−1). [ABSTRACT FROM AUTHOR]

Memristive devices with both electrically and optically induced synaptic dynamic behaviors will be crucial to the accomplishment of brain-inspired neuromorphic computing systems, in which the resistive materials and device architectures are two of the most important cornerstones, but still under challenge. Herein, kuramite Cu3SnS4 is newly introduced into poly-methacrylate as the switching medium to construct memristive devices, and the expected high-performance bio-mimicry of diverse optoelectronic synaptic plasticity is demonstrated. In addition to the excellent basic performances, such as stable bipolar resistive switching with On/Off ratio of ∼486, Set/Reset voltage of ∼−0.88/+0.96 V, and good retention feature of up to 104 s, the new designs of memristors possess not only the multi-level controllable resistive-switching memory property but also the capability of mimicking optoelectronic synaptic plasticity, including electrically and visible/near-infrared light-induced excitatory postsynaptic currents, short-/long-term memory, spike-timing-dependent plasticity, long-term plasticity/depression, short-term plasticity, paired-pulse facilitation, and "learning-forgetting-learning" behavior as well. Predictably, as a new class of switching medium material, such proposed kuramite-based artificial optoelectronic synaptic device has great potential to be applied to construct neuromorphic architectures in simulating human brain functions. [ABSTRACT FROM AUTHOR]

Neuromorphic computing aims to leverage physical phenomena of adaptive materials for emulating information processing capabilities and effectiveness of biological neuronal circuits. In this framework, memristors (resistors with memory) based on 2D materials are demonstrated for the hardware implementation of highly integrated artificial neural networks. All the works reported thus far exploited electrical properties of 2D materials to emulate neuromorphic functionalities. Here, a 2D memitter (emitter with memory) is reported on that exploits the stimuli‐responsive photoluminescence of a monolayer WS2 for neuromorphic‐type of data processing. A combined experimental and modeling approach reveals that photoluminescent dynamics triggered by optical stimulation emulates Short‐Term synaptic Plasticity and Visual Short‐Term Memory typical of biological systems. While spatio‐temporal processing capabilities of input signals can be used for information processing in the context of reservoir computing, the capability of the 2D memitter of sensing, processing, and memorizing‐forgetting optical inputs in the same physical substrate can be utilized for in‐sensor computing. [ABSTRACT FROM AUTHOR]

Many studies suggest that probabilistic spiking in biological neural systems is beneficial as it aids learning and provides Bayesian inference-like dynamics. If appropriately utilised, noise and stochasticity in nanoscale devices can benefit neuromorphic systems. In this paper, we build a stochastic leaky integrate and fire (LIF) neuron, utilising a Mott memristor's inherent stochastic switching dynamics. We demonstrate that the developed LIF neuron is capable of biological neural dynamics. We leverage these characteristics of the proposed LIF neuron by integrating it into a population-coded spiking neural network and a spiking restricted Boltzmann machine (sRBM), thereby showcasing its ability to implement probabilistic learning and inference. The sRBM achieves a software-comparable accuracy of 87.13%. Unlike CMOS-based probabilistic neurons, our design does not require any external noise sources. The designed neurons are highly energy efficient and ultra-compact, requiring only three components: a resistor, a capacitor and a memristor device. [ABSTRACT FROM AUTHOR]

In this article, we propose a circuit to imitate the behavior of a Reward-Modulated spike-timing-dependent plasticity synapse. When two neurons in adjacent layers produce spikes, each spike modifies the thickness in the shared synapse. As a result, the synapse's ability to conduct impulses is controlled, leading to an unsupervised learning rule. By introducing a reward signal, reinforcement learning is enabled by redirecting the growth and shrinkage of synapses based on signal feedback from the environment. The proposed synapse manages the convolution of the emitted spike signals to promote either the strengthening or weakening of the synapse, represented as the resistance value of a memristor device. As memristors have a conductance range that may differ from the available current input range of typical CMOS neuron designs, the synapse circuit can be adjusted to regulate the spike's amplitude current to comply with the neuron. The circuit described in this work allows for the implementation of fully interconnected layers of neuron analog circuits. This is achieved by having each synapse reconform the spike signal, thus removing the burden of providing enough power from the neurons to each memristor. The synapse circuit was tested using a CMOS analog neuron described in the literature. Additionally, the article provides insight into how to properly describe the hysteresis behavior of the memristor in Verilog-A code. The testing and learning capabilities of the synapse circuit are demonstrated in simulation using the Skywater-130 nm process. The article's main goal is to provide the basic building blocks for deep neural networks relying on spiking neurons and memristors as the basic processing elements to handle spike generation, propagation, and synaptic plasticity. [ABSTRACT FROM AUTHOR]

The key elements of neuromorphic computing systems (NCS) are memristors—resistors with a memory effect—that can be used for simultaneous processing and storage of information. It is promising to create them in crossbar geometry, where memristors are located at the intersections of the transverse electrode buses. In this work, the influence of the area and geometry of contacts on the main memristive characteristics of parylene-based structures is investigated. The results obtained indicate the independence of such memristive characteristics as the switching voltage into the low-resistance (Uset) and high-resistance states (Ureset), as well as the resistance of the samples in the low-resistance (Ron) state, from the contact area. At the same time, resistances in the high-resistance (Roff) state increase with decreasing area, which confirms the single-filament model of resistive switching, and also makes it possible to increase the window of resistance in such structures. [ABSTRACT FROM AUTHOR]

Memristors, being prospective work‐horses of future electronics offer various types of memory (volatile and nonvolatile) along with specific computational functionalities. Further development of memristive technologies depends on the availability of suitable materials. These materials should be easily available, stable, and preferably of low toxicity. Commonly used materials are lead halide perovskites, however, they are highly toxic and unstable under ambient conditions. Therefore a novel material is developed on the basis of bismuth iodide. In reaction with butylammonium iodide, it yields a novel compound, butylammonium iodobismuthate (BABI). Here, a diffusive memristor is introduced based on this compound and evaluates its memristive and neuromorphic properties. In contrast to nonvolatile memristors, the BABI memristors exhibit diffusive dynamics, which enable them to store the information only for short periods of time. This property is utilized to mimic the short‐term synaptic plasticity described by the leaky integrate‐and‐fire model of a biological neuron. Combined with high switching uniformity and self‐rectifying behavior, these devices show high classification accuracy for MNIST handwritten datasets, paving the way for their application in neuromorphic computing systems. [ABSTRACT FROM AUTHOR]

There is a need to design a hardware synapse array appropriate for enhancing the efficiency of neuromorphic computing systems while minimizing energy consumption. This study introduces a memristor device with an AlOx overshoot suppression layer (A‐OSL) to achieve a self‐compliance effect. By optimizing each cell within the 16 × 16 crossbar array, synaptic devices are successfully fabricated with reliable characteristics and 3‐bit multilevel capabilities. In addition, the oxygen composition of TiOx and the annealing conditions are optimized to reduce the forming voltage and minimize the variation in the switching voltage. As a result, stable forming‐free characteristics are obtained through A‐OSL insertion, a reduction in forming voltage, and TiOx oxygen composition optimization. Also, target weights are accurately transferred to the A‐OSL memristor crossbar array and conducted the inference process by applying spike signals to the array following the designated time step. The spiking neural network (SNN) is demonstrated by measuring vector‐matrix multiplication (VMM) of the 16 × 16 crossbar array. The VMM results exhibit a classification accuracy of 90.80% for the MNIST dataset, which is close to the accuracy achieved by software‐based approaches, amounting to 91.85%. [ABSTRACT FROM AUTHOR]

Memristors as non-volatile memory devices have been recognized for executing in-memory computation in neuromorphic hardware. In this paper, a multilayer neural network has been developed with memristor-bridges as electrical synapses and trained with modified-chip-in-the-loop technique for an image classification task. Modeling the ideal conduction behavior of memristors by their device-physics inspired analytical model has yielded satisfactory performance. However, repeated voltage cycling degrades the resistance window of memristors by aggregating conductive residuals in filamentary memristors. Therefore, emulation of such nonideality has demonstrated compromised results. To improve the performance, refresh pulses have been introduced to the devices in between write pulses to eradicate the fundamental reason of the degradation — i.e., the residuals. It has been observed that improvement of performance is contingent upon the refreshment frequency, and frequent refreshment has the ability to restore performance to a level closely approaching its ideal emulation. [ABSTRACT FROM AUTHOR]

Memristor crossbar arrays are expected to achieve highly energy-efficient neuromorphic computing via implementing parallel vector–matrix multiplication (VMM) in situ. The similarities between memristors and neural synapses offer opportunities for realizing hardware-based brain-inspired computing, such as spike neural networks. However, the nonlinear I–V characteristics of the memristors limit the implementation of parallel VMM on passive memristor crossbar arrays. In our work, we propose to utilize differential conductance as a synaptic weight to implement linear VMM operations on a passive memristor array in parallel. We fabricated a TiO2/HfO2 memristor crossbar array, in which differential-conductance-based synaptic weight exhibits plasticity, nonvolatility, multi-states, and tunable ON/OFF ratio. The noise-dependent accuracy performance of VMM operations based on the proposed approach was evaluated, offering an optimization guideline. Furthermore, we demonstrated a spike neural network circuit capable of processing small spiking signals through the differential-conductance-based synapses. The experimental results showcase effective space-coded and time-coded spike pattern recognition. Importantly, our work opens up new possibilities for the development of passive memristor arrays, leading to increased energy and area efficiency in brain-inspired chips. [ABSTRACT FROM AUTHOR]

This issue discusses the asymptotic synchronization and the exponential synchronization for memristor-based quaternion-valued neural networks under the time-varying delays. Some criteria for synchronization of the memristor-based quaternion-valued neural networks are given by exploiting the set-valued theory, the differential inclusion theory, some analytic techniques, as well as constructing novel controllers, It is worth noting that the synchronization problem about the memristor-based quaternion-valued neural networks were studied by the direct analysis method in this paper. Finally, the main theoretical results were verified by numerical simulations. [ABSTRACT FROM AUTHOR]

Perovskite‐based memristors with tunable nonvolatile states are developed to mimic the synaptic interconnects of biological nervous systems and map neuromorphic computing networks to integrated circuits. To emulate the plasticity of synaptic structures, memristors with robust multilevel resistive states are fabricated in this work using high‐density polycrystalline MAPbCl3 nanowires (NWs) array that vertically integrated using solution method. In particular, the fabricated memristors exhibit both short‐ and long‐term plasticity and traits akin to biological synapses. A fabricated memristor device is precisely programmed to 18 resistive states and each state exhibits stable data retention of more than 100 000 s. Furthermore, a matrix processing unit using a 4‐by‐4 memristor array is fabricated as the hardware core of an encoder–decoder artificial neural network to demonstrate high accuracy and reliable in‐image font conversion. The resistive states of the 16 memristors are precisely programmed to the corresponding resistance values for specific synaptic weights of the artificial‐neural‐network‐trained offline. In addition, experimental characterization and first‐principles simulations attribute the continuous programmability and high reliability features of the memristors to the confinement mechanisms of the horizontal grain‐boundary structure in polycrystalline perovskite NWs. [ABSTRACT FROM AUTHOR]

The prevalence of artificial intelligence applications using artificial neural network architectures for functions such as natural language processing, text prediction, object detection, speech, and image recognition has significantly increased in today's world. The computational functions performed by artificial neural networks in classical applications require intensive and large‐scale data movement between memory and processing units. Various software and hardware efforts are being made to perform these operations more efficiently. Despite these efforts, latency in data traffic and the substantial amount of energy consumed in data processing emerge as bottleneck disadvantages of the Von Neumann architecture. To overcome this bottleneck problem, it is necessary to develop hardware units specific to artificial intelligence applications. For this purpose, neuro‐inspired computing chips are believed to provide an effective approach by designing and integrating a set of features inspired by neurobiological systems at the hardware level to address the problems arising in artificial intelligence applications. The most notable among these approaches is memristor‐based neuromorphic computing systems. Memristors are seen as promising devices for hardware‐level improvement in terms of speed and energy because they possess non‐volatile memory and exhibit analog behavior. They enable effective storage and processing of synaptic weights, offering solutions for hardware‐level development. Taking into account these advantages of memristors, this study examines the research conducted on artificial neural networks and hardware that can directly perform deep learning functions and mimic the biological brain, which is different from classical systems in today's context. [ABSTRACT FROM AUTHOR]

Memristor‐based electronic memory have recently started commercialization, although its market size is small (~0.5%). Multiple studies claim their potential for hardware implementation of artificial neural networks, advanced data encryption, and high‐frequency switches for 5G/6G communication. Application aside, the performance and reliability of memristors need to be improved to increase their market size and fit technology standards. Multiple groups propose novel nano‐materials beyond phase‐change, metal‐oxides, and magnetic materials as resistive switching medium (e.g., two‐dimensional, nanowires, perovskites). However, most studies use characterization setups that are blind to critical phenomena in understanding charge transport across the devices. Here an advanced setup with high temporal resolution is used to analyze current noise, dielectric breakdown growth, and ambipolar resistive switching in memristors based on multilayer hexagonal boron nitride (h‐BN), one of the most promising novel nano‐materials for memristive applications. The random telegraph noise in pristine memristors and its evolution as the devices degrade, covering ~7 orders of magnitude in current with consistent observation, is studied. Additionally, an ambipolar switching regime with very low resistance down to 50Ω and its connection with a telegraph behavior with high/low current ratios >100, linked to a thermally‐driven disruption of a metallic nanofilament, is shown. [ABSTRACT FROM AUTHOR]

Neuromorphic speech recognition systems that use spiking neural networks (SNNs) and memristors are progressing in hardware development. The conventional manual preprocessing of audio signals is shifting toward event-based recognition with convolutional SNNs. Despite achieving high accuracy in classification, the efficient extraction of spatiotemporal features from audio events continues to be a substantial challenge. In this study, we introduce dynamic time-surface neurons (DTSNs) using volatile memristors featuring an adjustable temporal kernel decay, enabled by series-connected transistors with an Au/LiCoO2/Au configuration. DTSNs act as feature descriptors, enhancing the spatiotemporal feature extraction from event audio data. A two-layer SNN classifier, fully connected and incorporating a 1T1R nonvolatile memristor array, is trained to recognize the spatiotemporal features of the audio data. Our findings show classification accuracies of up to 95.91%, substantial improvements in computational efficiency, and increased noise resilience, confirming the promise of our memristor-based speech recognition system for practical applications. [ABSTRACT FROM AUTHOR]

In this work, a grounded charge-controlled memcapacitor emulator circuit based on a Voltage Difference Current Conveyor (VDCC) is presented. The proposed circuit is constructed with only one VDCC element and four MOSFETs. It has a transistor-based structure without the use of any passive components. The absence of any passive components makes the circuit eliminating the need for complicated analog components. The suggested circuit does away with the necessity for a mutator, which eliminates the need for an additional separate memristor emulator. The analog multiplier circuit is also not used. Additionally, the designed memcapacitor circuit allows for independent electronic control of both the fixed and variable components, adding to its flexibility and adaptability. To demonstrate the accuracy of the suggested circuit, a SPICE simulation was run using a VDCC constructed with 0.18 μm TSMC CMOS transistors. [ABSTRACT FROM AUTHOR]

For processing streaming events from a Dynamic Vision Sensor camera, two types of neural networks can be considered. One are spiking neural networks, where simple spike-based computation is suitable for low-power consumption, but the discontinuity in spikes can make the training complicated in terms of hardware. The other one are digital Complementary Metal Oxide Semiconductor (CMOS)-based neural networks that can be trained directly using the normal backpropagation algorithm. However, the hardware and energy overhead can be significantly large, because all streaming events must be accumulated and converted into histogram data, which requires a large amount of memory such as SRAM. In this paper, to combine the spike-based operation with the normal backpropagation algorithm, memristor–CMOS hybrid circuits are proposed for implementing event-driven neural networks in hardware. The proposed hybrid circuits are composed of input neurons, synaptic crossbars, hidden/output neurons, and a neural network's controller. Firstly, the input neurons perform preprocessing for the DVS camera's events. The events are converted to histogram data using very simple memristor-based latches in the input neurons. After preprocessing the events, the converted histogram data are delivered to an ANN implemented using synaptic memristor crossbars. The memristor crossbars can perform low-power Multiply–Accumulate (MAC) calculations according to the memristor's current–voltage relationship. The hidden and output neurons can convert the crossbar's column currents to the output voltages according to the Rectified Linear Unit (ReLU) activation function. The neural network's controller adjusts the MAC calculation frequency according to the workload of the event computation. Moreover, the controller can disable the MAC calculation clock automatically to minimize unnecessary power consumption. The proposed hybrid circuits have been verified by circuit simulation for several event-based datasets such as POKER-DVS and MNIST-DVS. The circuit simulation results indicate that the neural network's performance proposed in this paper is degraded by as low as 0.5% while saving as much as 79% in power consumption for POKER-DVS. The recognition rate of the proposed scheme is lower by 0.75% compared to the conventional one, for the MNIST-DVS dataset. In spite of this little loss, the power consumption can be reduced by as much as 75% for the proposed scheme. [ABSTRACT FROM AUTHOR]

Neuromorphic computing is a promising paradigm for developing energyefficient and high-performance artificial intelligence systems. The unique properties of lithium niobate-based (LiNbO3)-based memristors, such as low power consumption, non-volatility, and high-speed switching, make them ideal candidates for synaptic emulation in neuromorphic systems. This study investigates the potential of LiNbO3-based memristors to revolutionize neuromorphic computing by exploring their synaptic behavior and optimizing device parameters, as well as harnessing the potential of LiNbO3-based memristors to create efficient and high-performance neuromorphic computing systems. By realizing efficient and high-speed neural networks, this literature review aims to pave the way for innovative artificial intelligence systems capable of addressing complex real-world challenges. The results obtained from this investigation will be crucial for future researchers and engineers working on designing and implementing LiNbO3-based neuromorphic computing architectures. [ABSTRACT FROM AUTHOR]

Molybdenum disulfide, a two-dimensional material extensively explored for potential applications in non-von Neumann computing technologies, has garnered significant attention owing to the observed hysteresis phenomena in MoS2 FETs. The dominant sources of hysteresis reported include charge trapping at the channel–dielectric interface and the adsorption/desorption of molecules. However, in MoS2 FETs with different channel thicknesses, the specific nature and density of defects contributing to hysteresis remain an intriguing aspect requiring further investigation. This study delves into memristive devices with back-gate modulated channel layers based on CVD-deposited flake-based and thin-film-based MoS2 FETs, with a few-layer (FL) and thin-film (TF) channel thickness. Analysis of current–voltage ( I − V ) and conductance–frequency ( G p / ω − f ) measurements led to the conclusion that the elevated hysteresis observed in TF MoS2 devices, as opposed to FL devices, stems from a substantial contribution from intrinsic defects within the channel volume, surpassing that of interface defects. This study underscores the significance of considering both intrinsic defects within the bulk and the interface defects of the channel when analyzing hysteresis in MoS2 FETs, particularly in TF FETs. The selection between FL and TF MoS2 devices depends on the requirements for memristive applications, considering factors such as hysteresis tolerance and scaling capabilities. [ABSTRACT FROM AUTHOR]

Neuromorphic devices are one of the promising electronic devices that are implementing artificial neural networks and substituting for traditional semiconductor devices in recent years. Inorganic halide perovskite (IMHP) is considered as an advantageous material to constitute neuromorphic components. Herein, the CsPbIBr2 memristor displays superior resistive‐switching properties under various temperature and storage periods. In addition, synaptic plasticity, including paired pulse facilitation and spiking timing‐dependent plasticity, is observed for CsPbIBr2 device, whose resistance manipulation is also established in both DC and pulse modes. Moreover, the decimal operation function of numbers by applying pulse stimulation to the device to regulate the device conductance is realized. This work demonstrates the feasibility of IMHP in neuromorphic devices, accelerating the application of neuromorphic computing. [ABSTRACT FROM AUTHOR]

Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units operating in parallel. The low communication bandwidth between memory and processing units in conventional von Neumann machines does not support the requirements of emerging applications that rely extensively on large sets of data. More recent computing paradigms, such as high parallelization and near-memory computing, help alleviate the data communication bottleneck to some extent, but paradigm- shifting concepts are required. Memristors, a novel beyond-complementary metal-oxide-semiconductor (CMOS) technology, are a promising choice for memory devices due to their unique intrinsic device-level properties, enabling both storing and computing with a small, massively-parallel footprint at low power. Theoretically, this directly translates to a major boost in energy efficiency and computational throughput, but various practical challenges remain. In this work we review the latest efforts for achieving hardware-based memristive artificial neural networks (ANNs), describing with detail the working principia of each block and the different design alternatives with their own advantages and disadvantages, as well as the tools required for accurate estimation of performance metrics. Ultimately, we aim to provide a comprehensive protocol of the materials and methods involved in memristive neural networks to those aiming to start working in this field and the experts looking for a holistic approach. Memristors hold promise for massively-parallel computing at low power. Aguirre et al. provide a comprehensive protocol of the materials and methods for designing memristive artificial neural networks with the detailed working principles of each building block and the tools for performance evaluation. [ABSTRACT FROM AUTHOR]

Deep neural networks have revolutionized several domains, including autonomous driving, cancer detection, and drug design, and are the foundation for massive artificial intelligence models. However, hardware neural network reports still mainly focus on shallow networks (2 to 5 layers). Implementing deep neural networks in hardware is challenging due to the layer-by-layer structure, resulting in long training times, signal interference, and low accuracy due to gradient explosion/vanishing. Here, we utilize negative ultraviolet photoconductive light-emitting memristors with intrinsic parallelism and hardware-software co-design to achieve electrical information's optical cross-layer transmission. We propose a hybrid ultra-deep photoelectric neural network and an ultra-deep super-resolution reconstruction neural network using light-emitting memristors and cross-layer block, expanding the networks to 54 and 135 layers, respectively. Further, two networks enable transfer learning, approaching or surpassing software-designed networks in multi-dataset recognition and high-resolution restoration tasks. These proposed strategies show great potential for high-precision multifunctional hardware neural networks and edge artificial intelligence. Parallel information transmission components and hardware strategies are still lacking in neural networks. Here, the authors propose a strategy to use light emitting memristors with negative ultraviolet photoconductivity and intrinsic parallelism to construct direct information cross-layer modules. [ABSTRACT FROM AUTHOR]

Deep neural networks have achieved considerable success over the past ten years in a variety of fields. However, current state-of-the-art artificial intelligence (AI) systems require large computing hardware infrastructure and high power consumption. To overcome these hurdles, it is required to adopt new strategies such as designing novel computation architectures and developing building blocks that can mimic the low energy consumption of biological systems. On the architecture level, implementing classification tasks by splitting the problem into simpler subtasks is a way to relax hardware constraints despite the less accuracy of the approach. On the computation unit level, memristive devices are a promising technology for low power neuromorphic computation. Hereby, we combine both these two approaches and present a novel algorithmic approach for multiclass classification tasks through splitting the problem into binary subtasks while using optoelectronics memristors as synapses. Our approach leverages the core fundamentals from the One-vs-One (OvO) and the One-vs-Rest (OvR) classification strategies towards a novel Outcome-Driven One-vs-One (ODOvO) approach. The light modulation of synaptic weights, fed in our algorithm from experimental data, is a key enabling parameter that permits classification without modifying further applied electrical biases. Our approach requires at least a 10X less synapses (only 196 synapses are required) while reduces the classification time by up to N 2 compared to conventional memristors. We show that the novel ODOvO algorithm has similar accuracies to OvO (reaching over 60% on the MNIST dataset) while requiring even fewer iterations compared to the OvR. Consequently, our approach constitutes a feasible solution for neural networks where key priorities are the minimum energy consumption i.e., small iterations number, fast execution, and the low hardware requirements allowing experimental verification. [ABSTRACT FROM AUTHOR]

While transition‐metal thiophosphate (MPX3) materials have been a subject of extensive research in recent years, experimental studies on MPX3‐based memristors are still in their early stages, with device performance being less than ideal. Here, the successful fabrication of high‐yield, high‐performance, and uniform memristors are demonstrated to possess desired characteristics for neuromorphic computing using a single‐crystalline few‐layered manganese phosphorus trisulfide (MnPS3) as a resistive switching medium. The Ti/MnPS3/Au memristor exhibits small switching voltage (<1 V), long memory retention (104 s), fast switching speed (≈20 ns), high On/Off ratio (nearly two orders of magnitude), and simultaneously achieves emulation of synaptic weight plasticity. The microscopic investigation of the structural and chemical characteristics of the few‐layer MnPS3 reveals the presence of structural defects and residual Ti throughout the stacked layer following the application of voltage, which contributes to the uniformity of switching with a low set voltage. With highly linear and symmetric analog weight updates coupled with the capability of accurate decimal arithmetic operations, a high accuracy of 95.15% in supervised learning using the MNIST handwritten recognition dataset is achieved in the artificial neural network. Furthermore, convolutional image processing can be implemented using hardware multiply‐and‐accumulate operation in an experimental memristor crossbar array. [ABSTRACT FROM AUTHOR]

The traditional von Neumann architecture of computers, constrained by the inherent separation of processing and memory units, faces challenges, for instance, memory wall issue. Neuromorphic computing and in-memory computing offer promising paradigms to overcome the limitations of additional data movement and to enhance computational efficiency. In this work, transfer-free flexible memristors based on hexagonal boron nitride films were proposed for analog neuromorphic and digital memcomputing. Analog memristors were prepared; they exhibited synaptic behaviors, including paired-pulse facilitation and long-term potentiation/depression. The resistive switching mechanism of the analog memristors were investigated through transmission electron microscopy. Digital memristors were prepared by altering the electrode materials, and they exhibited reliable device performance, including a large on/off ratio (up to 106), reproducible switching endurance (>100 cycles), non-volatile characteristic (>60 min), and effective operating under bending conditions (>100 times). [ABSTRACT FROM AUTHOR]

Memristive devices being applied in neuromorphic computing are envisioned to significantly improve the power consumption and speed of future computing platforms. The materials used to fabricate such devices will play a significant role in their viability. Graphene is a promising material, with superb electrical properties and the ability to be produced in large volumes. In this paper, we demonstrate that a graphene-based memristive device could potentially be used as synapses within spiking neural networks (SNNs) to realise spike timing-dependant plasticity for unsupervised learning in an efficient manner. Specifically, we verify the operation of two SNN architectures tasked for single-digit (0–9) classification: (i) a single layer network, where inputs are presented in 5 × 5 pixel resolution, and (ii) a larger network capable of classifying the dataset. Our work presents the first investigation and large-scale simulation of the use of graphene memristive devices to perform a complex pattern classification task. In favour of reproducible research, we will make our code and data publicly available. This can pave the way for future research in using graphene devices with memristive capabilities in neuromorphic computing architectures. [ABSTRACT FROM AUTHOR]

Stochastic resonance is an essential phenomenon in neurobiology, it is connected to the constructive role of noise in the signals that take place in neuronal tissues, facilitating information communication, memory, etc. Memristive devices are known to be the cornerstone of hardware neuromorphic applications since they correctly mimic biological synapses in many different facets, such as short/long-term plasticity, spike-timing-dependent plasticity, pair-pulse facilitation, etc. Different types of neural networks can be built with circuit architectures based on memristive devices (mostly spiking neural networks and artificial neural networks). In this context, stochastic resonance is a critical issue to analyze in the memristive devices that will allow the fabrication of neuromorphic circuits. We do so here with h-BN based memristive devices from different perspectives. It is found that the devices we have fabricated and measured clearly show stochastic resonance behaviour. Consequently, neuromorphic applications can be developed to account for this effect, that describes a key issue in neurobiology with strong computational implications. [ABSTRACT FROM AUTHOR]

Implementing and integrating spiking neurons for neuromorphic hardware realization conforming to spiking neural networks holds great promise in enabling efficient learning and decision‐making. The spiking neurons, however, may lack the spiking dynamics to encode the dynamical information in complex real‐world problems. Herein, using filamentary memristors from solution‐processed hexagonal boron nitride, this study assembles leaky integrate‐and‐fire spiking neurons and, particularly, harnesses the common switching stochasticity feature in the memristors to allow key neural dynamics, including Poisson‐like spiking and adaptation. The neurons, with the dynamics fitted via hardware‐algorithm codesign, suggest a potential in realizing spike‐based neuromorphic hardware capable of handling complex problems. Simulation of an autoencoder for anomaly detection of time‐series real analog and digital data from physical systems is demonstrated, underscoring its promising prospect in applications, especially, at the edges with limited computation resources, for instance, auto‐pilot, manufacturing, wearables, and Internet of things. [ABSTRACT FROM AUTHOR]

Spiking Neural Networks (SNNs) are energy-efficient artificial neural network models that can carry out data-intensive applications. Energy consumption, latency, and memory bottleneck are some of the major issues that arise in machine learning applications due to their data-demanding nature. Memristor-enabled Computing-In-Memory (CIM) architectures have been able to tackle the memory wall issue, eliminating the energy and time-consuming movement of data. In this work we develop a scalable CIM-based SNN architecture with our fabricated two-layer memristor crossbar array. In addition to having an enhanced heat dissipation capability, our memristor exhibits substantial enhancement of 10% to 66% in design area, power and latency compared to state-of-the-art memristors. This design incorporates an inter-spike interval (ISI) encoding scheme due to its high information density to convert the incoming input signals into spikes. Furthermore, we include a time-to-first-spike (TTFS) based output processing stage for its energy-efficiency to carry out the final classification. With the combination of ISI, CIM and TTFS, this network has a competitive inference speed of 2μs/image and can successfully classify handwritten digits with 2.9mW of power and 2.51pJ energy per spike. The proposed architecture with the ISI encoding scheme can achieve ∼10% higher accuracy than those of other encoding schemes in the MNIST dataset. [ABSTRACT FROM AUTHOR]

Artificial synaptic devices made from natural biomaterials capable of emulating functions of biological synapses, such as synaptic plasticity and memory functions, are desirable for the construction of brain-inspired neuromorphic computing systems. The metal/dielectric/metal device structure is analogous to the pre-synapse/synaptic cleft/post-synapse structure of the biological neuron, while using natural biomaterials promotes ecologically friendly, sustainable, renewable, and low-cost electronic devices. In this work, artificial synaptic devices made from honey mixed with carbon nanotubes, honey-carbon nanotube (CNT) memristors, were investigated. The devices emulated spike-timing-dependent plasticity, with synaptic weight as high as 500%, and demonstrated a paired-pulse facilitation gain of 800%, which is the largest value ever reported. 206-level long-term potentiation (LTP) and long-term depression (LTD) were demonstrated. A conduction model was applied to explain the filament formation and dissolution in the honey-CNT film, and compared to the LTP/LTD mechanism in biological synapses. In addition, the short-term and long-term memory behaviors were clearly demonstrated by an array of 5 × 5 devices. This study shows that the honey-CNT memristor is a promising artificial synaptic device technology for applications in sustainable neuromorphic computing. [ABSTRACT FROM AUTHOR]

Advances in materials science and memory devices work in tandem for the evolution of Artificial Intelligence systems. Energy-efficient computation is the ultimate goal of emerging memristor technology, in which the storage and computation can be done in the same memory crossbar. In this work, an analog memristor device is fabricated utilizing the unique characteristics of single-wall carbon nanotubes (SWCNTs) to act as the switching medium of the device. Via the planar structure, the memristor device exhibits analog switching ability with high state stability. The device's conductance and capacitance can be tuned simultaneously, increasing the device's potential and broadening its applications' horizons. The multi-state storage capability and long-term memory are the key factors that make the device a promising candidate for bio-inspired computing applications. As a demonstrator, the fabricated memristor is deployed in spiking neural networks (SNN) to exploit its analog switching feature for energy-efficient classification operation. Results reveal that the computation-in-memory implementation performs Vector Matrix Multiplication with 95% inference accuracy and few femtojoules per spike energy efficiency. The memristor device presented in this work opens new insights towards utilizing the outstanding features of SWCNTs for efficient analog computation in deep learning systems. [ABSTRACT FROM AUTHOR]

Memristive devices with threshold switching characteristics can be effectively utilized to mimic biological neurons acting as one of the key building blocks for constructing advanced hardware neural networks. In this work, the emulation of leaky integrate‐and‐fire memristive neuron is realized in one single cell with Ag/Ag−In−Zn−S/silk sericin/W architecture without the need for additional auxiliary circuits. The studied devices demonstrate excellent electrical properties, such as stably repeatable threshold switching, concentratedly low threshold voltage (≈0.4 V), and relatively small device‐to‐device variation. In addition, multiple neural features, such as leaky integrate‐and‐fire neuron functionality and strength‐modulated spike frequency characteristic, have been successfully emulated owing to the forming‐free volatile threshold switching effect. The stable volatile threshold switching behaviors and regular firing event may be attributed to the controllable metallic Ag filamentary mechanism. Furthermore, a solid accuracy of 91.44% of the pattern recognition of Modified National Institute of Standards and Technology (MNIST) data is obtained via a trained spiking neural network (SNN) based on the leaky integrate‐and‐fire behavior of sericin‐based device. These achievements shed light on the fact that employing sericin biomaterials has great application potential in advanced neuromorphic computation. [ABSTRACT FROM AUTHOR]

With the rapid progress of intelligent vision of the Internet of Things, the gap between the resultant high-level demands and conventional silicon-based hardware architectures is continuously widening. Biomimetic artificial neural networks (ANNs) have recently been proposed to solve this problem. However, they still face the predicaments in uniformity, heterogeneous integration, and hardware implementation, etc. Here we demonstrate an intelligent vision ANN with two-dimensional material (2DM)/molecular ferroelectric (MF) bilayer electronic/optoelectronic memristors. In contrast to conventional ferroelectric transistors, in-plane ferroelectric polarization was also found to enable a simpler two-terminal structure with a lateral p/n-type doping in the adjacent 2DM layer. After a demonstration of fabricated array and board-level driving circuits, an image recognition and classification task is proposed, reaching an accuracy of 85.2%, which implies great potential towards multi-modal artificial intelligent vision systems.

Employing suitable materials and device engineering is one of the crucial methods toward the realization of multifunctional memristive devices for constructing bioinspired neuromorphic systems. In this work, dual-functional memristors composed of eco-friendly natural silk sericin, coexistently enabling the achievement of threshold switching and memory switching triggered by adjusting the compliance current value, have been fabricated with a specific two-terminal device structure: Ag/Ag−In−Zn−S/silk sericin/W. Experimentally, the as-manufactured memristors exhibit several desirable qualities, such as low switching voltage (< 0.7 V), relatively small cycle-to-cycle and device-to-device variabilities, nonvolatile multilevel storage characteristics, and rapid switching speed (40 ns). Beyond these qualities, fundamental synaptic behaviors, such as paired-pulse facilitation and spike-timing-dependent plasticity (STDP), have been mimicked. This was made possible by a filamentary mechanism based on Ag migration. The fitted time constants corresponding to the STDP potentiation and depression are about 30 ms, and the highest changes in synaptic weight for positive and negative voltage pulses are 84.4% and 61.7%, respectively. Furthermore, the typical coincidence detection task has been executed, demonstrated by simulation based on the fitted STDP's parameters of the sericin-based device. The results from this study indicate that the sericin-based memristors, as designed, have the potential to be employed in the creation of versatile neuromorphic devices for neuromorphic computing systems. [ABSTRACT FROM AUTHOR]

Image stabilization is a crucial field in machine vision, aiming to eliminate image blurring or distortion caused by the camera or object jitter. However, traditional image stabilization techniques often suffer from the drawbacks of requiring complex equipment or extensive computing resources, resulting in inefficiencies. In contrast, the human retina performs a highly efficient all‐in‐one system, encompassing the detection and processing of light stimuli. In this study, an all‐optically controlled retinomorphic memristor based on the CsxFAyMA1‐x‐yPb(IzBr1‐z)3 is proposed, which integrates perception, storage, and processing functions. This memristor exhibits significant advantages in image stabilization. It is capable of positively and negatively modulating its conductance using specific intensities (11.8 and 0.9 mW cm−2, respectively) of red light (630 nm). To demonstrate the effectiveness of the proposed approach, handwritten digit recognition simulations are conducted. The application of specific light stimuli effectively highlights the characteristics of blurred images. The processed images are then fed into a conductance‐mapped neural network for rapid recognition. Remarkably, the recognition rates of the processed images reach 83.5% after 19 000 iterations, surpassing the performance of blurred images (only 56.2% after 19 000 iterations). These results highlight the immense potential of retinomorphic memristors as the hardware foundation for next‐generation image stabilization systems. [ABSTRACT FROM AUTHOR]

Competitive‐learning‐based spiking neural networks are capable of rapid, highly accurate pattern recognition with minimal data through denoising mechanisms provide by adaptive interneuron inhibition. However, hardware implementations of such networks are currently area‐inefficient due to the high device count require to execute dual excitatory‐inhibitory synapses. To mitigate this, n‐/p‐ reconfigurable tungsten diselenide memtransistors is introduced that can execute excitatory and inhibitory synapses in a highly compact bio‐inspired feature extractor hardware architecture. The reconfigurability is realized through a dual mode memory device with a flash‐memory‐like floating‐gate for n‐/p‐ programing and a memristor‐like selenium vacancy‐based resistive switching that varies in memristive output with majority carrier modulation. Through a device‐system codesign, an effective 27% device count reduction in the peripheral circuits is achieved , which ameliorates circuit component congestion and circuit complexity. Compared to the prevalent winner‐takes‐all approach, the proposed machine learning with adaptive interneuron inhibition achieves high‐accuracy convergence with up to five times smaller training dataset. This accelerated learning can potentially enable edge‐artificial intelligence (AI) processors capable of ultra‐low‐energy training with limited data. [ABSTRACT FROM AUTHOR]

Emerging intelligence applications, such as brain-inspired and in-memory computing, require memory with faster read/write speeds, higher integration, and lower energy consumption. To tackle these challenges, memristors, a type of synaptic device, are considered ideal candidates due to their potential for emulating biological synaptic connections. In this study, a two-dimensional (2D) heterostructure of tellurene/Nb-doped MoS2 (MoS2:Nb) was used as the resistive switching layer to fabricate memristors. By varying the maximum working voltage, the fabricated device can switch between one and two-memory windows, which can be used to imitate the postsynaptic inhibition effect. This is attributed to the competition between the drift and diffusion of the S vacancy in the MoS2:Nb layer, which can modulate the contact Schottky barrier in the material interfaces. Furthermore, biological synapse effects, such as long-term depression and long-term potentiation, can be well mimicked by applying several voltage pulses to the device with good repeatability. This study advances the device physics for understanding the physical working mechanism of the 2D memristor, which can benefit the realization of bio-realistic neuromorphic computing systems based on such memristors. [ABSTRACT FROM AUTHOR]

The von Neumann architecture has faced challenges requiring high-fulfillment levels due to the performance gap between its processor and memory. Among the numerous resistive-switching random-access memories, the properties of hexagonal boron nitride (BN) have been extensively reported, but those of amorphous BN have been insufficiently explored for memory applications. Herein, we fabricated a Pt/BN/TiN device utilizing the resistive switching mechanism to achieve synaptic characteristics in a neuromorphic system. The switching mechanism is investigated based on the I–V curves. Utilizing these characteristics, we optimize the potentiation and depression to mimic the biological synapse. In artificial neural networks, high-recognition rates are achieved using linear conductance updates in a memristor device. The short-term memory characteristics are investigated in depression by controlling the conductance level and time interval. [ABSTRACT FROM AUTHOR]

The booming development of artificial intelligence (AI) requires faster physical processing units as well as more efficient algorithms. Recently, reservoir computing (RC) has emerged as an alternative brain‐inspired framework for fast learning with low training cost, since only the weights associated with the output layers should be trained. Physical RC becomes one of the leading paradigms for computation using high‐dimensional, nonlinear, dynamic substrates. Among them, memristor appears to be a simple, adaptable, and efficient framework for constructing physical RC since they exhibit nonlinear features and memory behavior, while memristor‐implemented artificial neural networks display increasing popularity towards neuromorphic computing. In this review, the memristor‐implemented RC systems from the following aspects: architectures, materials, and applications are summarized. It starts with an introduction to the RC structures that can be simulated with memristor blocks. Specific interest then focuses on the dynamic memory behaviors of memristors based on various material systems, optimizing the understanding of the relationship between the relaxation behaviors and materials, which provides guidance and references for building RC systems coped with on‐demand application scenarios. Furthermore, recent advances in the application of memristor‐based physical RC systems are surveyed. In the end, the further prospects of memristor‐implemented RC system in a material view are envisaged. [ABSTRACT FROM AUTHOR]

[Display omitted] • ZnO-based MIM systems for resistive switching memory devices. • Exploring synaptic memories for storage capacity and related challenges to manage. • Recent progress and future perspectives of memory storage, retention, and endurance. • Types of switching for possible application of synaptic memory mechanisms are described. • State-of-art of memory devices for developing IoT and the use of AI. Neuromorphic computing systems inspired by the human brain emulate biological synapses electronically for information handling and processing. Recently, memristive switching devices so-called 'memristors' are emerging as an essential constituent of artificial intelligence (AI) and internet-of-thing (IoT) circuits toward the development of energy-efficient intelligent systems proficient with neuromorphic computing features to huddle up the current limits of the conventional von Neumann computing system. Memristors have gained attention to realizing artificial synapses by altering resistance analogous to biological counterparts. ZnO-based memristors allow the formation of two-terminal crossbar architectures with metal/insulator/metal (MIM) cells (i.e., top electrode/active layer/bottom electrode), and the device's interactivity can be drastically increased. The availability of multiple resistance states in ZnO-based memristors can lead to high-density data storage capacity and artificial synapse. In this review, we discussed the state-of-art of n-type ZnO-polymer (n-ZnO:Poly) hybrid nanocomposite-based memristors, focusing on their intrinsic mechanisms of resistive switching, progress, advancement, and the challenges to the development of high-performance memristive devices. Additionally, the synaptic functions of n-ZnO:Poly nanocomposite-based memristors are explored as artificial synapses for neural networks to emulate synaptic plasticity. Finally, the key requirements for AI and IoT electronics are highlighted in the future perspectives and opportunities for the development of low-power and high-density memristors as artificial synapses with synaptic weight tunability and reliable synaptic plasticity. [ABSTRACT FROM AUTHOR]

Artificial neural networks (ANNs) have gained considerable momentum in the past decade. Although at first the main task of the ANN paradigm was to tune the connection weights in fixed-architecture networks, there has recently been growing interest in evolving network architectures toward the goal of creating artificial general intelligence. Lagging behind this trend, current ANN hardware struggles for a balance between flexibility and efficiency but cannot achieve both. Here, we report on a novel approach for the on-demand generation of complex networks within a single memristor where multiple virtual nodes are created by time multiplexing and the non-trivial topological features, such as small-worldness, are generated by exploiting device dynamics with intrinsic cycle-to-cycle variability. When used for reservoir computing, memristive complex networks can achieve a noticeable increase in memory capacity a and respectable performance boost compared to conventional reservoirs trivially implemented as fully connected networks. This work expands the functionality of memristors for ANN computing. Designing efficient AI hardware capable of creating artificial general intelligence remains a challenge. Here, the authors present an approach for the on-demand generation of complex networks within a single memristor by harnessing device dynamics with intrinsic cycle-to-cycle variability and demonstrate the effectiveness of memristive complex network-based reservoirs. [ABSTRACT FROM AUTHOR]

Various memristive devices have been proposed for use in neuromorphic computing systems as artificial synapses. Analog synaptic devices with linear conductance updates during training are efficiently essential to train neural networks. Although many different analog memristors have been proposed, a more reliable approach to implement analog synaptic devices is needed. In this study, we propose the memristor of a Cu/SiOx/implanted a-SiGex/p++ c-Si structure containing an a-Si layer with properly controlled conductance through Ge implantation. The a-SiGex layer plays a multifunctional role in device operation by limiting the current overshoot, confining the heat generated during operation and preventing the silicide formation reaction between the active metal (Cu) and the Si bottom electrode. Thus, the a-SiGex interface layer enables the formation of multi-weak filaments and induces analog switching behaviors. The TEM observation shows that the insertion of the a-SiGex layer between SiOx and c-Si remarkably suppresses the formation of copper silicide, and reliable set/reset operations are secured. The origin of the analog switching behaviors is discussed by analyzing current-voltage characteristics and electron microscopy images. Finally, the memristive-neural network simulations show that our developed memristive devices provide high learning accuracy and are promising in future neuromorphic computing hardware. Breakthrough in neuromorphic hardware: the advanced memristor Researchers develop a multilayered memristor with gradual switching behavior for neuromorphic computing applications. The device consists of Cu/SiOx/a-SiGex/c-Si layers, and its resistance is controlled by varying the implantation dose of Ge ions. This approach suppresses abrupt switching and induces gradual switching in CBRAM devices, enabling precise modulation of conductance levels and improved performance in neuromorphic computing. The Cu-based bilayer device exhibits promising analog behavior, maintaining high on-off ratios through the insertion and conductivity tuning of the current limiting layer. Simulations using memristive neural networks show a high recognition efficiency approaching 90%, demonstrating the potential for Cu-based bilayer memristor devices as artificial synapses in neuromorphic computing systems. This work presents a design guide for anlog memristive devices for artificial synapses in neuromorphic computing. Ge implanted a-Si serves multiple fuctions to induce multifilamentary switching and prevent silicide formation. The linear synapse update behaviors were observed thanks to multi-filament formation, which was confirmed by TEM. [ABSTRACT FROM AUTHOR]

In order to create neuromorphic computing systems (NCSs) capable of efficiently solving artificial intelligence problems, elements with short- and long-term memory effects are required. Memristors are promising candidates for the implementation of such elements since they demonstrate volatile and nonvolatile resistive switching (RS) modes. Of particular interest are structures that realize both RS modes in a single device. In this work, parylene-based nanocomposite memristors with MoO3 nanoparticles have been studied in crossbar architecture, which is convenient for NCS implementation. For these structures, a reversible temperature-induced transition between volatile and nonvolatile RS modes was found if local, controlled via the compliance current, or external temperature is fine-tuned. In addition, the crossbar structures showed high endurance to cyclic RS, ability to retain states in nonvolatile mode and multilevel nature of RS. The obtained results open the possibility of using parylene-based crossbar structures in bioinspired NCSs. [ABSTRACT FROM AUTHOR]