Search

Support vector machines (SVM) present very interesting features in the field of image processing, but the intensive calculation needed complicates its use in real-time applications. We present an architecture for a SVM which simplifies most of the calculus using an optoelectronic matrix-vector multiplier (OMVM).

In this paper we present the scheme for a control circuit used in an image processing system which is to be implemented in a neural network which has a high level of connectivity and reconfiguration of neurons for integration and trigger based on the Address-Event Representation. This scheme will be employed as a pre-processing stage for a vision system which employs as its core processing an Optical Broadcast Neural Network (OBNN). [Optical Engineering letters 42 (9), 2488(2003)]. The proposed vision system allows the possibility to introduce patterns from any acquisition system of images, for posterior processing.

In this paper we investigate a hardware Pulse Couple Neural Network (PCNN) to be used as the pre-processing stage for a vision system which uses as processing core the Optical Broadcast Neural Network (OBNN) Processor [Optical Engineering Letters 42 (9), 2488 (2003)]. The temporal patterns are to remain constant independently of the position of the spatial pattern in the input image and its orientation. The objective is to obtain synchronous temporal patterns, with fixed pulse rates, from a determined spatial pattern.

We describe the implementation of a vision system based on a hardware neural processor. The architecture of the neural network processor has been designed to exploit the computational characteristics of electronics and the communication characteristics of optics in an optimal manner, thus it is based on an optical broadcast of input signals to a dense array of processing elements. The vision system has been built by use of a prototype implementation of a neural network processor with discrete optic and optoelectronic devices. It has been adapted to work as a Hamming classifier of the images taken with a 128 x 128 complementary metal-oxide semiconductor image sensor. Its results, performance characteristics of the image classification system, and an analysis of its scalability in size and speed, with the improvement of the optoelectronic neural processor, are presented.

In this paper we describe the implementation of a vision system based on an optoelectronic neural network architecture which is based on an optical broadcast interconnection scheme. The architecture of the neural network processor has been designed to exploit the computational characteristics of electronics and the communication characteristics of optics, thus it is based on an optical broadcast of input signals to a dense array of processing elements. In the proposed vision system, a CMOS sensor capture the image of an object, the output of the camera is introduced to the optoelectronic processor which compares the input image with a set of reference patterns, the optoelectronic processor provides the reference pattern that best match with the input image. The processing core of the system is an optoelectronic architecture that has been configured as a Hamming neural network.

We describe the hardware implementation of a Hamming classifier using an optoelectronic architecture. It is composed of two layers, the first layer is an optoelectronic matrix-vector multiplier based on the optical broadcast architecture; it is a novel architecture composed of a set of electronic neurons that receive the input sequentially by means of an optical broadcast interconnection. The second layer is an electronic winner take all circuit. The main characteristic of the system is that it is readily scalable in speed and size to large numbers of pixel neurons. We will describe the optoelectronic architecture, the hardware implementation of a prototype and evaluation of its performance characteristics.

This paper reports the recent steps to the attainment of a compact high-speed optoelectronic neuroprocessor based on an optical broadcast architecture that is used as the processing core of a vision system. The optical broadcast architecture is composed of a set of electronic processing elements that work in parallel and whose input is introduced by means of an optical sequential broadcast interconnection. Because of the special characteristics of the architecture, that exploits electronics for computing and optics for communicating, it is readily scalable in number of neurons and speed, thus improving the performance of the vision system. This paper focuses on the improvement of the optoelectronic system and electronic neuron design to increase operation speed with respect to previous designs.

This paper reports the recent steps to the attainment of a compact high-speed optoelectronic neuroprocessor based on an optical broadcast architecture. The optical broadcast architecture is composed of a set of electronic processing elements that work in parallel and whose input is introduced by means of an optical sequential broadcast interconnection. Because of the special characteristics of the architecture, that exploits electronics for computing and optics for communicating, it is readily scalable in number of neurons and speed. This paper focuses on the improvement of the optoelectronic system and electronic neuron design to increase operation speed with respect to previous prototype.

In this paper we propose of a novel hardware electronic-optoelectronic neural network processor for vision applications. The architecture of the proposed neuroprocessor is based on a hybrid optic and optoelectronic implementation of the system. Some neural operations, like interconnection weight storage and assignment, are done in the electronic domain while the interconnection between processing elements is done optically. By this way we exploit the communication strength of optics and the computational strength of electronics in an optical fashion. The main characteristics of the architecture are that it is fully interconnected, the interconnections are fully programmable, it avoids optical alignment problems, and it is readily scalable to large numbers of pixel neurons. We will describe the architecture, the hardware implementation of a first prototype and its functionality for pattern recognition applications. The neural network models we have implemented on our neuroprocessor have been a basic logic functions operator, a Hopfield network and the matching scores layer of a Hamming network.

In this paper we present an optoelectronic hardware implementation of a neural network system based on optoelectronic devices and electronic techniques. The system is composed of basic cells with optoelectronic artificial neurons; every basic cells exploits the communication strengths of optics to broadcast the input to all neurons and the computational strengths of electronics to assign the interconnections weights. Description of the architecture of the basic cell, the first implementation of a prototype based on the proposed system and examples of configuration of the neural system are described.

We describe the concept of a vision system based on an optoelectronic hardware neural processor. The proposed system is composed of a pulse coupled neural network (PCNN) preprocessor stage that converts an input image into a temporal pulsed pattern. These pulses are inputs to the optical broadcast neural network (OBNN) processor, which classifies the input pattern between a set of reference patterns based on a pattern matching strategy. The PCNN is to provide immunity to the scale, rotation, and translation of objects in the image. The OBNN provides high parallelism and a high speed hardware neural processor.

A novel, compact optoelectronic hardware neural network ar- chitecture based on an optical broadcast scheme is proposed and dem- onstrated. The basic cell in the system is composed of electronic neu- rons that share the same time-distributed, optical broadcast input. The system combines the computational strengths of electronics and the communication strengths of optics, and employs a modular reconfig- urable architecture that is potentially scalable to a very large number of neurons while maintaining compactness. These characteristics are real- ized in an architecture that combines the integration of the processing elements in complementary metal-oxide semiconductor (CMOS) tech- nology with the construction of efficient optical interconnection elements with focusing properties based on multiplexed volume holograms. © 2005 Society of Photo-Optical Instrumentation Engineers. (DOI: 10.1117/1.1902994) Subject terms: optical neural networks; complementary metal-oxide semiconduc- tor sensor arrays; electronic processing; optical interconnects; volume holograms.

We present the first implementation, results, and performance analysis of a vision system whose processing core is a prototype hardware neural network based on an optical broadcast architecture. The system captures an im- age by a CMOS image sensor, compares it with a set of sample patterns (classes), and provides an output that indi- cates the class which the input image corresponds to. Due to the optoelectronic neural processor characteristics, the num- ber of classes can be enlarged without penalty on the opera- tion speed of the system. © 2004 Society of Photo-Optical Instru

A new optoelectronic hardware architecture of a neural network processor is proposed. A basic cell in the system is composed of electronic neurons that share the same time-distributed input; the input is introduced by means of an optical broadcast. The system combines the computational strength of electronics and the communica- tion strength of optics in an optimal manner and it is poten- tially scalable to a very large number of neurons. A descrip- tion of the system is given and the behavior of a first prototype is shown. © 2003 Society of Photo-Optical Instrumentation