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The authors analyzed the electrical properties of MOS capacitors with thulium oxide (Tm2O3) gate dielectrics and evaluated the thickness-dependent properties. The authors observed that a thin silicate layer (instead of an SiO2 layer) with a thickness of less than 1 nm had formed between the Tm2O3 and Si substrate after an annealing process at 500 °C. The authors obtained an effective oxide thickness of 0.55 nm with dielectric constants of 18 and 12 for Tm2O3 and its silicate, respectively. The leakage current properties with different thicknesses have revealed sufficient suppression by 2 orders of magnitude from the required levels. However, conduction mechanism analyses and a model to explain the flatband voltage (Vfb) behavior on different thicknesses showed the presence of charged defects in the oxides, which were mostly located at the Tm2O3 and silicate interface. The effective mobility of nFET showed degraded properties by Coulomb scatterings, which were consistent with the Vfb shift. The less reactive properties of Tm2O3 are advantageous for gate oxide scaling in future MOS devices. [ABSTRACT FROM AUTHOR]

A sputtering process using multi-stacking of carbon and metal thin films with subsequent annealing process to reactively form metal carbides (TiC, TaC, and W2C) has been presented. Grain sizes of the carbides are as small as 3.9, 3.2, and 1.9 nm for TiC, TaC, and W2C, respectively. Work functions of TiC, TaC, and W2C layers have been extracted as 4.3, 4.7, and 4.9 eV, respectively, relatively high values due to oriented growth. W2C layer formed by the presented process gives high potential to form carbides with nano-sized grain and high work function for gate electrode application. [ABSTRACT FROM AUTHOR]

Abstract: Effect of W and TiN/W gate metal on the interface quality of La2O3/InGaAs metal–oxide-semiconductor (MOS) interface is investigated. Hard X-ray photoelectron spectroscopy revealed that gate metal greatly affects the oxidation states at La2O3/InGaAs interface after post-metallization annealing (PMA). Results demonstrate that TiN/W gate metal can effectively control the reaction at La2O3/InGaAs interface and also suppress the formation of As, Ga, and In oxides. As a result, superior capacitance–voltage (C–V) characteristics with low interface state density (D it) of 4.6×1011 cm−2/eV (∼0.1eV from midgap) and leakage current below 10−5 A/cm2 was obtained for TiN/W/La2O3 (10nm)/InGaAs MOS capacitors. The MOS structure integrity was preserved for annealing temperature up to 620°C. [Copyright &y& Elsevier]

Abstract: Interface reactions of a Ce-oxide layer with Si(100) wafers have been characterized by X-ray photoelectron spectroscopy. The ratio of Ce atoms in Ce3+ states within the Ce-oxide layer has been found to decrease from 47% at as-deposited sample to 26% after annealing. From detailed reaction analysis of valence number transitions of Ce atoms and the creation of SiO2 layer at the interface, the reacted Ce3+ atoms are converted into silicates and Ce4+ with a ratio of 2:1. The energy bandgap of Ce-silicate layer has been determined as 7.67 eV and the valence band offset with respect to Si(100) wafer has been extracted as 4.35 eV. [Copyright &y& Elsevier]