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The second paper [[4]] proposes instead a parametric fault diagnosis of analog circuits operating at a very high frequency and consisting of a Distributed Parameter Transmission Line (DPTL), terminated at both ends by lumped one-ports. Diagnosis, in its most general meaning, is the process aimed at identifying the causes that have produced a behavior, normally anomalous, in a system of either biological or artificial nature. 10.3390/electronics10050550 5 Aizenberg I., Belardi R., Bindi M., Grasso F., Manetti S., Luchetta A., Piccirilli M.C. A Neural Network Classifier with Multi-Valued Neurons for Analog Circuit Fault Diagnosis. [Extracted from the article]

A new procedure for the selection of test frequencies in the parametric fault diagnosis of analog circuits is presented. It is based on the evaluation of algebraic indices, as the condition number and the norm of the inverse, of a sensitivity matrix of the circuit under test. This matrix is obtained starting from the testability analysis of the circuit. A Test Index (T.I.) that permits the selection of the set of frequencies that better leads to locating parametric faults in analog circuits is defined. By exploiting symbolic analysis techniques, a program that implements the proposed procedure has been developed. It yields the requested set of frequencies by means of an optimization procedure based on a genetic algorithm that minimizes the T.I. Examples of the application of the proposed procedure are also included. [ABSTRACT FROM AUTHOR]

In this paper, we present a new method designed to recognize single parametric faults in analog circuits. The technique follows a rigorous approach constituted by three sequential steps: calculating the testability and extracting the ambiguity groups of the circuit under test (CUT); localizing the failure and putting it in the correct fault class (FC) via multi-frequency measurements or simulations; and (optional) estimating the value of the faulty component. The fabrication tolerances of the healthy components are taken into account in every step of the procedure. The work combines machine learning techniques, used for classification and approximation, with testability analysis procedures for analog circuits. [ABSTRACT FROM AUTHOR]