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Protection relays that incorporate advanced microprocessors are vital to electrical grids, providing fast and reliable responses to faulty conditions using efficient communication protocols. Instant detection and response to various faults are essential to minimise the risk of damage. Numerical relays can identify faulty conditions and trigger circuit breakers to open, thus preventing further damage to the system. Due to the lack of autonomous decision-making capabilities, existing numerical relays require manual reconfiguration in situations such as a change in network configuration and protection settings. These relays also do not have the ability to coordinate fault clearance when multiple sources supply power to the grid. A comprehensive overview of the research aimed at developing a multiagent system (MAS)- based adaptive protection relay will be provided by dividing it into separate articles such as firmware and hardware. This first part delves into the firmware aspects of this innovative relay, highlighting its adaptive capabilities and key considerations in its development. The second part will provide detailed design descriptions for the hardware features of the relay. An STM32MPU multicore advanced microprocessor is utilised to design and develop the adaptive numerical relay firmware. It incorporates several protection relay ANSI codes, communication protocols, and MAS-based adaptive protection schemes as part of the firmware. [ABSTRACT FROM AUTHOR]

Integrating multiple feeders and power sources into the electrical grid necessitates more robust protection systems. Existing numerical relays require manual reconfiguration of each relay for any network or protection setting modifications and are unable to effectively coordinate fault clearance when bidirectional energy flow is present. One of the major contributions of this work involves integrating adaptive protection features that enable automatic updating of protection configurations across all relays for any network configuration change, eliminating the need for manual adjustments and enhancing fault clearance coordination. This article, which is Part II of the series of articles derived from the research work conducted to develop a multi-agent system (MAS) based adaptive protection relay, delves into the hardware design of an adaptive protection relay. The complementary Part I article has covered the firmware aspect of the developed relay by providing a detailed discussion of the implemented adaptive algorithms. The hardware design encompasses various crucial modules, including the power supply, processor, digital input and output, analog input, and the Human–Machine Interface (HMI) modules. STM32MP157 microprocessor is utilized as the central processor handling all the firmware of the adaptive protection relay. Various adaptive protection coordination tests have been successfully conducted on the developed hardware modules. • Incorporating feeders and power sources requires a more advanced protection system. • Adaptive features auto-update protection settings for network configuration changes. • Adaptive features enhance fault clearance coordination in bidirectional energy flow. • Successful adaptive coordination is achieved by testing the hardware modules. [ABSTRACT FROM AUTHOR]