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Research and development of power factor corrector (PFC) for AC/DC converters of single-phase AC power supply network are discussed within this article. Two-channel bridgeless PFC is proposed in this paper. The proposed converter allows us to lower current DC component generation in the power network and to reduce static and dynamic losses of semiconductor devices. The suggested solution characteristic features are the absence of a diode bridge while using two identical converters operating in different power network voltage half periods. Due to cumulative chokes in each converter, the function setting the consumption current sinusoidal form is realized with the ability of wide-range output voltage regulation. A number of Simulink-models have been developed in order to study operating modes and to test control algorithms of the proposed bridgeless PFC. The input current harmonic content, efficiency coefficient, passive elements' electrical parameters, and output voltage pulsation coefficient of the proposed bridgeless PFC were researched by Simulink-models. The results obtained show the efficiency of the proposed solutions regarding PFC. The THD value does not exceed 1.3% in steady state mode and is not over 4% during the voltage stabilization process; the minimal value of the output voltage pulsation coefficient is 3.1%. The suggested solutions can be applied in accumulator batteries' charging sets and DC motors' reduced-current start. [ABSTRACT FROM AUTHOR]

This article presents a unique approach to designing an Improved Y Source Power Factor Correction converter with a Proportional–Integral–Derivative Controller (PIDC). The goal is to achieve precise control, enhanced stability, and improved power quality at the source side. The converter offers advantages like close to unity power factor, reduced source side distortion, and simplified component count, resulting in improved power quality and streamlined design for electric vehicle chargers. Compared to traditional controllers, the PIDC-based solution exhibits superior dynamic response with quick rise time and minimal overshoot. It effectively handles uncertainties and issues associated with conventional AC–DC converters. Using MATLAB/Simulink, the converter is modeled and compared with other converters. The steady-state performance of 2 kW converters with closed-loop control is extensively analyzed under varying source voltages and loading power conditions. The proposed solution demonstrates stable operation even under sudden disturbances in load or input voltage. Experimental results from a hardware prototype of the 650-W converter confirm excellent transient behavior and power quality performance. The proposed topology is theoretically analyzed and experimentally validated, revealing an approximate power factor of one and total harmonic distortion of the input current at 1.2 and 1.18%, respectively. The maximum operational efficiency achieved is 95.6 and 96.3%. This article contributes to power conversion technology advancement and serves as a comprehensive guide for designing robust controllers with precise control for improved power quality. [ABSTRACT FROM AUTHOR]

Recently, a new type of lighting source, deep ultraviolet light-emitting diode (LED), has appeared in the markets of space purification and surface sterilization. In this paper, a new type of electronic lighting driver for supplying a deep-ultraviolet LED sterilization lamp is proposed and developed. The main circuit combines a buck converter and a flyback converter into a single-stage single-switch buck-flyback AC-DC power converter with power factor correction. In addition, the proposed electronic lighting driver leverages a wide bandgap SiC Schottky diode as the output diode to lower the power diode losses and recycles the energy stored in the leakage inductance of the transformer in order to improve the circuit efficiency. The magnetizing inductor inside the presented AC-DC power converter is designed to operate in discontinuous conduction mode (DCM), which naturally enables power factor correction (PFC). A single-stage prototype driver with a power rating of 3.6 W (90 V/40 mA) was developed and implemented for providing a deep ultraviolet LED disinfection and sterilization lamp. Experimental results show that the measured power factor (PF) is greater than 0.9 and the measured total harmonic distortion (THD) of the input current is less than 18% at an input utility voltage of 110 V. Furthermore, the measured output voltage ripple factor is less than 1% and the output current ripple factor is less than 4%. In addition, the proposed single-stage electronic lighting driver for supplying a deep ultraviolet LED disinfection and sterilization lamp achieves high circuit efficiency (greater than 90%), low circuit component count, and low circuit cost. [ABSTRACT FROM AUTHOR]

Summary: Traditional multiple‐output AC‐DC power supply with power factor correction (PFC) function usually employs a two‐stage cascaded topology that is composed of prestage PFC converter and N independent poststage DC‐DC converters to achieve PFC and voltage or current regulation of N outputs. Hence, the conventional two‐stage cascaded multiple‐output AC‐DC power supply needs N + 1 magnetic components as power inductors or transformers and N + 1 controllers, which increases the cost and size of the multioutput converters. The conventional multiple‐string AC‐DC LED driving circuits usually employ a two‐stage topology to realize PFC and independent current regulation of each LED string. To address the issue of complexity, high cost, and large size of the two‐stage multistring LED driving circuit, a single‐stage triple‐output Cuk PFC converter is proposed by cascading boost converter and single‐inductor triple‐output buck converter with sharing main power switch in this paper. The topology operation principle, control strategy, design consideration, and operation characteristics of the proposed circuit are investigated in detail. With the switch sharing and inductor multiplexing technologies at the same time, the proposed converter utilizes only single‐stage converter to achieve PFC function, independent regulation of triple‐channel output current, and flicker‐free with low twice line frequency LED current ripple. The proposed converter is verified by a 50‐W experimental prototype of LED driver for triple string LEDs. The proposed converter only uses two power inductors and a set of controller to achieve greater than 0.945 PF, up to 90.5% efficiency, low LED current ripple, and independent current regulation for triple LED strings with different forward voltage, which may significantly reduce the cost and size of the traditional AC‐DC multistring LED driving circuit. [ABSTRACT FROM AUTHOR]

A totem-pole bridgeless boost converter is one of the most promising topologies for the power factor correction (PFC) stage in high-power applications due to its high efficiency and small number of components. However, due to the totem-pole structure of the field-effect transistor (FET), very high switching loss occurs via the reverse recovery current of the body diode. To solve these problems, critical mode (CRM) control is a good solution to achieve the valley switching technique. With valley switching of CRM control, the switching loss decreases drastically with decreasing turn-on voltage. But, although the CRM control enables valley switching, it is hard to make an exact valley switching control with general zero-voltage detection circuits. In addition, when a frequency limitation scheme is applied to prevent a very high frequency, the switch can operate with hard switching at the boundary of the frequency limitation. Furthermore, the CRM boost PFC has a low PF and high total harmonic distortion (THD) under light-load conditions due to the large negative current resulting from resonance between the inductor and parasitic capacitance. It becomes worse at near-zero input voltage since the resonance current becomes larger near zero-input voltage. Therefore, in this paper, a totem-pole bridgeless boost PFC converter with high efficiency, high PF, and low THD is developed using TMS320F28377 by Texas Instruments. Based on the basic digital structure of the totem-pole bridgeless converter, the proposed controls help with exact valley switching, PF and THD improvement, and frequency limitation. The prototype converter is verified using 90–264 VAC input voltages and 450 V/3.3 kW output specifications. [ABSTRACT FROM AUTHOR]

High‐power applications with low‐voltage (LV) dc loads, for example, fast charging stations for electric vehicles (EVs), are typically supplied from the medium‐voltage (MV) grid. Aiming for low volume, MVac‐LVdc solid‐state transformers (SSTs) that provide galvanic separation with medium‐frequency transformers (MFTs) are thus considered, which are conventionally realized as two‐stage systems that consist of an ac‐dc power‐factor‐correction (PFC) rectifier and an isolated dc‐dc converter. This letter extends a new single‐stage isolated bidirectional PFC rectifier concept to MV levels, resulting in an SST that performs MVac‐LVdc conversion in a single converter stage and, unlike many modular SST concepts, employs only a single MFT. The SST's primary side operates modular‐multilevel‐converter (MMC) bridge legs, whose input voltages contain large ac components, in the quasi‐two‐level mode to minimize the cell capacitors. The secondary side employs a standard LV three‐phase rectifier, and a dual‐active‐bridge‐(DAB)‐like modulation strategy allows power flow regulation and ensures sinusoidal grid currents. The concept is explained and validated using detailed circuit simulations of an exemplary 1‐MW system operating between a 10‐kV three‐phase grid and an 800‐V dc output. The component stresses are evaluated, and an efficiency of 98.1% and a power density of up to 0.6 kW/dm3 are estimated. [ABSTRACT FROM AUTHOR]

This paper presents the implementation for the first time of a Multi-Particle Swarm Optimization (MPSO) algorithm in the tuning of a PID controller for Power Factor Correction (PFC), applied to a 100W AC-DC boost converter. MPSO algorithm navigates in a search space where each dimension of the space corresponds to the controller constants (Proportional, Integral, Derivative and the Derivative Filter), prioritizing communication over exploration in the algorithm. The controller parameters are randomly initialized in a reduced sector of the space [ K p , K i , K d , K n ], to optimize the search for a PID solution. In the first step, the algorithm is validated using a simulation model in Simulink and Matlab. Subsequently, a final implementation using a real converter is implemented with the PID tuned by MPSO, improving the PFC obtained in previous work. Although previous works have used evolutionary algorithms applied to heuristic optimization to tunning PID controllers, the MPSO algorithm is not usually used for this purpose, particularly to tunning a PID controller in a power electronics system. One advantage of MPSO over the PSO classical algorithm is the search at different points if the vectorial field looks for an optimal solution. PSO presents problems such as getting stuck in a locally optimal solution. The PID controller is trained offline, with the advantage of allowing the risk of damage in the Boost converter for transitory response, increasing the performance of the Power Factor Correction in the converter. This research opens the possibility to use the extended version of the PSO bioinspired algorithm to tune offline controllers to improve the power converter's performance, minimizing the risk presented in the real-time tuning process. [ABSTRACT FROM AUTHOR]

The traditional light source of projection lamps adopts a halogen lamp, which has the advantages of high brightness, but its luminous efficiency is not good and consumes energy. A light-emitting diode (LED) has the characteristics of high luminous efficiency and energy savings and can be used as a new light source for projection lamps. The conventional two-stage electronic lighting driver circuit for supplying an LED projection lamp is composed of an AC-DC converter with power factor correction (PFC) as the first stage and a DC-DC converter for providing rated lamp voltage and current as the second stage. The conventional LED projection lamp driver circuit has more circuit components, a higher cost and limited efficiency. Therefore, this paper proposes a novel electronic lighting driver circuit for supplying an LED projection lamp with PFC function, which integrates a modified stacked dual boost converter and a half-bridge LLC resonant converter into a single-stage power-conversion circuit. The inductor inside the modified stacked boost converter is designed to operate at discontinuous conduction mode (DCM) for the driver circuit achieving PFC. Wide bandgap semiconductor devices silicon carbide (SiC)-based Schottky diodes are utilized to reduce power diode losses, and soft switching is implemented in the proposed LED projector lamp driver circuit to reduce the switching losses of the power switches and thus improve circuit efficiency. This paper has completed a single-stage prototype driver circuit for an LED projection lamp with PFC function, and the prototype circuit has a high power factor (PF > 0.98), low input current total-harmonic-distortion (THD < 6%) and high efficiency (>89%) in the case of an AC input power supply with an RMS value of 110 volts, and both power switches have the characteristics of soft switching. [ABSTRACT FROM AUTHOR]

Summary: This paper proposes a power factor correction (PFC) method in a single‐phase AC/DC converter using a predictive control algorithm (PCA) through a boost DC/DC converter. The minimum value of the DC‐link capacitor has been evaluated on the DC distribution side for stable operation of the converter. The proposed technique can be applied to the cascade connection of the converters, that is, the uncontrolled rectifier with boost converter and load. The value of the minimum capacitance is obtained as a function of the reference voltage of the DC‐link capacitor, the frequency of the supply, the input power, and the maximum DC‐link voltage. The proposed design is applied to control the boost converter for PFC applications using PCA at the minimum DC‐link capacitor value. The calculated value of DC‐link capacitance has been reduced to a greater extent as compared to the conventional calculation of DC‐link capacitance. The converter operation with the designed value of DC‐link capacitance has been verified through the MATLAB and Typhoon Simulink environment, and an experimental prototype model is used for the validation by using the FPGA based Typhoon HIL‐402 kit. [ABSTRACT FROM AUTHOR]

Power factor correction (PFC) converters have been frequently employed in various switching power supply devices to reduce input current harmonics. However, the PFC converter suffers from an obvious twice-line-frequency output voltage ripple due to the instantaneous power imbalance between constant output power and variable input power. Suppression of twice-line-frequency ripple usually can be realized by the post-stage DC-DC converter of the two-stage cascade PFC converter; however, the two-stage cascade PFC structure is challenging to realize high efficiency since the energy is transferred twice. To achieve high power factor, high efficiency, and low twice-line-frequency ripple, a hybrid quasi-single-stage (QSS) AC-DC converter is presented in this paper, which consists of a dual output hybrid Boost/Flyback PFC converter and a Buck ripple compensation circuit (RCC). The fundamental principles of the proposed converter and the critical conditions of operation mode transition are discussed in the paper. To confirm that the twice-line-frequency ripple is effectively suppressed, the small signal model of Buck RCC is built and analyzed. Moreover, the main characteristics, including operation mode transition angle, input current, power factor, and switching frequency of the proposed hybrid QSS AC-DC converter, are analyzed. By building a 120 W experimental prototype to validate the feasibility of the proposed hybrid QSS AC-DC converter, the experimental results show that the proposed converter can realize PFC function with high efficiency and extremely low twice-line-frequency output voltage ripple. [ABSTRACT FROM AUTHOR]

This study presents an enhanced AC drive for the SynRMs coupled with a circulation pump (CP) and an improved control system based on the field orientation. A grid-fed 900 W motor driver consisting of an electromagnetic interference filter (EMI), power factor correction (PFC), and three-phase inverter is designed to drive 0.75 kW SynRM. A boost PFC converter is designed as an interface between the AC power line and the motor drive. PFC is used to recover the bad power factor performance of the SynRM. In addition, the boosted and well-regulated DC-link voltage improves the motor driving performance. Control strategies and practical implementation based on the field-oriented control of synchronous reluctance motors are presented. Dynamic and steady-state responses of the CP SynRM drive in various conditions are verified experimentally. Low current and voltage ripples, unity power factor, maximum torque per ampere with low fluctuation and low EMI noise are achieved with the low cost efficiently. All of the improvements are obtained by fewer circuit elements and higher energy conversion efficiency. The advantages of using SynRMs in dry-rotor circulation pumps for heating applications have been demonstrated experimentally. [ABSTRACT FROM AUTHOR]

In low‐voltage distribution systems, the increased penetration of power electronic devices leads to the decentralization of harmonic sources, which puts the sensitive loads or communication systems in the risk status. The conventional methods of point‐to‐point harmonic control are not applicable. In order to solve this problem without increasing additional investments, this paper focuses on mitigating the harmonic interference through the power factor correction (PFC) converter. Hence, a critical conduction mode (CRM) single‐phase boost PFC converter with adaptive harmonic compensation (AHC) control is proposed to reduce the harmonic interference at user side. Firstly, the feed‐forward control loop of a PFC converter is decoupled into the fundamental branch and harmonic branch to trace the harmonic interference and generate the compensation current. Then the compensation gain is designed by the compensation loop gain and compensation capacity of PFC converter. Meanwhile, the characteristics of the PFC converter are analyzed to study the effect of the AHC control on the active power transmission and output load, which can provide important support for the proposed method in application. Finally, a 160‐W experimental prototype is built to verify the effectiveness of the proposed AHC control. [ABSTRACT FROM AUTHOR]

Summary: Light emitting diode (LED) driver systems are now moving toward reduced processing power to improve conversion efficiency in indoor and outdoor applications. LED drivers connected to a single‐phase supply must meet the requirements for power factor correction with lower input current harmonics to maintain the alternating current (AC) power grid's quality and maintain a constant current through the LED load to eliminate the flickering effect in the light output. An LED driver is required to fulfill these requirements. In this paper, a new reduced processing power LED driver is proposed. By splitting the output capacitor into two capacitors and with the help of hardware design, the processing power can be reduced by using fewer semiconductors than in earlier designs. The proposed driver employs a simple ripple cancellation control approach to eliminate the 100 Hz ripple in the LED load current. Using this principle, an LED driver was designed and tested. The experimental results demonstrated that the proposed LED driver achieved an input power factor close to unity with lower input current harmonics and 92.5% of peak efficiency when operating at full power. [ABSTRACT FROM AUTHOR]

For low-power applications, this paper presents the development and design of a compact and ultra-highly efficient half-bridge LLC resonant converter. By using Galium Nitride (GaN) devices and high-efficient magnetics, the efficiency and power density of resonant converters can be improved. Compared to Silicon MOSFETs, GaN high-electron-mobility transistors (GaN HEMT) have a lower output capacitance and gate charge, resulting in lower driving loss and shorter dead times. Consequently, the proposed LLC converter based on GaN devices has excellent performance characteristics such as ultra-high efficiency, low switching losses, compact size, high voltage endurance, high operating temperature and high operating frequency. Furthermore, the proposed resonant converter features soft switching properties that ensure that the switches and diodes on the primary side are always switched at zero voltage and current. By doing so, LLC resonant converter switching losses are significantly reduced by up to 3.1%, and an overall efficiency of 98.5% is achieved. The LLC resonant converter design with GaN HEMT has great advantages over Si MOSFET solution regarding efficiency, overall losses, switching loose and power factor correction. A 240 W, 240 V to 60 V half-bridge GaN HEMT LLC resonant converter is simulated with a switching frequency of 75 KHz, along with the comparative analysis of the Si metal oxide semiconductor field effect transistor (MOSFET) solution. Moreover, the design and analysis of highly efficient magnetics with a power factor of 0.99 at full load is presented. A 240-Watt single stage LED driver with power factor correction is also designed to verify and compare the performance of proposed LLC resonant converter. [ABSTRACT FROM AUTHOR]

The One-Cycle Controlled Boost Power Factor Correction converter has one voltage control loop, which may exhibit instability when the load is light. The instability results in a low Power Factor. To ensure that the Power Factor is high, a time delay circuit was adopted in this paper to control the instability of the converter. The architecture of the time delay circuit is described, and its transfer function is derived. The double averaging method was applied to the converter to determine the parameters in the control method. Experimental results verified the time delay control method in the converter. The power factor increased from 0.82 to 0.99 after activating the delay control circuit. [ABSTRACT FROM AUTHOR]

When the input inductor operates in discontinuous current mode (DCM), the Cuk converter can automatically achieve power factor correction (PFC) function with only a simple voltage mode control loop. However, the conventional Cuk PFC converter suffers from high intermediate capacitor voltage because of the lack of feedback of the intermediate capacitor voltage and relatively low power factor (PF). In this paper, a Cuk PFC converter using variable inductor which varies with the transient rectified input voltage is proposed to enhance the PF and reduce the intermediate capacitor voltage by injecting a controlled DC bias current into the auxiliary winding of the variable input inductor. The operating principles of the proposed Cuk PFC converter based on variable inductor are analyzed in detail, and the analysis of PF, the voltage of intermediate capacitor, and design considerations are provided. To verify the feasibility of the proposed scheme and compare the characteristics of both the traditional and proposed Cuk PFC converter, a 108W experimental prototype of the proposed converter is built and tested. The experimental results show that the proposed Cuk PFC converter can significantly enhance the PF, decrease the intermediate capacitor voltage, and increase efficiency compared with the traditional Cuk PFC converter. [ABSTRACT FROM AUTHOR]

In this paper, an AC/DC charger with high power factor and high efficiency is proposed. The topology of the AC/DC charger makes use of an active power factor correction (PFC) circuit and a DC/DC half-bridge inductor-inductance-capacitor (LLC) resonant converter with high efficiency, which has the following advantages: (1) By incorporating a current-sensing circuit, a zero-current detection circuit, and an active PFC circuit in the front, the AC source can decrease harmonic currents. Therefore, the power factor of the proposed AC/DC charger can approach 0.997. (2) By incorporating a DC/DC half-bridge LLC resonant converter with soft-switching functions in the rear, the power losses of the active switches can be decreased and the efficiency can be improved significantly. Finally, a prototype of the AC/DC charger with high power factor and high efficiency is designed and analyzed. The results of the experiments are presented to prove the function and probability of the AC/DC charger with high power factor and high efficiency. [ABSTRACT FROM AUTHOR]

This paper presents the design and analysis of a single-phase power factor correction (PFC) scheme using a DC–DC Zeta converter operating in continuous conduction mode. The presented DC–DC converter exhibits non-linearity due to switching elements that degrades the performance of the converter. Therefore, this paper proposes a non-linear cascade control of particle swarm optimization-gravitational search algorithm (PSO-GSA) tuned proportional-integral (PI) and sliding mode controller (SMC) in outer and inner loop, respectively, to improve the performance of the converter. The robustness of the controller is analysed by applying the load and line variations to the converter. The simulation results showed that the steady state performance indices such as integral absolute error and integral square error, and transient performance indices like settling time and peak overshoot are significantly enhanced for the proposed cascade control scheme compared to the PSO and root locus method of tuning the outer PI with the inner SMC controller. The proposed control scheme gives better performance in terms of power factor improvement, percentage reduction in total harmonic distortion, and efficient tracking of output voltage for change in reference voltage compared to other techniques presented. Further, the performance of the proposed scheme is tested for battery charging application of the solar photovoltaic system. The demonstrated simulation results are validated by implementing the DC–DC Zeta converter in real-time hardware set-up. [ABSTRACT FROM AUTHOR]

The power generated by solar photovoltaic cells (SPVC) depends on environmental conditions and is intermittent. Furthermore, a standalone solar system is not suitable for continuously powering an active load. In this study, a single-phase grid-tied solar hybrid system with intelligent power-sharing capability is proposed. Maximum power point tracking (MPPT) algorithm is applied to extract maximum power from the solar photovoltaic (SPV) array with a nonlinear induction motor (IM) connected as a load. Nonlinear load at output reduces the power factor of the system; therefore, the power factor correction (PFC) circuit is designed to maintain a power factor (PF) nearly equal to unity. A model of the non-inverting boost converter is also designed in this work. A nonlinear controller with integral backstepping (IBS) is proposed in this work for MPPT of the SPV array with simultaneous power factor improvement. The control of IM connected with the voltage source inverter is achieved by using the voltage/frequency (V/F) technique. The proposed PFC controller and the MPPT technique are compared with a conventional proportional–integral (PI) controller. Simulation results demonstrate that by using an IBS controller the PF of the system is improved to 99.2%; hence, the proposed controller is more robust and efficient. This controller also reduced the system's total harmonic distortion to 1%. The proposed techniques are implemented in MATLAB/SIMULINK to validate the results. [ABSTRACT FROM AUTHOR]

In this paper, a family of a novel single-phase three-level PFC based on a switch-capacitor cell is proposed. The proposed PFC topologies have the characteristics of high power factor, low voltage stresses, and low power losses. Firstly, the derivation process of the novel PFC topologies is introduced in detail. Based on a representative circuit of the proposed novel PFC topologies, its operation principle is analyzed from the aspects of working current paths, key waveforms, and pulse distribution. Meanwhile, its equivalent circuit model is deduced. Secondly, the performance of the proposed PFC topologies is analyzed. Then the modulation technology based on capacitor voltage balancing is designed for the proposed topologies. Finally, an experimental prototype with a rated power of 800 W and a DC output voltage of 400 V is built. The experimental analysis is carried out from both the steady state and dynamic state. The experimental results verify the feasibility of the proposed novel three-level PFC topologies and the effectiveness of the modulation technology. [ABSTRACT FROM AUTHOR]

In this work, the design and implementation of an optimized fractional-order proportional-integral (FOPI) controller for a DC–DC single-ended primary inductance converter (SEPIC) is considered to fulfill the application of power factor correction and voltage regulation along with improved robustness, efficiency, and performance characteristics of the converter. An Atom Search Optimization technique is proposed to optimize the parameters of the controller in the outer voltage and inner current control loop of the DC–DC SEPIC model. The model is developed using MATLAB –Simulink, and the simulation analysis is carried out at rated load, setpoint tracking, source voltage, and load variation. The effectiveness of the proposed atom search optimized FOPI controller is verified by comparing its performance with the particle swarm optimized FOPI controller. Furthermore, Matignon's theorem-based closed-loop stability analysis is carried out for the tuned values of the FOPI controller with the SEPIC model. According to the simulation results, the proposed technique provides a more dominant dynamic response, an improved efficiency, and a power factor than the particle swarm-tuned controller of the SEPIC model. In addition, better voltage regulation is achieved in the case of source voltage and load variation. Furthermore, the closed-loop stability analysis reveals that the proposed Atom Search Optimization-tuned FOPI controller performance is more stable than the particle swarm optimization method. The hardware-in-the-loop implementation is carried out to validate the proposed controller in real-time. [ABSTRACT FROM AUTHOR]

This research paper describes modifying a conventional bicycle into an electric bike by retrofitting it with a single-phase boost power factor correction (PFC) rectifier for low power battery chargers. The proposed work was designed and developed in a single stage, as opposed to the traditional two-stage chargers used to charge E-bicycle, to provide the desired outcomes of enhanced efficiency, good power quality, and dependability due to the charger's lower cost. Additionally, the proposed converter uses a single switch, which reduces not necessary body diode conduction and circulating current and enhances the PFC device's thermal management. Additionally, this research makes use of the diode bridge rectifier (DBR) arrangement, which offers low current stress and is suitable for electric bicycles. The converter operates at a low cost with reduced magnetics (DCM) by operating the charger in discontinuous conduction mode at such low voltage levels. It also accomplishes intrinsic power factor at the ac mains by employing a simple control method to maintain the battery in high power density constant current (CC) and constant voltage (CV) states. A thorough state space investigation is carried out in combination with modeling and testing to ensure that the electric bicycle charger operates effectively. Consequently, low power chargers are a good fit for the proposed single stage front-end converter, and a 250 W hardware prototype is used to verify the findings. [ABSTRACT FROM AUTHOR]

A common 400 V dc bus for industrial motor drives advantageously allows the use of high‐performance 600 V power semiconductor technology in the inverter drive converter stages and to lower the rated power of the supplying rectifier system. Ideally, this supplying rectifier system features unity power factor operation, bidirectional power flow and nominal power operation in the three‐phase and the single‐phase grid. This paper introduces a novel bidirectional universal single‐/three‐phase‐input unity power factor differential ac‐dc converter suitable for the above mentioned requirements. The basic operating principle and conduction states of the proposed topology are derived and discussed in detail. Then, the main power component voltage and current stresses are determined and simulation results in PLECS are provided. The concept is verified by means of experimental measurements conducted in both three‐phase and single‐phase operation with a 6 kW prototype system employing a switching frequency of 100 kHz and 1200 V SiC power semiconductors. [ABSTRACT FROM AUTHOR]

Adjustable-speed drives with single-phase input require a power factor correction front-end, usually implemented by a boost converter, to reduce the current distortion from the uncontrolled rectifier; this stage is then followed by a three-phase inverter. Bulky electrolytic capacitors are used to limit the direct current voltage ripple resulting from the rectification of the single-phase input. This leads to increased system size and shorter lifetime. In this work, the usual boost front-end is exploited to actively control the DC link voltage ripple while limiting the input current distortion and, hence, the power factor, even if not reaching unity. However, Power Factor is greatly improved with respect to the uncontrolled rectifier alone. This approach permits one to reduce the required capacitance, allowing the substitution of the electrolytic capacitor with a long-life low-equivalent-series-resistance film one. A control targeting capacitor voltage level, ripple, and boost inductor peak current is presented, together with practical design models. The synergic control of the boost front-end and of the machine drive is presented as well. The resulting converter is tested with resistive load and permanent-magnet synchronous machine drive, highlighting the advantages and limits of the proposed solution. [ABSTRACT FROM AUTHOR]

This paper discusses the simulation and experimental validation of a curative solution, called power factor correction (PFC), intended to improve the power quality of the single-phase AC/DC converter. A modern control law combined between two methods which are the fuzzy logic theory and the predictive technique is proposed in this research work. The first is reserved to guarantee an intelligent regulation of the DC output voltage while the second aims to the intuitive power switch governance of the boost chopper constituting the PFC. The adopted solution ensures the delivery of a source current of sinusoidal shape, respecting the imposed international standards and the operation of the treated system under a power factor very close to unity. The effectiveness and practical use of the intelligent intuitive PFC control have been experimentally proven using the dSPACE 1104 card for different operating conditions, resulting from the variation of the load and the reference output voltage. The practical results in terms of power quality identified by a total harmonic distortion of the source current of 2.8% and a power factor of 0.995 respect the international standard IEEE 519-2014. Also, they are very convincing compared to those existing and recently published in the literature. [ABSTRACT FROM AUTHOR]

For the two-stage single-phase power factor correction (PFC) converter, its instantaneous input power pulsates at twice the line frequency, generating the second harmonic current (SHC) at the dc-bus port. The dc–dc stage is used to regulate the output voltage or the dc bus voltage in different applications, and the SHC reduction schemes for the dc–dc stage with different control objectives are discussed in this article. When the dc–dc stage regulates the output voltage, it is pointed out that the control bandwidth of the dc–dc stage is required to be high enough and the dc bus capacitor should be large enough to suppress the SHC, and the design of the dc bus capacitor is given. When the dc–dc stage regulates the dc bus voltage, a virtual impedance is added in series with the input/output of the dc–dc stage to suppress the SHC, and a virtual impedance is added in parallel with the dc bus to improve the dynamic performance. The selection and design of the virtual impedances are also given. Based on that, three specific control schemes are proposed for the dc–dc stage to suppress the SHC, and the parameters design method is also presented. Finally, a 3.3-kW two-stage single-phase PFC converter is fabricated and tested in the lab to verify the effectiveness of the proposed SHC reduction schemes. [ABSTRACT FROM AUTHOR]

Conventional boost power factor correction (PFC) converter is only suitable for two-stage power conversion system due to its high output voltage. Inherent step-up characteristic limits its applications in single-stage low voltage output. In this article, a boost-type single-stage step-down resonant PFC converter, which combines a boost PFC converter and a resonant switched capacitor network by using one active switch, is proposed and analyzed. Similar to conventional boost PFC converter, the proposed converter can achieve unity power factor and low input current ripple in universal-input applications. Moreover, the proposed converter can achieve step-down voltage conversion. Furthermore, high-efficiency is realized due to single-stage power conversion. The proposed converter is studied in terms of operation principle, voltage gain, power factor analysis, and key circuit parameters design. Finally, a 70-W prototype with 96.05% peak efficiency is built to verify the theoretical analysis results. [ABSTRACT FROM AUTHOR]

This article proposes new configurations of hybrid boost rectifier topologies with switched-capacitor cells to reduce the number of switches. The proposed converters use switched-capacitor voltage multipliers to increase the voltage gain of the conventional boost rectifier and reduce the voltage stress across the switches. The new topologies are able to achieve output voltage regulation and a near unity input power factor. The proposed integration of the boost switching cell and the ladder cell reduces the number of semiconductor devices of the conventional hybrid boost rectifier. A generalized topology is presented and two variations of the topology are studied within greater depth. The theoretical analysis of these topologies is performed and evaluated experimentally through a 1-kW prototype with 220 V ac input and 800 V dc output voltages. The converter presented a maximum efficiency of around 97.9% and input power factor above 0.99. [ABSTRACT FROM AUTHOR]

Ever since the rise in infiltration of renewable sources into the modern electric grids, the concept of solid-state transformer (SST) has garnered special attention to dynamically control and regulate the power flow while preserving the quality of supply. Though SSTs are capable of catering to a myriad of service demands by customers, their complex multistage architecture, large device count, complexity in control, increased device losses and relatively higher cost remain major bottlenecks for their widespread market penetration. This paper is intended to address the major impediments mentioned above by proposing a simple three-stage, modular architecture for SST with a minimal switch count, high power density and input power factor correction for low power applications. Each stage of SST is equipped with independent, simple and robust controllers contributing to high degree of modularity. A 1 kVA laboratory prototype is built for supplying power to sensitive electric equipment and the results presented in support of the proposed architecture. The developed prototype is shown to have unity power factor at the input, less than 10 percent of the weight and more than thrice the power density relative to the conventional transformer of similar rating. [ABSTRACT FROM AUTHOR]

This study is about an improved high-quality light-emitting diode (LED) converter for a T8 LED tube. The converter is separated into the AC driving circuit and DC driving circuit. Also, the LED tube was applied with an output ripple eliminator for the optical performance. The AC driving circuit and DC driving circuit are assembled at the end of the LED tube in a G13 base and a G13 base dummy, respectively, and the output ripple eliminator is located on an LED PCB. The proposed LED converter is founded on a SSBB (single-stage buck-boost) converter topology and was designed for 10 W operation for a 600 mm T8 LED tube. The light waveform of the LED tube was measured by a photosensor. The waveform had almost no ripple and was the same as a straight line. The average calculated percent flicker of the proposed LED converter was an average of 1.9% at 100 and 240 VAC, 50 and 60 Hz. The proposed converter has lower power efficiency than a conventional converter by 2.7% at 100–240 VAC, but it still has high power efficiency (>87%). The measurement results represent that the LED output current regulation is below 0.92% at 100–240 VAC and the converter obtains the power factor more than 0.84 and the total harmonic distortion is less than 14.3%. All of the current harmonics reach the IEC 61000-3-2 Class D standards for high-quality LED converters. [ABSTRACT FROM AUTHOR]

This work proposes a reliable and efficient two-stage driver solution for extra-high-current (EHC) chip-on-board (COB) light-emitting diode (LED) applications. An ac–dc boost converter operating in continuous conduction mode is employed to provide input power factor correction and regulated dc-link voltage. Considering that EHC COB LEDs often operate at higher current levels than those employed in conventional high-powered lighting applications, a dc–dc extended gain interleaved buck converter (EGIBC) is employed so that power control is achieved. The average state-space modeling of the EGIBC is derived, while a digital control system is also implemented for this purpose. A 500-W prototype of the proposed two-stage topology is implemented, which does not require electrolytic capacitors. The obtained results clearly demonstrate that the proposed driver complies with international power quality and flicker standards. Thus, it can be consolidated as a viable choice for practical applications involving outdoor floodlighting where high luminous flux is mandatory. [ABSTRACT FROM AUTHOR]

This letter proposes a half-bridge bidirectional isolated matrix-based ac/dc converter for compact ac/dc power conversion applications. The converter can control not only the dc voltage or current, but also the power factor of the ac current with a single conversion stage, which helps to achieve a higher power density with a lower complexity. The converter operates with zero-voltage switching or zero-current switching in all switches. Hence, the switching frequency of the converter can be increased higher, leading to smaller passive components. Besides the simple circuit, the modulation scheme derived from time domain analyses is also easy to implement. The proposed topology has been verified by experimental results for a 2-kW SiC-based prototype. A high efficiency of 96.8% was achieved at a full load condition. The current total harmonic distortion (THD) is lower than 4% and the power density is 1.8 kW/dm3. [ABSTRACT FROM AUTHOR]

In this study, a novel smooth least mean square (LMS) algorithm for controlling PV inverter has been proposed to estimate the reference current for synchronisation of solar photovoltaic (SPV) to the grid. The proposed control extracts both active and reactive fundamental components of the load current with improved convergence rate. These currents are compared with sensed grid currents to generate gating pulses for a voltage source converter. It also compensates the load harmonics, reduces voltage fluctuation at point of common coupling and supplies the reactive power demand of the local load. The algorithm has been tested under steady state and transient conditions for input variation as well as load variation under the power factor correction mode of operation. The algorithm has been developed in MATLAB/Simulink. Further, the efficacy of the proposed control algorithm has been tested on prototype hardware setup developed in the laboratory using dSPACE1104. The total harmonic distortion at the grid side, obtained from simulated and hardware results are well within the IEEE standards. [ABSTRACT FROM AUTHOR]

A voltage-controlled canonical switching cell-derived DC–DC converter with improved power quality feeding a variable speed permanent magnet brushless direct current (PMBLDC) motor-drive system for home appliances, is presented in this study. The converter is operating in the continuous conduction mode (CCM). This converter has less stress on the converter devices due to CCM of operation. A single converter is used for both the power factor correction (PFC) and the speed control of the drive, thus reducing the number of elements in the system. The speed control, along with PFC in this system is achieved via a PI controller having speed reference as an input. This system is capable of providing the low speed to rated speed operation while maintaining a unity power factor. The Hall-effect sensor-based electronic commutation of a PMBLDC motor-drive is implemented at the fundamental frequency. This significantly improves efficiency by reducing the switching losses of the voltage source inverter. A prototype of it is developed in the laboratory for implementation of the scheme. Simulated and real-time experimental results of the scheme are presented here for performance validation at various dynamic and steady-state operating conditions. [ABSTRACT FROM AUTHOR]

This study proposed a dual-output AC–DC converter based on three-port bridgeless power factor corrector (TPB-PFC) and a non-isolated resonant DC-transformer (Ni-DCX) for dual-output DC voltage applications. A constant DC output voltage and a variable DC output voltage are provided simultaneously by the proposed AC–DC converter. Based on the TPB-PFC converter, a stacked power conversion structure with reduced power conversion stage is presented. Therefore, lower power losses and higher efficiencies are achieved. Meanwhile, soft switching of all the power devices in the Ni-DCX is achieved with open-loop controlled and optimised operation of the Ni-DCX, resulting in easy control and higher efficiency. In addition, switching losses of the TPB-PFC are reduced thanks to the three-level characteristic. Operation principles and characteristics of both TPB-PFC and Ni-DCX converter, and modulation and control strategies of the proposed AC–DC converter are analysed in detail. Feasibility and effectiveness of the proposed solutions are verified experimentally with a 2 kW dual-output AC–DC prototype. [ABSTRACT FROM AUTHOR]

A new low-cost energy-saving concept in the modern light-emitting diode (LED) illumination system is developed and implemented using an isolated single-ended primary inductance converter (SEPIC). The dimming scheme presented in this study is a single-step with negligible distortion in the AC mains current as compared to the traditional low-cost triode for alternating current (TRIAC) dimming system, which distorts the AC mains current wave-shape beyond sinusoidal nature due to the phase-cut techniques. This dimming concept is completely retrofitted, no additional arrangement is required to initiate the dimming as compared to a TRIAC dimmer or other controllers. The isolated SEPIC converter is modelled and analysed in detail using the state-space average technique. The stability of the designed converter and overall closed-loop control are verified using Bode-plot analysis. The full load converter efficiency is found around 93%, which is much higher than the conventional flyback topology-based LED driver. The concept presented in this study is tested with the help of a laboratory prototype with an LED load of 60 W. [ABSTRACT FROM AUTHOR]

A power factor correction (PFC) charge-pump (CP) bridgeless converter for LEDs is presented. In the input stage, coupled inductors, together with CP capacitors, are integrated into a half-bridge inverter, thus characterising the single stage. This topology even being bridgeless due to the positioning of the load operates with a bus voltage below the bending voltage. The CP configuration is used to reduce the LED's current ripple. The prototype achieves an output power of 60 W with high power factor, achieving the efficiency of up to 94%, 127 Vac input, total harmonic distortion of input current, with harmonic magnitudes within the IEC 61000-3-2 standard class C the device limits and flicker in conformed with the recommendation of IEEE 1789. [ABSTRACT FROM AUTHOR]

In this article, an ac/dc converter based on the stacked boost circuit and dual-mode LLC circuit is proposed. In the power factor correction (PFC) part, two boost circuits are stacked to halve the input voltage and the inductor can be shared. The stacked boost circuit can achieve PFC and soft-switching characteristics with open-loop control with the complementary driving signal. In the dc/dc part, a dual-mode LLC circuit is adopted based on two stacked half-bridge structure. The proposed ac/dc converter can be utilized in wide input voltage variation conditions. A prototype is proposed in the laboratory and the experimental results verify the feasibility of the proposed converter. [ABSTRACT FROM AUTHOR]

Two new power factor correction (PFC) rectifiers with the voltage buck-boost capability are proposed in this article, called as Ferdowsi rectifiers (FRs). The proposed rectifiers employ a reduced number of semiconductors compared to the competitors. Also, since the reverse recovery problem of antiparallel diodes of transistor switches is avoided, then MOSFETs can be readily utilized, which lets much higher switching frequencies and lower size of passive components. In addition, two parallel capacitors provide a path for the input current during the discharge mode of the buck-boost inductors to improve the current quality. The discontinuous conduction mode operation of the proposed rectifiers guarantees a high quality input current with a low total harmonic distortion. All aforementioned features offer a highly efficient operation and at the same time a purely sinusoidal current drawn from the ac source compared to the previous well-developed competitors. The validation of the theoretical achievements is performed by extensive tests on a laboratory test rig. [ABSTRACT FROM AUTHOR]

In this article, a high-power-density off-line light-emitting diode (LED) driver is proposed. The proposed ac–dc driver is the novel integrated buck and boost converter (IBBC). Besides the high-power-density, the converter shows a high power factor (PF), and a low total harmonic distortion (THD). The IBBC is a two-stage driver that features just one controlled switch, which leads to high PF and low THD operation ensuring high efficiency, and size and cost reduction. Moreover, the switch current is minimized as it conducts the higher of the buck or boost converter, but not the addition of both as in other integrated converters. Moreover, for a further increase of the power-density, a magnetic integration is made by integrating the two inductors of both the buck and boost converters in one core. Thus, the proposed converter has been named as fully integrated buck and boost converter (FIBBC). In this paper, the IBBC is analyzed, and a design methodology is proposed. Also, this article presents a magnetic analysis of the novel FIBBC. In addition, a comparison between two prototypes is presented, one for the IBBC and another for the FIBBC, both of them supplying an LED luminaire of 46 V/ 0.575 A. The FIBBC shows a high PF equal to 0.994, very small THD of 10%, output current ripple of 6%, and efficiency of 92.62%, which represents a landmark on the efficiency of integrated converters. [ABSTRACT FROM AUTHOR]

Summary: This paper deals with a power factor corrected (PFC) flyback converter for high‐power light emitting diode lighting applications. This flyback converter is designed to operate in critical conduction mode to achieve improved power quality at universal AC mains and high efficiency with the low component count. The converter is analyzed using state‐space analysis with closed‐loop stability under varying input and output conditions. The PFC converter is designed and implemented with wide input and wide output variations. The performance of the prototype is also investigated for improved power quality such as power factor and harmonics distortion of AC mains current at universal AC mains of 85 to 265 V. The achieved efficiency of this converter is 92% and total harmonic distortion is less than 6% over universal AC mains for a prototype of 100 W, which are much improved results as compared to discontinuous conduction mode operation of the same converter. [ABSTRACT FROM AUTHOR]

Unity power factor rectifiers find applications in modern utility systems and consumer electronic devices. However, a dedicated rectifier is required for a given load. In this study, a Unity Power Factor (UFP) power block is described which can generate two DC outputs, one buck and one boost, with a reduced number of switches and associated driver circuits. The topology adapts well with conventional control as it retains the dynamic behaviour of a buck and boost topology. While supplying simultaneous loads it exhibits minimal cross-regulation interference between the outputs. The controller implementation for the proposed power block is described and its difference with the conventional Power Factor Correction (PFC) controller is outlined. The topology along with its control to regulate the outputs and force UPF operation are validated using a 200 W prototype with 110 V utility input and 180–24 V DC outputs. [ABSTRACT FROM AUTHOR]

The importance of reactive power compensation for power factor (PF) correction will significantly increase with the large-scale integration of distributed generation interfaced via inverters producing only active power. In this work, we focus on co-optimizing energy storage for performing energy arbitrage as well as local power factor correction. The joint optimization problem is non-convex, but can be solved efficiently using a McCormick relaxation along with penalty-based schemes. Using numerical simulations on real data and realistic storage profiles, we show that energy storage can correct PF locally without reducing arbitrage profit. It is observed that active and reactive power control is largely decoupled in nature for performing arbitrage and PF correction (PFC). Furthermore, we consider a real-time implementation of the problem with uncertain load, renewable and pricing profiles. We develop a model predictive control based storage control policy using auto-regressive forecast for the uncertainty. We observe that PFC is primarily governed by the size of the converter and therefore, look-ahead in time in the online setting does not affect PFC noticeably. However, arbitrage profit are more sensitive to uncertainty for batteries with faster ramp rates compared to slow ramping batteries. [ABSTRACT FROM AUTHOR]

The high-brightness light-emitting diodes (LEDs) require an AC/DC converter with power factor correction (PFC). The large output electrolytic capacitor, which is used to minimize the low frequency LED current ripple, degrades the operating lifetime of the LED driver. In order to increase the lifetime of an AC–DC LED driver, the electrolytic capacitor should be eliminated without significantly increasing the output current ripple. In this article, an isolated single-stage single-switch AC/DC high power factor LED driver without electrolytic capacitor is proposed in which a zeta power factor (PF) corrector is integrated with a forward converter. The detailed theoretical analysis and design procedure of the proposed single-stage PFC converter is presented. The experimental results of a 110 Vrms, 21 W prototype verify the theoretical analysis. The input PF is 0.99 in the proposed converter that complies with lighting equipment standards such as IEC-1000-3-2 for class C equipment. [ABSTRACT FROM AUTHOR]

This paper presents a new four-quadrant (4Q) boost-type converter with the use of active virtual ground (AVG) technology. The presented topology can step up the ac grid voltage to a regulated dc voltage under a stable bidirectional current flow and support the power transmission in either real power or reactive power delivery. With the use of the proposed modulation method, only two high-frequency switches are required through the 4Q operation. Under a full-bridge converter structure, an efficient system can be guaranteed. Also, benefiting from the AVG technology, an LCL filter is formed at the system input over the 4Q operation. Both magnitude of leakage current and grid current ripple are also minimized to a small value. Thus, a high-efficiency and low-noise 4Q converter is guaranteed. The presented topology is successfully implemented on a 750 VA prototype and the performance is experimentally verified on it, which shows good agreement with the theoretical knowledge. [ABSTRACT FROM AUTHOR]

This paper presents a new control method for a Half-Bridge ac-dc Boost converter with power factor correction. The proposed controller includes a pre-compensation loop in order to remove the steady-state phase error in the current control loop. As a consequence, a better power factor is achieved even under soft load conditions or voltage variations in the power source. The paper explores all the stages in the design of the controller, from the derivation of the transfer function, based on an average model, the design of the controllers, a method for eliminating the voltage unbalance in the DC side, the conception and design of the pre-compensation loop, and evaluation of the effect of the precompensation loop in the stability of the system. Finally, the proposed controller is verified experimentally in a real Half-Bridge ac-dc Boost converter which is tested under different operational conditions. [ABSTRACT FROM AUTHOR]

This paper proposes a novel control strategy for a single-stage photovoltaic (PV) system consisting of two PV panels connected to the grid via a three-level neutral point clamped converter topology with an LCL filter. This control method is based on a developed 5th order model containing sum and difference terms of the voltages of the two input capacitors. This allows decoupling the issues of maximum power point tracking and power factor correction from the issue of balancing the power exchange generated by the panels, which facilitates control design and improves system performances. The control problem under consideration is dealt with using a non-linear controller composed of three loops: (i) an inner loop is developed, based on backstepping and Lyapunov approaches, to correct the power factor by forcing the grid current to be sinusoidal and in phase with the grid voltage; (ii) an outer loop is designed, using a filtered proportional-integral controller, to regulate the DC bus voltage to a climate-dependent reference; (iii) a balancing loop is designed, using a proportional-integral controller, to cope with the neutral point voltage balancing problem. The proposed controller also includes a state observer that provides on-line estimation of the network state variables that are not accessible to measurements. Another important aspect of this work is the development of a formal, complete and rigorous analysis in order to describe the performance and analyse the stability of the closed-loop system using various analytical tools, including averaging theory, Routh criteria and indirect Lyapunov stability. A simulation in MATLAB/SIMULINK environment shows, on the one hand, the efficiency and robustness of the proposed nonlinear controller against changing climatic conditions and, on the other hand, the superiority of this control strategy compared to the one based on a PI linear inner loop controller for the studied system with an l - filter and an LCL filter. [ABSTRACT FROM AUTHOR]

This article proposes a linear PFC regulator with a light flicker compensating circuit for LED lighting applications. The proposed circuit is small in size because it includes no reactors or electrolytic capacitors. The light flicker compensating circuit, which is connected in parallel to the LED string, consists of four ceramic capacitors and diodes. These capacitors are operated in series in the charge state and in parallel in the discharge state by using a diode network circuit. Therefore, an external controller and large capacitors are not required. The proposed circuit is experimentally validated using a 9 W prototype. From the experimental results, it is found that the power fluctuation of the LED string is less than the JIS and JLMA limitations, and the power factor is 0.95. In addition, the power loss is analyzed at an efficiency of 89.4% for the prototype circuit. Also, by modulating the current regulator, sinusoidal input current can be achieved. The second proposed circuit is experimentally validated using a 7.5 W prototype, and the power factor and input current distortion are found to be 0.999 and 2.1%, respectively. [ABSTRACT FROM AUTHOR]

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Although a single-stage off-line power light-emitting diode (LED) driver can achieve low cost and high efficiency, the notorious double-line-frequency flicker issue with a single-stage LED driver limits its usage in high-quality lighting applications. To solve lighting flicker, as well as maintain a low cost and high efficiency, a multiplexing ripple cancellation (MRC) LED driver is proposed in this paper. One switching cycle is divided into two intervals. During the first interval, the proposed LED driver operates as a conventional LED driver that transfers energy from the ac input to LED output, performs power factor correction, and generates the main output voltage. The main output voltage has a double-line-frequency ripple like in a conventional design. During the second interval, the proposed LED driver transfers energy from the ac input again to generate an opposite ripple voltage to cancel the ripple voltage from the main output. In this way, the voltage across the LED load is a dc to achieve flicker-free LED driving performance. More than 99% of the output power goes through one-time power conversion, while less than 1% goes through two-time power conversion. A 7.5-W experimental prototype is built and tested to verify the design concept. [ABSTRACT FROM AUTHOR]