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Electrode grids are used in neuroscience research and clinical practice to record electrical activity from the surface of the brain. However, existing passive electrocorticography (ECoG) technologies are unable to offer both high spatial resolution and wide cortical coverage, while ensuring a compact acquisition system. The electrode count and density are restricted by the fact that each electrode must be individually wired. This work presents an active micro‐electrocorticography (µECoG) implant that tackles this limitation by incorporating metal oxide thin‐film transistors (TFTs) into a flexible electrode array, allowing to address multiple electrodes through a single shared readout line. By combining the array with an incremental‐ΔΣ readout integrated circuit (ROIC), the system is capable of recording from up to 256 electrodes virtually simultaneously, thanks to the implemented 16:1 time‐division multiplexing scheme, offering lower noise levels than existing active µECoG arrays. In vivo validation is demonstrated acutely in mice by recording spontaneous activity and somatosensory evoked potentials over a cortical surface of ≈8×8 mm2. The proposed neural interface overcomes the wiring bottleneck limiting ECoG arrays, holding promise as a powerful tool for improved mapping of the cerebral cortex and as an enabling technology for future brain‐machine interfaces. [ABSTRACT FROM AUTHOR]

This paper shows the concept and design of a flexible large‐area multi‐fingerprint sensor. The sensor detects the thermal mass of different materials, e.g. the skin with high heat capacity and air with very low heat capacity. We show the device architecture and readout strategies. The performance of the 500ppi flexible sensor is not influenced by bending with a radius of 5mm. [ABSTRACT FROM AUTHOR]

In this work, we have reported dual-gate amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs), where a top-gate self-aligned TFTs has a secondary bottom gate and the TFT integration comprises only five mask steps. The electrical characteristics of a-IGZO TFTs under different gate control are compared. With the enhanced control of the channel with two gates connected together, parameters such as on current (ION), sub-threshold slope (SS−1), output resistance, and bias-stress instabilities are improved in comparison with single-gate control self-aligned a-IGZO TFTs. We have also investigated the applicability of the dual-gate a-IGZO TFTs in logic circuitry such as 19-stage ring oscillators. [ABSTRACT FROM AUTHOR]

In this study, we have compared the performance of self-aligned a-IGZO thin-film transistors (TFTs) whereby the source/drain (S/D) region's conductivity enhanced in three different ways, that is, using SiNx interlayer plasma (hydrogen diffusion), using calcium (Ca as reducing metal) and using argon plasma (changing the atomic ratio). All these TFTs show comparable characteristics such as field-effect mobility (μFE) of over 10.0 cm²/(V.s), sub-threshold slope (SS-1) of 0.5 V/decade, and current ratio (ION/ IOFF) over 108. However, under negative-bias-illumination-stress (NBIS), all these TFTs showed strong degradation. We attributed this NBIS stability issue to the exposed S/D regions and changes in the conductivity of S/D contact regions. The hydrogen plasma-treated TFTs showed the worst NBIS characteristics. This is linked to increased hydrogen diffusion from the S/D contact regions to the channel. [ABSTRACT FROM AUTHOR]

In this work, we compared the thin-film transistor (TFT) characteristics of amorphous InGaZnO TFTs with six different source-drain (S/D) metals (MoCr, TiW, Ni, Mo, Al, and Ti/Au) fabricated in bottom-gate bottom-contact (BGBC) and bottom-gate top-contact (BGTC) configurations. In the BGTC configuration, nearly every metal can be injected nicely into the a-IGZO leading to nice TFT characteristics; however, in the BGBC configuration, only Ti/Au is injected nicely and shows comparable TFT characteristics. We attribute this to the metal-containing deposits in the channel and the contact oxidation during a-IGZO layer sputtering in the presence of S/D metal. In bias-stress stability, TFTs with Ti/Au S/D metal showed good results in both configurations; however, in the BGTC configuration, not all the TFTs showed as good bias results as Ti/Au S/D metal TFTs. We attribute this to backchannel interface change, which happened because of the metal-containing deposits at the backchannel during the final the SiO2 passivation. [ABSTRACT FROM AUTHOR]

In this work, we report on high-performance bottom-gate top-contact (BGTC) amorphous-Indium-Gallium-Zinc-Oxide (a-IGZO) thin-film transistor (TFT) with SiO2 as an etch-stop-layer (ESL) deposited by medium frequency physical vapor deposition (mf-PVD). The TFTs show field-effect mobility (μFE) of 16.0 cm2/(V.s), sub-threshold slope (SS−1) of 0.23 V/decade and off-currents (IOFF) < 1.0 pA. The TFTs with mf-PVD SiO2 ESL deposited at room temperature were compared with TFTs made with the conventional plasma-enhanced chemical vapor deposition (PECVD) SiO2 ESL deposited at 300 °C and at 200 °C. The TFTs with different ESLs showed a comparable performance regarding μFE, SS−1, and IOFF, however, significant differences were measured in gate bias-stress stability when stressed under a gate field of +/−1 MV/cm for duration of 104 s. The TFTs with mf-PVD SiO2 ESL showed lower threshold-voltage (VTH) shifts compared with TFTs with 300 °C PECVD SiO2 ESL and TFTs with 200 °C PECVD SiO2 ESL. We associate the improved bias-stress stability of the mf-PVD SiO2 ESL TFTs to the low hydrogen content of the mf-PVD SiO2 layer, which has been verified by Rutherford-Back-Scattering-Elastic-Recoil-Detection technique. [ABSTRACT FROM AUTHOR]

In this study, we report high-quality amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) fabricated on a polyethylene naphthalate foil using a new back-channel-etch (BCE) process flow. The BCE flow allows a better scalability of TFTs for high-resolution backplanes and related circuits. The maximum processing temperature was limited to less than 165 °C in order to ensure good overlay accuracy (<1 µm) on foil. The presented process flow differs from the previously reported flow as we define the Mo source and drain contacts by dry etch prior to a-IGZO patterning. The TFTs show good electrical performance, including field-effect mobilities in the range of 15.0 cm2/(V·s), subthreshold slopes of 0.3 V/decade, and off-currents <1.0 pA on foil. The threshold voltage shifts of the TFTs measured were less than 1.0 V after a stressing time of 104 s in both positive (+1.0 MV/cm) and negative (−1.0 MV/cm) bias directions. The applicability of this new BCE process flow is demonstrated in a 19-stage ring oscillator, demonstrated to operate at a supply voltage of 10 V with a stage delay time of 1.35 µs, and in a TFT backplane driving a 32 × 32 active-matrix organic light-emitting diode display. [ABSTRACT FROM AUTHOR]

In this study, the authors report on high-quality amorphous indium-gallium-zinc oxide thin-film transistors (TFTs) based on a single-source dual-layer concept processed at temperatures down to 150°C. The dual-layer concept allows the precise control of local charge carrier densities by varying the O2/Ar gas ratio during sputtering for the bottom and top layers. Therefore, extensive annealing steps after the deposition can be avoided. In addition, the dual-layer concept is more robust against variation of the oxygen flow in the deposition chamber. The charge carrier density in the TFT channel is namely adjusted by varying the thickness of the two layers whereby the oxygen concentration during deposition is switched only between no oxygen for the bottom layer and very high concentration for the top layer. The dual-layer TFTs are more stable under bias conditions in comparison with single-layer TFTs processed at low temperatures. Finally, the applicability of this dual-layer concept in logic circuitry such as 19-stage ring oscillators and a TFT backplane on polyethylene naphthalate foil containing a quarter video graphics array active-matrix organic light- emitting diode display demonstrator is proven. [ABSTRACT FROM AUTHOR]