1. Low Power and Area Optimized Architecture for OQPSK Modulator
- Author
-
H.B. Mahesh and S.M. Usha
- Subjects
Computer science ,Modulation ,0502 economics and business ,05 social sciences ,0202 electrical engineering, electronic engineering, information engineering ,Electronic engineering ,020206 networking & telecommunications ,Multiplier (economics) ,02 engineering and technology ,Booth's multiplication algorithm ,050203 business & management ,Phase-shift keying - Abstract
Low power modulators are most efficient for wireless communication; the conventional OQPSK modulator consumes more power and area. In this work, OQPSK modulator is reframed with booth multiplier, this multiplier consumes minimum power and area than the conventional OQPSK modulator. Cadence software is used for the simulation and synthesis, the power reduction in 180nm, 90nm and 45nm is 31%, 26% and 23% and 23% and area reduction is 16%, 15.32% and 16.26% respectively.
- Published
- 2019
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