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Stripe noise is a common phenomenon arises in the multi-detectors infrared imaging equipment, which not only generally destroys the quality of the image, but also seriously affects the subsequent processing of the image. We exploit the stripe noise features of infrared image, and find that the adjacent noise difference can be well described by the difference of the mean values of adjacent rows in infrared images with the mean compensation and the two-point correction principle. Based on this, a novel stripe noise removal algorithm based on stable window is designed, it is not only effective to remove stripe noise in infrared image without causing undesired blurring effects and artifacts, but also efficient in terms of storage and computing resource utilization for real-time processing. In addition, in order to meet the demands of image real-time processing on satellites, we also design a low-latency, low-energy and highly-paralleled architecture for the de-noising algorithm, and implement it on a field programmable gate array (FPGA) processor. Experimental results show that the proposed algorithm outperforms the other current methods, and it can not only has a better performance in visual effect and objective quality than other state-of-the-art de-noising methods, but also has obvious advantages in the consumption of storage resources due to the design of resource-efficient parallel architecture. For instance, in the consumption of Block RAM storage, compared with the TPC method, this proposed algorithm reduces 80% memory, and gets a significant improvement of the processing speed.

For most of the existing noncloud-covered water region (NCC water region) extraction methods, they are designed for on-ground ship detection. However, these methods could result in low accuracy and expensive computational costs. In this letter, an accurate and fast NCC water region extraction method is proposed for the typical on-orbit ship detection system with limited computing resources available. According to the relative spectral reflectance difference of water, land, and thick cloud, a triple-peak model is first constructed. Next, the parameters of the triple-peak model can be adaptively obtained based on the correlation of the previous adjacent image blocks acquired from the data stream of the panchromatic camera. Subsequently, the accurate NCC water region can be quickly extracted. Moreover, the proposed method is validated using a large amount of raw data captured by panchromatic satellite cameras. The experimental results on a Xilinx-5VFX130t field-programmable gate array imply that the proposed method performs well in the NCC water region extraction with the precision of 99.3% and recall of 99.5%, and it is suitable for on-orbit processing.

Blob analysis has been extensively used in target detection, object recognition, moving target tracking, among other applications. Because blob analysis is computationally expensive, it has become a bottleneck of real-time applications. To tackle this problem, a parallel algorithm for blob analysis is proposed, and a hardware-efficient architecture for this algorithm is presented in this paper. First, based on image data partition and multi-process units, a novel parallel algorithm of blob analysis is proposed to process objects with different types and sizes. Second, a dynamic convex hull calculation method is designed, which is highly efficient for parallel processing and sub-block merging of connected component labeling. Third, a parallel hardware structure of the proposed algorithm is designed and implemented on FPGA. To evaluate performance, blobs of different types and sizes are located by the proposed algorithm in software and hardware. The experimental results demonstrate that the blobs are effectively and correctly located by the proposed algorithm, and the proposed hardware architecture works more efficiently than the state-of-the-art methods.

Sea-land segmentation based on edge detection is commonly utilized in ship detection, coastline extraction, and satellite system applications due to its high accuracy and rapid speed. Pixel-level distribution statistics do not currently satisfy the requirements for high-resolution, large-scale remote sensing image processing. To address the above problem, in this paper, we propose a high-throughput hardware architecture for sea-land segmentation based on multi-dimensional parallel characteristics. The proposed architecture is well suited to wide remote sensing images. Efficient multi-dimensional block level statistics allow for relatively infrequent pixel-level memory access; a boundary block tracking process replaces the whole-image scanning process, markedly enhancing efficiency. The tracking efficiency is further improved by a convenient two-step scanning strategy that feeds back the path state in a timely manner for a large number of blocks in the same direction appearing in the algorithm. The proposed architecture was deployed on Xilinx Virtex k7-410t to find that its practical processing time for a [Formula: see text] remote sensing image is only about 0.4[Formula: see text]s. The peak performance is 1.625[Formula: see text]gbps, which is higher than other FPGA implementations of segmentation algorithms. The proposed structure is highly competitive in processing wide remote sensing images.