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The effort to confine the electromagnetic field by silicon passive metadevices has made the design of an on-chip wideband sub-terahertz (sub-THz) I/O redriver feasible, paving a new way toward energy-efficient and crosstalk-immune ON–OFF keying (OOK) communications. Two metadevices, namely spoof surface plasmon polaritons (SPPs) metawaveguide and split-ring resonator (SRR), are exploited to build the sub-THz low-crosstalk silicon channel and high-ON–OFF-ratio modulator, respectively. A sub-THz signal source combining the merit of spoof SPPs and SRR is introduced. A 140-GHz dual-channel redriver composed of these metadevices is fully integrated in a 65-nm CMOS technology. The redriver realizes both 27–1 and 231–1 13.5 Gb/s/lane for dual-channel OOK modulation. The measured energy efficiency is 2.6 pJ/bit/lane and the bit error rate (BER) is ≤10−12, demonstrating a crosstalk-immune sub-THz I/O system. The power consumption is 35.1 mW/lane and the active area of the redriver is 0.23 mm2. [ABSTRACT FROM AUTHOR]

In an effort toward high-speed and low-power I/O data link in the future exascale data server, this paper presents a signal source and a modulator in the $D$ -band. The split-ring resonator (SRR) structures are used to boost both the signal power and the extinction ratio (ER). The modulator manifests itself as a compact SRR whose magnetic resonance frequency can be modulated by high-speed data. Such a magnetic metamaterial achieves a significant reduction of radiation loss with high ER by stacking two auxiliary SRR unit cells with interleaved placement. The high-Q tank for oscillation is realized by a stacked SRR decorated with slow-wave transmission line (T-line) for electric field confinement. A four-way power-combined fundamental 80-GHz coupled-oscillator network is magnetically synchronized by the slow-wave T-line, which is frequency doubled to 160 GHz. Fabricated in the 65-nm CMOS process, the measured results show that: 1) the modulator achieves 3-dB insertion loss at the on-state with 43-dB isolation at the off-state, leading to a 40-dB ER at 125 GHz within an area of only $40\,\,\mu \text {m} \times 67\,\,\mu \text{m}$ and 2) the signal source achieves 6.3% frequency tuning range (FTR) with 3.7-mW peak output power at 160 GHz within 0.053-mm2 active area. It has a measured phase noise of −105 dBc/Hz at 10-MHz offset, 5.5% dc-to-RF power efficiency, 70.1-mW/mm2 power density, FOM of −171 dBc/Hz, and FOM $_{T}$ of −172.7 dBc/Hz. [ABSTRACT FROM AUTHOR]

A Goubau-line leaky-wave antenna (LWA) with a large scanning angle is presented in this letter. In contrast to the conventional Goubau-line leaky wave with a small scanning angle range, this letter employed a periodically bending Goubau line, which not only brings in a periodic perturbation for leaky-wave radiation, but also enhances the scanning range due to the increased delay for each line element. The simulation and experimental results show that the proposed LWA provides $90\%$ radiation efficiency and 7–10 dBi radiation gain from backfire to endfire through broadside as frequency changes. The proposed antenna features good radiation performance and has a compact and low-profile configuration. [ABSTRACT FROM AUTHOR]

This letter proposes a low-profile and highly efficient endfire radiating traveling-wave antenna based on spoof surface plasmon polaritons (SSPPs) transmission line. The aperture is approximately $0.32\lambda _0\times 0.01\lambda _0$ , where $\lambda _0$ is the space wavelength at the operational frequency 8 GHz. This antenna generates near-endfire radiation beams within 7.5–8.5 GHz. The maximum gain and total efficiency reach 9.2 dBi and $96\%$ , respectively. Measurement results are finally given to validate the proposed SSPPs antenna. [ABSTRACT FROM AUTHOR]

In this letter, a single-layer electronically steerable leaky-wave antenna based on the Goubau line is presented. The modulation units consist of metalines connected by periodically loaded switchable p-i-n diodes and its biasing circuit. These p-i-n diodes are used as switches to dynamically control the modulation periodicity, and the antenna featuring low profile can, therefore, provide tunable beam-scanning angles at a fixed frequency. Measured antenna prototype demonstrates beam-steering capability of 74° at 4.35 GHz. [ABSTRACT FROM AUTHOR]

ABSTRACT A three-stage 60-GHz power amplifier (PA) has been implemented in a 65 nm Complementary Metal Oxide Semiconductor (CMOS) technology. High-quality-factor slow-wave coplanar waveguides (S-CPW) were used for input, output and inter-stage matching networks to improve the performance. Being biased for Class-A operation, the PA exhibits a measured power gain G of 18.3 dB at the working frequency, with a 3-dB bandwidth of 8.5 GHz. The measured 1-dB output compression point (OCP1dB) and the maximum saturated output power Psat are 12 dBm and 14.2 dBm, respectively, with a DC power consumption of 156 mW under 1.2 V voltage supply. The measured peak power added efficiency PAE is 16%. The die area is 0.52 mm2 (875 × 600 μm2) including all the pads, whereas the effective area is only 0.24 mm2. In addition, the performance improvement of the PA in terms of G, OCP1dB, Psat, PAE and the figure of merit using S-CPW instead of thin film microstrip have been demonstrated. © 2015 Wiley Periodicals, Inc. Int J RF and Microwave CAE 26:99-109, 2016. [ABSTRACT FROM AUTHOR]

This letter proposes a new spoof surface plasmon transmission line (SSP-TL) using capacitor loading technique. This new SSP-TL features flexible and reconfigurable dispersion control and highly selective filtering performance without resorting to configuration change. Moreover, it requires much smaller linewidth than the conventional SSP-TL for achieving an extremely slow wave (or a highly confined field), which is quite useful for a compact system. To illustrate the design principle, several examples are designed within the frequency range of 2–8 GHz. Both numerical and experimental results are given in comparison with the conventional SSP-TL. It is demonstrated that the proposed technique provides a better performance in size reduction and dispersion reconfigurability. [ABSTRACT FROM PUBLISHER]

High-performance integrated slow-wave coplanar waveguides (S-CPW) are compared with conventional coplanar waveguides (CPW) fabricated in a 65-nm High-Resistivity-SOI (HR-SOI) CMOS technology. As expected, S-CPW demonstrates better performance at millimeter-wave frequencies in term of higher effective dielectric permittivity, which is due to the patterned floating shield inserted between the transmission line and the substrate. In addition, S-CPW shows a lower attenuation constant despite of the added metallic patterned floating shield on HR substrate. For demonstration purpose, both low- and high- characteristic impedance S-CPW and CPW are characterized. For 28- \Omega S-CPW and 65-\Omega S-CPW, the effective dielectric permittivity is improved by a factor of 6 and 2, respectively. Meanwhile, attenuation constants of slow-wave structures are lower than 0.9 dB/mm and 0.57 dB/mm at 60 GHz, compared to CPW ones which are as high as 1.5 dB/mm and 0.95 dB/mm, respectively. Furthermore, the loss distribution for the S-CPW structure is detailed by varying the patterned floating shield length for both standard Bulk and HR-SOI substrates. [ABSTRACT FROM PUBLISHER]

This paper shows the contribution of slow-wave coplanar waveguides on the performance of power amplifiers operating at millimeter-wave frequencies in CMOS-integrated technologies. These transmission lines present a quality factor Q two to three times higher than that of the conventional microstrip lines at the same characteristic impedance. To demonstrate the contribution of the slow-wave transmission lines on integrated millimeter-wave amplifiers performance, two Class-A single-stage power amplifiers (PA) operating at 60 GHz were designed in standard 40 nm CMOS technology. One of the power amplifiers incorporates only the microstrip lines, whereas slow-wave coplanar transmission lines are considered in the other one. Both amplifiers are biased in Class-A operation, drawing, respectively, 22 and 23 mA from 1.2 V supply. Compared to the power amplifier using conventional microstrip transmission lines, the one implemented with slow-wave transmission lines shows improved performances in terms of gain (5.6 dB against 3.3 dB), 1 dB output compression point (OCP1dB: 7 dBm against 5 dBm), saturated output power (Psat: >10 and 8 dBm, respectively), power-added efficiency (PAE: 16% instead of 6%), and die area without pads (Sdie: 0.059 mm2 against 0.069 mm2). [ABSTRACT FROM PUBLISHER]

In this letter, a traveling-wave single-pole double-throw (SPDT) switch using slow-wave coplanar waveguides is implemented in a 65-nm triple-well CMOS process. For performance improvement, double-well body-floating technique is used. The p-well layer and deep n-well layer of nMOSFET being, respectively, biased to -1.4 and 2.0 V, the measured SPDT exhibits an insertion loss of 2.8 dB and an isolation of 20 dB at 60 GHz. A measured input 1-dB compression point (ICP1dB) of 17 dBm is obtained at 35 GHz (16.3 dBm at 60 GHz by simulation). The total chip size is only 0.42 mm^2 (780 \mum\times\,540 \mum) including all testing pads. [ABSTRACT FROM PUBLISHER]