365 results on '"Swaminathan, Madhavan"'
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2. Die-embedded glass packaging for 6G wireless applications
- Author
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Jia, Xiaofan, Li, Xingchen, Moon, Kyoung-Sik, and Swaminathan, Madhavan
- Published
- 2022
- Full Text
- View/download PDF
3. Semi-additive patterning process based fabrication of miniaturized, package-embedded high conversion ratio inductors for DC-DC converters
- Author
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Murali, Prahalad, Alvarez, Claudio, Suresh, Srinidhi, Losego, Mark D., Swaminathan, Madhavan, Oishi, Yusuke, Uemura, Tomohito, Nagatsuka, Ryo, and Watanabe, Naoki
- Published
- 2022
- Full Text
- View/download PDF
4. Fabrication of package embedded spiral inductors with two magnetic layers for flexible SIP point of load converters in Internet of Everything devices
- Author
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Bellaredj, Mohamed L.F., Pardue, Colin A., Kohl, Paul, and Swaminathan, Madhavan
- Published
- 2018
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5. Efficient monostatic anisotropic point scatterer model for high performance computing.
- Author
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Huang, Eric and Swaminathan, Madhavan
- Subjects
- *
HIGH performance computing , *RADAR cross sections , *RADAR targets , *PARTICLE swarm optimization , *LEAST squares , *BISTATIC radar , *EMULATION software , *CLOUD storage - Abstract
High performance computing (HPC) electromagnetic (EM) emulators are used to simulate real-time EM wave interactions between numerous radar targets. Radar Cross Section (RCS) data stores reflection profiles of radar targets as a table; however, the needed storage size increases with frequency sampling density, aspect angle sampling density, and number of target types. The large quantity of data often exceeds storage capability and limits manipulation and representation feasibility. The spherical harmonic based monostatic anisotropic point scatterer model is proposed for HPC EM simulations where scattering responses can be computed with finite impulse response (FIR) filters. An efficient algorithm constructing this model with large scale RCS data is discussed. The scatterer position and the reflection profile of each scatterer are solved using least squares methods and particle swarm optimization (PSO). In addition, the function evaluations in PSO are accelerated by taking advantage of the matrix structure, making the algorithm 22 times faster [ABSTRACT FROM AUTHOR]
- Published
- 2024
- Full Text
- View/download PDF
6. Machine-Learning Approach for Design of Nanomagnetic-Based Antennas
- Author
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Gianfagna, Carmine, Yu, Huan, Swaminathan, Madhavan, Pulugurtha, Raj, Tummala, Rao, and Antonini, Giulio
- Published
- 2017
- Full Text
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7. A Review of Polymer Dielectrics for Redistribution Layers in Interposers and Package Substrates.
- Author
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Nimbalkar, Pratik, Bhaskar, Pragna, Kathaperumal, Mohanalingam, Swaminathan, Madhavan, and Tummala, Rao R.
- Subjects
DIELECTRICS ,DIELECTRIC properties ,PACKAGING ,DIELECTRIC materials - Abstract
The ever-increasing demand for faster computing has led us to an era of heterogeneous integration, where interposers and package substrates have become essential components for further performance scaling. High-bandwidth connections are needed for faster communication between logic and memory dies. There are several limitations to current generation technologies, and dielectric buildup layers are a key part of addressing those issues. Although there are several polymer dielectrics available commercially, there are numerous challenges associated with incorporating them into interposers or package substrates. This article reviewed the properties of polymer dielectric materials currently available, their properties, and the challenges associated with their fabrication, electrical performance, mechanical reliability, and electrical reliability. The current state-of-the-art is discussed, and guidelines are provided for polymer dielectrics for the next-generation interposers. [ABSTRACT FROM AUTHOR]
- Published
- 2023
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8. Cobalt–Polymer Nanocomposite Dielectrics for Miniaturized Antennas
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Raj, P. Markondeya, Sharma, Himani, Reddy, G. Prashant, Altunyurt, Nevin, Swaminathan, Madhavan, Tummala, Rao, and Nair, Vijay
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- 2014
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9. Bayesian Learning for Uncertainty Quantification, Optimization, and Inverse Design.
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Swaminathan, Madhavan, Bhatti, Osama Waqar, Guo, Yiliang, Huang, Eric, and Akinwande, Oluwaseyi
- Subjects
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MICROWAVE circuits , *ARTIFICIAL neural networks - Abstract
Design of microwave circuits require extensive simulations, which often take significant computational time due to design complexity. This can be addressed through neural networks (NNs) that provide predictive capability. Predictions often come with uncertainties that need to be quantified. Moreover, optimization and inverse designs are better done using probabilities. This article describes the use of Bayes theorem and machine learning (ML) for solving complex microwave design problems. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
10. Low-Cost Specification Based Testing of RF Amplifier Circuits using Oscillation Principles
- Author
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Goyal, Abhilash, Swaminathan, Madhavan, and Chatterjee, Abhijit
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- 2010
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11. Fast EM/circuit transient simulation using Laguerre equivalent circuit (SLeEC)
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Srinivasan, Krishna, Yadav, Pradeep, Engin, A. Ege, Swaminathan, Madhavan, and Ha, Myunghyun
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Electromagnetism -- Models ,Electric circuit analysis -- Methods ,Business ,Computers ,Electronics ,Electronics and electrical industries - Published
- 2009
12. Inductance and resistance calculations in three-dimensional packaging using cylindrical conduction-mode basis functions
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Ki Jin Han and Swaminathan, Madhavan
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Standard IC ,Electric fields -- Analysis ,Electric resistance -- Evaluation ,Integrated circuits -- Analysis ,Semiconductor chips -- Analysis - Published
- 2009
13. Substrate Integrated Waveguide Filters in Glass Interposer for mmWave Applications.
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ur Rehman, Mutee, Kumar, Lakshmi Narasimha Vijay, and Swaminathan, Madhavan
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WAVEGUIDE filters ,INSERTION loss (Telecommunication) ,MICROSTRIP transmission lines ,GLASS ,WALL design & construction ,SUBSTRATE integrated waveguides ,RECTANGLES - Abstract
This letter presents the first demonstration of substrate integrated waveguide (SIW) filters in glass interposers for $D$ -band (110–170 GHz). The material stack-up consists of 100- $\mu \text{m}$ -thick Asahi Glass Company (AGC) ENA1 glass with 15- $\mu \text{m}$ -thick Ajinomoto Build-up Films (ABF GL102) laminated on both sides. To demonstrate different frequency responses, cavities with two different shapes (square and rectangle) are used to design the filters. The cavities are fed using center coupled microstrip lines. Semi-additive process (SAP) is used to fabricate the filters. The diameter and pitch of the via side wall are designed to be 70 and $170 ~\mu \text{m}$ , respectively. The measured results are in excellent agreement with the simulation models. At ~130 GHz, first-, second-, and third-order square SIW filters show 1.54-, 2.7-, and 4.2-dB insertion loss, respectively. The relative bandwidth for the square filters is 12.8%, 9%, and 8.8%, respectively. The first- and second-order rectangular SIW filters show 1.65- and 2.85-dB insertion loss, respectively, and the relative bandwidth for these filters is 9.5% and 9%, respectively. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
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14. Spherical Harmonic-Based Anisotropic Point Scatterer Models for Radar Applications Using Inverse Optimization.
- Author
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Huang, Eric, DeLude, Coleman, Romberg, Justin, Mukhopadhyay, Saibal, and Swaminathan, Madhavan
- Subjects
RADAR targets ,RADAR ,BISTATIC radar ,RADAR cross sections - Abstract
High-performance computing-based electromagnetic (EM) emulators are used to simulate real-time complex EM wave interactions between multiple radar targets, transmitters, and receivers. The radar cross section (RCS) of the radar targets are required to be stored as a table; however, the needed storage size increases dramatically with the angle and frequency sampling density. In this article, we present an innovative approach of constructing a concise spherical harmonic-based anisotropic point scatterer model that the emulators can use as part of the computations. The point scatterer model is constructed directly from the precomputed RCS data. First, we use only the monostatic RCS data and compute the spherical harmonic-based monostatic point scatterer model by solving a linear least-squares problem which has a group sparsity constraint. Then, we further compute the spherical harmonic-based bistatic point scatterer model using the full bistatic RCS data. The problem is formulated as a bilinear least-squares problem. The problem is solved using the normalized iterative algorithm, which linearly solves two parameters in a back and forth manner. The results show that the point scatterer model can effectively represent the bistatic RCS data of a radar target. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
15. Mechanical Characterization of Ultra-Thin, Flexible Glass Substrates for RF Applications.
- Author
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Sivapurapu, Sridhar, Chen, Rui, Kanno, Kimiyuki, Kakutani, Takenori, Letz, Martin, Liu, Fuhan, Sitaraman, Suresh K., and Swaminathan, Madhavan
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GLASS ,CORE materials ,RADIO frequency - Abstract
Glass has been shown to be a capable core substrate material for high-frequency applications. In this article, we examine the capabilities of ultra-thin glass as a material that can be used for high-frequency flexible applications. The two stack-ups discussed in the work presented are 60 $\mu \text{m}$ in total thickness with a core glass substrate (Schott AF32) of 30 $\mu \text{m}$ thickness. One stack-up uses 15 $\mu \text{m}$ JSR GT-N01 as a buildup dielectric on each side of the glass and the other uses 15 $\mu \text{m}$ Taiyo Ink photo imageable dielectric (PID). Both stack-ups have been characterized to 110 GHz and have shown to have comparable performance to materials used in this frequency range. This work then focuses on the mechanical characterization of these stack-ups using free arc bending. The free arc bending tests show that both ultra-thin glass stack-ups are suitable for bending applications as the tested samples can bend to a panel separation below 33% of the sample’s total length. This article concludes that the ultra-thin glass stack-ups are suitable for high-frequency flexible applications because the electrical performance is comparable to other high-frequency rigid materials while exhibiting their flexible capabilities. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
16. Characterization of Alumina Ribbon Ceramic Substrates for 5G and mm-Wave Applications.
- Author
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Aslani-Amoli, Nahid, ur Rehman, Mutee, Liu, Fuhan, Swaminathan, Madhavan, Zhuang, Cheng-Gang, Zhelev, Nikolay Z., Seok, Seong-Ho, and Kim, Cheolbok
- Subjects
MICROSTRIP transmission lines ,INSERTION loss (Telecommunication) ,MICROSTRIP resonators ,ALUMINUM oxide ,5G networks - Abstract
A recently developed material technology at Corning Inc., namely, Alumina Ribbon Ceramic (ARC), is investigated as a potential substrate candidate for fifth generation (5G) and millimeter-wave (mm-wave) applications. In this article, we characterize an 80- $\mu \text{m}$ -thick ARC substrate material in the frequency range of 3–50 GHz using microstrip ring resonator (MRR) method and extract the loss of various planar transmission lines, such as microstrip and coplanar waveguide (CPW) lines on ARC substrate up to 50 GHz as well. Moreover, different test structures designed on an 80- $\mu \text{m}$ -thick ARC substrate are utilized to extract the electrical parasitics associated with a single-grounded through-alumina via (TAV) and transmission properties of ground–signal–ground (GSG) TAV of 40 $\mu \text{m}$ diameter over the frequency range of 0.1–50 GHz. The semiadditive patterning (SAP) process is employed to metallize the top and bottom layers of ARC substrate to form the copper traces for the designed structures. Combined with the previous characterization results of a 40- $\mu \text{m}$ -thick ARC substrate in 30–170 GHz, the dielectric constant of ARC was extracted to be ~10.12 over 3–170 GHz, while its loss tangent varies in the range of $6.6\times 10^{-5}-1.3\times 10^{-3}$ over the same frequency band. The average measured insertion loss of CPW lines varied from 0.026 to 0.24 dB/mm over 3–170 GHz. For the microstrip lines, the average measured insertion loss over the same frequency range was extracted to be between 0.019 and 0.293 dB/mm. Furthermore, the parasitic inductance and resistance of a single-grounded TAV are extracted to be 24.41 pH and $0.987~\Omega $ , respectively, at 50 GHz, and the insertion loss per a GSG-TAV extracted from CPW-TAV daisy chain measurements is found to be 0.056 dB at 50 GHz as well. In addition to an excellent performance of ARC-based interconnects, the TAV in ARC is shown to have lower transmission loss up to 50 GHz, while exhibiting low parasitics. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
17. Analytical stability condition of the latency insertion method for nonuniform GLC circuits
- Author
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Lalgudi, Subramanian N. and Swaminathan, Madhavan
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Stability -- Evaluation ,Time-domain analysis -- Methods ,Maxwell equations -- Evaluation ,Electric circuit analysis -- Methods ,Business ,Computers and office automation industries ,Electronics ,Electronics and electrical industries - Abstract
The latency insertion method (LIM) is a transient simulation technique for circuits and is based on a finite-difference formulation, like the well-known finite-difference time-domain (FDTD) method for solving Maxwells equations. The LIM, like the FDTD method, is only conditionally stable resulting in an upper bound for the time step of the transient simulation. This bound on the time step is a function of the circuit topology and the circuit element values. It is critical to know this bound analytically for a given circuit. However, stability conditions of the LIM have been proven only for 1-D, infinitely long, distributed uniform RLC circuits, employed in transmission line modeling. For nonuniform circuits, these conditions have been predicted and have been observed experimentally as well but have not been possible to prove using the existing stability analysis techniques. Recently, analytical stability conditions of the LIM for nonuniform RLC circuits have been proven using the Lyapunovs direct method (LDM). However, when a conductance to ground (G) is added to a node of an LC or RLC circuit, the stability conditions cannot be derived using the Lyapunov function proposed. In this brief, analytical stability condition of the LIM is derived for the first time for nonuniform GLC circuits using the LDM with a new Lyapunov function. Index Terms--Conditional stability, finite-difference time-domain (FDTD) method, spectral radius.
- Published
- 2008
18. Accurate transient simulation of interconnects characterized by band-limited data with propagation delay enforcement in a modified nodal analysis framework
- Author
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Lalgudi, Subramanian N., Engin, Ege, Casinovi, Giorgio, and Swaminathan, Madhavan
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Transients (Dynamics) -- Research ,Simulation methods -- Methods ,Signal processing -- Research ,Digital signal processor ,Business ,Computers ,Electronics ,Electronics and electrical industries - Abstract
A numerical-convolution-based approach has been proposed for the accurate transient simulation of interconnects characterized by band-limited (b.l.) frequency-domain (f.d.) data and terminated by arbitrary equivalent circuits. Propagation delay is enforced in the transient results by obtaining causal impulse responses from b.l.f.d, data, extracting the propagation delays from them, and enforcing the delays in the causal impulse responses. Causal impulse responses are obtained through a new minimum-phase/all-pass decomposition of the frequency data. In this decomposition, a new form for the all-pass component has been proposed that preserves the sign of the original frequency response in the reconstructed response, unlike the prior approaches, leading to an accurate transient result. Arbitrary terminations are conveniently handled by integrating the numerical convolution in a modified nodal analysis (MNA) framework, a framework used by commercial circuit simulators, through a new transient simulation formulation. Numerical results demonstrating the accuracy and capability of the proposed procedure have been presented. Index Terms--Causality, convolution, scattering parameters, signal flow graphs, transient response.
- Published
- 2008
19. On-chip power-grid simulation using latency insertion method
- Author
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Lalgudi, Subramanian N., Swaminathan, Madhavan, and Kretchmer, Yaron
- Subjects
Computational complexity -- Research ,Capacitors -- Design and construction ,Circuit design -- Evaluation ,Circuit designer ,Integrated circuit design ,Business ,Computers and office automation industries ,Electronics ,Electronics and electrical industries - Abstract
Ensuring the integrity of the power supply in the power distribution networks (PDNs) of a chip is essential for building reliable high-performance chips. To ensure the power integrity, accurate, and memory- and time-efficient simulation approaches for simulating the power-supply noise in the on-chip PDN are essential. In this paper, a finite-difference formulation based on the latency insertion method (LIM) has been employed for simulating the power-supply noise in the on-chip PDN. A new common-mode type equivalent circuit has been proposed. In this equivalent circuit, a capacitance to ideal ground may not be present at all the nodes. Further, the nodes can be capacitively coupled to each other. To avoid inverting a large nonbanded matrix, a small capacitance to ground is added to a node that did not have any capacitance to ground, and a small series inductance is added to any floating capacitor that did not have any series inductance. Approximate closed-form expressions to compute the values of these capacitances to ground and series inductances have been proposed. The accuracy of the LIM-enabled transient simulation and the accuracy of the proposed closed-form expressions have been demonstrated. The memory and time complexity of the simulation for each time step have been shown to be O([N.sub.n]) each, where [N.sub.n] is the number of nodes in the equivalent circuit. Stability condition is derived for the first time for multidimensional inhomogeneous RLC circuit. A upper bound of the time step is derived from the stability condition. Using this bound on the time step, the runtime of the overall transient simulation has been estimated to be approximately proportional to [N.sup.2-2.5.sub.n] for [N.sub.n] in the order of millions. Index Terms--Computational complexity, explicit, floating capacitor, implicit, latency insertion method (LIM), power distribution network (PDN).
- Published
- 2008
20. A heterogeneous array of off-chip interconnects for optimum mechanical and electrical performance
- Author
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Kacker, Karan, Sokol, Thomas, Yun, Wansuk, Swaminathan, Madhavan, and Sitaraman, Suresh K.
- Subjects
Dielectrics -- Properties ,Connectors -- Design and construction ,Electronic packaging -- Research ,Connector ,Electronics - Abstract
Demand for off-chip bandwidth has continued to increase. It is projected by the Semiconductor Industry Association in their International Technology Roadmap for Semiconductors that by the year 2015, the chip-to-substrate area-array input-output interconnects will require a pitch of 80 [micro]m. Compliant off-chip interconnects show great potential to address these needs. G-Helix is a lithography-based electroplated compliant interconnect that can be fabricated at the wafer level. G-Helix interconnects exhibit excellent compliance in all three orthogonal directions, and can accommodate the coefficient of thermal expansion (CTE) mismatch between the silicon die and the organic substrate without requiring an underfill. Also, these compliant interconnects are less likely to crack or delaminate the low-k dielectric material in current and future integrated circuits. The interconnects are potentially cost effective because they can be fabricated in batch at the wafer level and using conventional wafer fabrication infrastructure. In this paper, we present an integrative approach, which uses interconnects with varying compliance and thus varying electrical performance from the center to the edge of the die. Using such a varying geometry from the center to the edge of the die, the system performance can be tailored by balancing electrical requirements against thermomechanical reliability concerns. The test vehicle design to assess the reliability and electrical performance of the interconnects is also presented. Preliminary fabrication results for the integrative approach are presented and show the viability of the fabrication procedure. The results from reliability experiments of helix interconnects assembled on an organic substrate are also presented. Initial results from the thermal cycling experiments are promising. Results from mechanical characterization experiments are also presented and show that the out-of-plane compliance exceeds target values recommended by industry experts. Finally, through finite element analysis simulations, it is demonstrated that the die stresses induced by the compliant interconnects are an order of magnitude lower than the die stresses in flip chip on board (FCOB) assemblies, and hence the compliant interconnects are not likely to crack or delaminate low-k dielectric material. [DOI: 10.1115/1.2804096]
- Published
- 2007
21. Air-gap transmission lines on organic substrates for low-loss interconnects
- Author
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Spencer, Todd J., Joseph, Paul Jayachandran, Kim, Tae Hong, Swaminathan, Madhavan, and Kohl, Paul A.
- Subjects
Microwave transmission lines -- Design and construction ,Dielectric devices -- Design and construction ,Electric power systems -- Electric losses ,Electric power systems -- Control ,Business ,Computers ,Electronics ,Electronics and electrical industries - Abstract
The fabrication of low-loss transmission line structures with an air dielectric layer is described. The channels are characterized at low frequency (10 and 100 kHz) using capacitance and loss tangent and at high frequency (500 MHz to 10 GHz) using S-parameter measurements. The incorporation of an air gap resulted in structures with effective dielectric constants between 1.5-1.8 and significantly lower loss tangents. The fabrication technique could be used to create more complicated air gap transmission line structures for use in monolithic microwave integrated circuits. Index Terms--Air gaps, dielectric losses, multiprocessor interconnection, transmission lines.
- Published
- 2007
22. Multilayered finite-difference method (MFDM) for modeling of package and printed circuit board planes
- Author
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Engin, A. Ege, Bharath, Krishna, and Swaminathan, Madhavan
- Subjects
Circuit printing -- Analysis ,Printed circuits -- Analysis ,Synthetic training devices -- Usage ,Printed circuit board ,Business ,Computers ,Electronics ,Electronics and electrical industries - Abstract
Power/ground planes in electronic packaging can be a major factor for noise coupling. There can be noise coupling not only in the transversal direction between two planes, but also vertically from one plane pair to another through the apertures and via holes. Due to the large size of the power/ground planes, it is difficult to analyze them using full-wave simulators. It is known that the finite-difference solution of the Helmholtz equation provides a faster approach with comparable accuracy. For multilayered planes and arbitrary geometries with aperture coupling, we present a multilayered finite-difference method (MFDM). It provides an accurate representation of wrap-around currents, which have not been modeled earlier, for large cutouts. Estimation of the influence of such coupling effects are essential especially for a successful design of mixed-signal systems. This method allows to consider realistic structures, which would be prohibitive to simulate using full-wave simulators. Index Terms--Finite-difference method (FDM), Helmholtz equation, power/ground planes, simultaneous switching noise.
- Published
- 2007
23. Statistical analysis and diagnosis methodology for RF circuits in LCP substrates
- Author
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Mukherjee, Souvik, Swaminathan, Madhavan, and Matoglu, Erdem
- Subjects
Electric filters, Bandpass -- Research ,Polymer liquid crystals -- Research ,Business ,Computers ,Electronics ,Electronics and electrical industries - Abstract
This paper presents the application of a fast and accurate layout-level statistical analysis methodology for the diagnosis of RF circuit layouts with embedded passives in liquid crystalline polymer substrates. The approach is based on layout-segmentation, lumped-element modeling, sensitivity analysis, and extraction of probability density function using convolution methods. The statistical analyses were utilized as a diagnosis tool to estimate distributed design parameter variations and yield of RF circuit layouts for a given measured performance. The results of statistical analysis and diagnosis were compared with measurement results of fabricated filters. Statistical methods were also applied for design space exploration to improve system performance, as well as estimation of yield and diagnosis of faults during batch fabrication. Index Terms--Bandpass filter, liquid crystalline polymer (LCP), parametric yield, RF synthesis, statistical diagnosis.
- Published
- 2005
24. Modeling of power supply noise in large chips using the circuit-based finite-difference time-domain method
- Author
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Choi, Jinseong, Swaminathan, Madhavan, Do, Nhon, and Master, Raj
- Subjects
Capacitors -- Magnetic properties ,Capacitors -- Research ,Semiconductor wafers -- Magnetic properties ,Semiconductor wafers -- Research ,Business ,Computers ,Electronics ,Electronics and electrical industries - Abstract
In this paper, a multilayered on-chip power distribution network consisting of two million passive elements has been modeled using the finite-difference time-domain (FDTD) method. In this method, a branch capacitor has been used. The use of the branch capacitor is important for simulating multilayered power grids. In addition, a method for including the CMOS inverter characteristics into the FDTD simulation has been presented. As an example of the application of this method, an H-tree clock network was simulated to compute the power supply noise distribution across an entire chip. Various scenarios with varying decoupling capacitances, load capacitances, number of clock buffers, and rise times have been analyzed to demonstrate the importance of circuit nonlinearity on power supply noise. Also, a method has been presented for analyzing package and board planes. Based on the methods presented, the interaction between chip and package has been discussed for capturing the resonant behavior that is otherwise absent when each section of the system is analyzed separately. Index Terms--Chip--package interaction, circuit finite-difference time-domain (FDTD), decoupling capacitor, large chips, on-chip power distribution, power supply noise, wafer level package.
- Published
- 2005
25. Layout-level synthesis of RF inductors and filters in LCP substrates for Wi-Fi applications
- Author
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Mukherjee, Souvik, Mutnury, Bhyrav, Dalmia, Sidharth, and Swaminathan, Madhavan
- Subjects
Electric filters -- Research ,Neural networks -- Research ,Microwave devices -- Research ,Neural network ,Business ,Computers ,Electronics ,Electronics and electrical industries - Abstract
A fast and accurate layout-level synthesis and optimization technique for embedded passive RF components and circuits such as inductors and bandpass filters have been presented. The filters are composed of embedded inductors and capacitors in a multilayer liquid crystalline polymer substrate. The proposed approach is based on a combination of segmented lumped-circuit modeling, nonlinear mapping using polynomial functions, artificial neural network-based methods, and circuit-level optimization. Synthesis and optimization results of inductors for spiral/loop designs based on microstrip and stripline configuration are within 5% of data obtained from electromagnetic (EM) simulations. For RF circuits, the methodology has been verified through synthesis of 2.4- and 5.5-GHz bandpass filters with and without transmission zeros. Scalability has been shown over a range of 2-3 and 4-6 GHz, respectively, with bandwidth variation of 0.5%-3% of center frequency. The synthesized models are within 3%-5% of EM simulation data. Index Terms--Artificial neural networks (ANNs), filter synthesis, inductor optimization, liquid crystalline polymer (LCP), synthesis.
- Published
- 2005
26. Construction of broadband passive macromodels from frequency data for simulation of distributed interconnect networks
- Author
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Min, Sung-Hwan and Swaminathan, Madhavan
- Subjects
Integrated circuits -- Research ,Semiconductor chips -- Research ,Broadband transmission -- Research ,Standard IC ,Broadband Internet ,Business ,Computers ,Electronics ,Electronics and electrical industries - Abstract
This paper discusses a method for the construction of multiport broadband passive macromodels using frequency data obtained from an electromagnetic simulation or measurements. This data could represent the frequency response of a distributed interconnect system. The macromodels are generated using rational functions by solving an eigenvalue problem. For numerical computation, the macromodels are represented as a summation of rational functions consisting of low-pass, band-pass, high-pass, and all-pass filters. The stability and passivity of the macromodels are enforced through constraints on the poles and residues of rational functions. To enable the construction of broadband macromodels, methods based on band division, selector, subband reordering, subband dilation, and pole replacement have been used. Two test cases that describe the performance of the proposed algorithm, and three test cases that are representative of distributed systems have been analyzed to verify the efficiency of the method. Index Terms--Broadband multiport passive macromodels, circuit simulation, distributed interconnect networks, frequency dependent data, macromodeling, passivity, rational functions.
- Published
- 2004
27. A Knowledge Based Method for Optimization of Decoupling Capacitors in Power Delivery Networks.
- Author
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Han, Seunghyup, Bhatti, Osama Waqar, and Swaminathan, Madhavan
- Subjects
POWER capacitors ,TIME-domain analysis ,GENETIC algorithms ,CAPACITORS ,POWER resources ,SUCCESSIVE approximation analog-to-digital converters - Abstract
For power delivery applications, a method for reducing impedance is through the addition of decoupling capacitors (decaps). In this article, we propose a knowledge-based optimization method to determine decap design in power delivery networks (PDNs). The proposed method provides the optimized PDN with the minimum number of decaps by iteratively assigning the decaps that maximize the frequency range where the target impedance is satisfied. In addition, by integrating the time-domain analysis into the proposed method, a voltage response arising from any arbitrary load current sources is guaranteed within the threshold level while preventing the over-design problem. Unlike the recent random search-based methods (genetic algorithm and machine learning (ML) etc.) requiring a large number of PDN simulations for learning and selection, the proposed method determines effective decaps through multiple steps based only on domain knowledge, significantly reducing the number of PDN simulations and computational cost to obtain the optimized decap solution. We apply the proposed method to three different PDN models. The results show that only 1.3% of the computing time is required to achieve the optimized decap design compared with the ML-based method while having the same number of decaps as the optimal number obtained by the full-search simulation. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
28. Fault Detection and Automated Fault Diagnosis for Embedded Integrated Electrical Passives
- Author
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Yoon, Heebyung, Hou, Junwei, Bhattacharya, Swapan K., Chatterjee, Abhijit, and Swaminathan, Madhavan
- Published
- 1999
- Full Text
- View/download PDF
29. HilbertNet: A Probabilistic Machine Learning Framework for Frequency Response Extrapolation of Electromagnetic Structures.
- Author
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Bhatti, Osama Waqar, Torun, Hakki Mert, and Swaminathan, Madhavan
- Subjects
MICROSTRIP filters ,MACHINE learning ,RECURRENT neural networks ,MICROSTRIP transmission lines ,HILBERT transform ,WAVEGUIDE filters ,EXTRAPOLATION - Abstract
In this article, we propose a probabilistic machine learning framework for extrapolating the frequency response of distributed physical circuits. For the structures where there is hidden dependency between higher and lower frequency features, we propose a method to extrapolate the response while providing confidence intervals harnessing Bayesian recurrent neural networks (RNN) thereby avoiding extensive simulations and saving computational time. To address complex-valued impedance, Hilbert transform is used to relate the real and imaginary parts where a Hilbert-based RNN architecture is proposed called Hilbert Net to extrapolate the frequency response. We apply the technique to four applications: 1) A simple microstrip transmission line circuit for proof of concept, 2) coupled waveguide filter operating in D-band comparing with measured results, 3) fifth-order interdigital bandpass filter for 28 GHz band, and 4) complex stack-up power delivery network (PDN) having a sharply changing response to test the framework limits. Results show that our architecture performs accurate extrapolation with a normalized mean square error of 0.008 squared with 95% confidence for a typical PDN. Using probabilistic networks, we achieve a tight confidence bound on our results. Furthermore, the reliability of Hilbert Net is assessed as to how far the response can be extrapolated. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
30. Effect of Titanium-Polymer Interactions on Adhesion of Polymer-Copper Redistribution Layers in Advanced Packaging.
- Author
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Nimbalkar, Pratik, Blancher, Christopher, Kathaperumal, Mohanalingam, Swaminathan, Madhavan, and Tummala, Rao
- Abstract
The ever-increasing demand for high-bandwidth interconnects has given rise to the need for high IO-density package redistribution layers (RDL). This necessitates scaling down RDL critical dimensions. There are numerous challenges pertaining to the further miniaturization of polymer RDL. The main challenge is the adhesion of copper RDL to the polymer dielectric. The chemical interactions between polymer and metal seed-layer play an important role in adhesion. This paper presents the study of chemical interactions between titanium and various commercial polymer dielectrics using XPS and FTIR spectroscopy. The effects of pre-deposition processes on chemical interactions and thereby adhesion strength are investigated. It was observed that the chemical interactions between titanium and polymer can be improved by plasma processing leading to a significant enhancement in adhesion strength. In case of ABF dielectric, the mean adhesion strength was increased from 8.9 N/cm to 10.8 N/cm. This adhesion enhancement was attributed to the formation of larger number of Ti-C bonds between the titanium seed and the polymer backbone. XPS and FTIR analyses are presented to elucidate the mechanism of adhesion enhancement. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
31. A Survey of Test Techniques for MCM Substrates
- Author
-
Swaminathan, Madhavan, Kim, Bruce, and Chatterjee, Abhijit
- Published
- 1997
- Full Text
- View/download PDF
32. Characterization of embedded passives using macromodels in LTCC technology
- Author
-
Choi, Kwang Lim, Na, Nanju, and Swaminathan, Madhavan
- Subjects
Wireless communication systems -- Equipment and supplies ,Circuit components -- Research ,Interpolation -- Methods ,Business ,Engineering and manufacturing industries ,Science and technology - Abstract
A macromodeling technique based on the low temperature co-fired ceramic technology was developed for characterizing the frequency and time domain response of embedded passive components. It was found that a great amount of electromagnetic simulation time in predicting the behavior of embedded passive components can be saved using the technique. The macromodels' simulated response was also found to agree well with that of the time domain reflectometry and time domain transmission measurements.
- Published
- 1998
33. A novel integrated decoupling capacitor for MCM-L technology
- Author
-
Chahal, Premjeet, Tummala, Rao R., Allen, Mark G., and Swaminathan, Madhavan
- Subjects
Capacitors -- Models ,Business ,Engineering and manufacturing industries ,Science and technology - Abstract
A novel method of integrating decoupling capacitor for multichip module-L technology is described. Using details provided by the Semiconductor Industry Assn Roadmap, estimates reveal that 13-72 nF/cm2 of specific decoupling capacitance will be needed for the next decade. Results from the study indicate that the novel capacitor can satisfy the handheld and cost-performance application needs of the future.
- Published
- 1998
34. A novel test technique for MCM substrates
- Author
-
Kim, Bruce, Swaminathan, Madhavan, Chatterjee, Abhijit, and Schimmel, David
- Subjects
Integrated circuit fabrication -- Analysis ,Semiconductor chips -- Analysis ,Business ,Engineering and manufacturing industries ,Science and technology - Abstract
A novel method for testing multichip module (MCM) substrates was developed based on a single ended probe measurement at a test frequency of 711 megahertz. The low-cost test technique involves the application of a stimulus from a tuned resonator by utilizing a single-ended probe which provides high resolution and good defect coverage. Simulations and test on multilayer substrates were also possible through the terminal metallurgy of the substrate with high fault coverage.
- Published
- 1997
35. Characterization of a small peripheral array package
- Author
-
Hao, Jie, Richter, Andre, Laskar, Joy, Swaminathan, Madhavan, and Mosley, J.
- Subjects
Electronic packaging -- Observations ,Integrated circuit fabrication -- Observations ,Array processors -- Research ,Business ,Engineering and manufacturing industries ,Science and technology - Abstract
A very small peripheral array (VSPA) cavity package offers high I/O's in a small area and a copper heat-sink with thermal conductivity of 400 W/k at very low costs. The package consists of three pin sizes, 320 leads, measures 27 mm on a side, and its R, L and C parasitics behave as lumped elements. The capacitance of two parallel package pins lies between 0.4 pF and 0.05 pF, while self inductance decreases with decreasing pin length. Moreover, the package is resonance free up to 3.5 GHz. The characterization of the VSPA package in the low and high frequency ranges is detailed.
- Published
- 1996
36. Noise computation in single chip packages
- Author
-
Bathey, Kumaresh, Swaminathan, Madhavan, Smith, L.D., and Cockerill, T.J.
- Subjects
Electromagnetic noise -- Measurement ,Electronic packaging -- Research ,Resonance -- Measurement ,Business ,Engineering and manufacturing industries ,Science and technology - Abstract
A novel analysis tool efficiently computes noise in single chip packages which form an integral part of a large system. The tool integrates the information of chip, first level and second level packages to form a network for simulation. Switching noise incorporates two components viz, peak noise generated by parasitic inductance and resonance noise generated by RLC network. Resonance noise describe the information regarding the chip and the package. The measured resonant frequency values are comparable with the calculated frequency values.
- Published
- 1996
37. Multiphysics Challenges and Opportunities for Integrated Voltage Regulators in Power Delivery Architectures.
- Author
-
Avula, Venkatesh, Bhattacharyya, Bidyut, Smet, Vanessa, Joshi, Yogendra, and Swaminathan, Madhavan
- Subjects
ELECTROMAGNETIC interference ,VOLTAGE regulators ,ELECTRIC impedance ,FUNCTIONAL integration ,PASSIVE components ,THERMAL resistance ,ELECTROMAGNETIC compatibility - Abstract
Integrated voltage regulator (IVR)-based power delivery architectures have become a growing trend in high-performance computing (HPC) systems. Integrated power delivery architectures typically feature high-frequency switching devices and embedded passive components, which can be integrated either inside the die or in the package. However, dense functional integration in such architectures though necessary brings a new set of challenges to system designers. In this article, we study the impact of heterogeneous integration on the design of power delivery architectures that addresses issues related to electrical, thermal, and electromagnetic domains through test cases. The key design problems arising out of heterogeneous integration and the solutions for each of the domains are identified. Although the electrical impedance profile seen by the load becomes flatter in the frequency domain with fewer resonances, noise coupling at the load increases due to the close proximity of noise sources. The electromagnetic interference (EMI) levels are higher, and therefore, more EMI and noise mitigating filters are needed for judicious placement at the package and die level. High thermal resistance associated with embedded passives results in a threshold for power losses in embedded inductors beyond which the conventional top-level cooling is insufficient and a local cooling solution is needed. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
38. Embedded Inductors Using Composite Magnetic Materials for 12–1-V Integrated Voltage Regulators.
- Author
-
Alvarez Barros, Claudio, Murali, Prahalad, Swaminathan, Madhavan, Yusuke, Oishi, Junichi, Takashiro, Ryo, Nagatsuka, and Watanabe, Naoki
- Subjects
MAGNETIC materials ,VOLTAGE regulators ,COMPOSITE materials ,METAL-filled plastics ,MECHANICAL properties of condensed matter ,URANIUM-lead dating - Abstract
Substrate-embedded inductors enable the miniaturization of power modules and integrated voltage regulators (IVRs) with higher power efficiencies and performance. However, embedded inductors for single-stage 12- or 48–1-V high-conversion-ratio IVRs present new performance challenges due to limitations in magnetic materials, limited space, high frequency, and low duty cycle. In this work, we analyze seven embedded inductor designs fabricated with four metal-polymer composites magnetic materials. These inductors have inductances ranging from 20 to 500 nH, dc resistances between 14 and 40 mΩ, and saturation currents from 100 mA to over 5 A. Each inductor is characterized for its small-signal spectra with and without dc bias current and for its large-signal response. With all these measurements, a relation between the small- and large-signal losses is made, showing that using the new R
acx metric, they are related by a factor κ. The measurements show that, in the megahertz range, the large-signal losses can be over four times larger than the small-signal ones. These analyses allow us to understand the material properties and modeling new magnetic materials targeted for high-conversion-ratio IVRs with input voltages greater than 5 V. [ABSTRACT FROM AUTHOR]- Published
- 2021
- Full Text
- View/download PDF
39. Chiplet/Interposer Co-Design for Power Delivery Network Optimization in Heterogeneous 2.5-D ICs.
- Author
-
Kim, Jinwoo, Chekuri, Venkata Chaitanya Krishna, Rahman, Nael Mizanur, Dolatsara, Majid Ahadi, Torun, Hakki Mert, Swaminathan, Madhavan, Mukhopadhyay, Saibal, and Lim, Sung Kyu
- Subjects
PARTICIPATORY design ,INTEGRATED circuit design ,ELECTRONIC design automation - Abstract
In this article, we present an effective methodology for co-design, co-analysis, and the system-level optimization of chiplet/interposer power delivery network (PDN) in 2.5-D integrated chip (IC) designs. In our methodology, we first generate a commercial-grade heterogeneous 2.5-D IC designs including full signal routing and power delivery. We then perform our PDN co-analysis in frequency and time domains on the entire PDN to evaluate various mechanisms added to our PDN designs. Based on our co-analysis results, we perform the system-level optimization on both interposer and chiplet PDNs with the stable performance of power delivery. Finally, we perform power, performance, and area (PPA) analysis and power integrity (PI) on our 2.5-D designs and discuss tradeoffs in chiplet and interposer levels due to PDN optimization. Our experiments show 27.17% improvement in the overall IR-drop in the optimized 2.5-D IC design by increasing the interposer PDN occupancy by 5.52% and inserting the additional PDN grids in chiplet designs. However, we also observe tradeoffs in terms of PPA and PI. By PDN optimization, the optimized design has an 11.6% increase of the total power, while the area of 2.5-D design remains the same. Moreover, from the perspective of PI, the tradeoffs are shown by 0.6% reduction of power efficiency, 32.6% higher output ripple, and 31.5% higher initial ringing because of an inductive behavior of interposer PDN in the optimized design. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
40. Proposed Inductor Power Loss Metric and Novel Embedded Toroidal Inductor for Integrated Voltage Regulators.
- Author
-
Barros, Claudio Alvarez, Murali, Prahalad, Swaminathan, Madhavan, Yusuke, Oishi, Junichi, Takashiro, Ryo, Nagatsuka, and Watanabe, Naoki
- Subjects
VOLTAGE regulators ,MAGNETIC materials ,MAGNETIC fields ,ELECTRIC inductance ,MAGNETIC cores ,VOLTAGE control - Abstract
High-density package-embedded inductors enable the miniaturization of high conversion ratio integrated voltage regulators (IVRs). In this work, we present a new embedded inductor structure along with a new performance metric called effective ac resistance per unit inductance and how the inductor sets constraints to the power stage topology. The proposed performance metric depends on the converter duty cycle and frequency and uses the inductor current harmonics, its inductance and resistance spectra, and the large-signal response to compute the inductor losses. No information of the inductor volume or its magnetic field distribution is used. The proposed embedded inductor structure shows a toroidal field distribution using a combination of slots through a magnetic sheet and vias through these slots. The new structure enables the fabrication of several inductors in the same magnetic substrate for multiphase IVR. The proposed inductors are fabricated and the metric is demonstrated with measurements using a high saturation magnetic material, where an interesting relation between the small- and large-signal losses was observed. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
41. Electrical design of an MCM package for a multi-processor digital system
- Author
-
Sarfaraz, Ali, Swaminathan, Madhavan, Crocker, Jim, Bhatia, Harsaran, and Nealon, Michael
- Subjects
Multiprocessors -- Research ,Digital integrated circuits -- Research ,Business ,Engineering and manufacturing industries ,Science and technology - Abstract
A new electrical design of a Multichip Module is developed for application to parallel processing. Proper orientation of nets in the multichip module, which decreases the design cycle time, is facilitated by the electrical design before the physical design. The new design is developed with the consideration of different electrical aspects such as coupled noise, signal integrity and delta noise.
- Published
- 1995
42. Surface integral formulation for calculating conductor and dielectric losses of various transmission structures
- Author
-
Roy, Tanmoy, Sarkar, Tapan K., and Swaminathan, Madhavan
- Subjects
Microwave transmission lines -- Research ,Attenuation -- Analysis ,Electric power systems -- Electric losses ,Business ,Computers ,Electronics ,Electronics and electrical industries - Abstract
The power-loss method, along with a surface integral formulation, has been used to compute the attenuation constant in microstrip and coplanar structures. This method can be used for the analysis of both open and closed structures. Using the surface equivalence principle, the waveguide walls are replaced by equivalent electric surface currents and dielectric surfaces are replaced by equivalent electric and magnetic surface currents. Enforcing the appropriate boundary condition, and E-field integral equation (EFIE) is developed for these currents. Method of moments with pulse expansion and point matching testing procedure is used to transform the integral equation into a matrix one. The relationship between the propagation constant and frequency is found from the minimum eigenvalue of the moment matrix. The eigenvector pertaining to the minimum eigenvalue gives the unknown electric and magnetic surface currents.
- Published
- 1995
43. Measurement of dielectric anisotropy of BPDA-PDA polyimide in multilayer thin-film packages
- Author
-
Deutsch, Alina, Swaminathan, Madhavan, Ree, M.-H., Surovic, Christopher W., Arjavalingam, G., Prasad, Keshav, McHerron, Dale C., McAllister, Michael, Kopcsay, Gerard V., Giri, A.P., Perfecto, Eric, and White, G.E.
- Subjects
Anisotropy -- Research ,Dielectrics -- Research ,Thin films, Multilayered -- Research ,Polyimides -- Research ,Business ,Engineering and manufacturing industries ,Science and technology - Abstract
A study of the dielectric anisotropy in poly(p-phenylene biphenyltetracarbonimide) (BPPA-PDA) reveals that the BPDA-PDA polyimide exhibits significant dielectric anisotropic properties. The BPDA-PDA polyimides are widely used in multilayer electronic packaging structures. The values of out-of-plane and in-plane dielectric constants were 3.22 and 3.8, respectively.
- Published
- 1994
44. Design tradeoffs among MCM-C, MCM-D and MCM-D/C technologies
- Author
-
Iqbal, Asif, Swaminathan, Madhavan, Nealon, Michael, and Omer, Ahmed
- Subjects
Semiconductor chips -- Research ,Performance -- Measurement ,I/O devices -- Research ,Business ,Engineering and manufacturing industries ,Science and technology - Abstract
Design tradeoffs among the MCM-C, MCM-D and MCM-D/C technologies offer packaging options over a wide range of cost and performance. These tradeoffs are expressed as a function of I/O density, signal fidelity, propagation delays, wiring capacity, reduction of noise and cost. The use of a particular trade off depends on the required cost, performance and application. These design tradeoffs reduce the workload involved in the initial conception stages.
- Published
- 1994
45. Volume/scattering formulation for analyzing scattering from coated periodic strips
- Author
-
Petre, Peter, Swaminathan, Madhavan, Zombory, Laszlo, Sarkar, Tapan K., and Jose, K.A.
- Subjects
Scattering (Physics) -- Research ,Dielectrics -- Research ,Business ,Computers ,Electronics ,Electronics and electrical industries - Abstract
A surface/surface formulation was used in [1] to analyze the scattering from periodic planar coated strips. This paper is an extension of [1] where a combined volume/surface formulation has been used to solve the same problem. This formulation can be applied to problems which involve an inhomogeneous dielectric medium or/and a thick dielectric which requires the inclusion of the edge currents which were neglected in [1] as a simplification. Results obtained using the volume/surface formulation have been compared with the results published in [1] which were obtained using a surface/surface formulation.
- Published
- 1994
46. Integral equation solution for analyzing scattering from one-dimensional periodic coated strips
- Author
-
Petre, Peter, Swaminathan, Madhavan, Veszely, Gyula, and Sarkar, Tapan
- Subjects
Integral equations -- Usage ,Electromagnetism -- Research ,Business ,Computers ,Electronics ,Electronics and electrical industries - Abstract
A set of integral equations based on the surface/surface formulation have been developed in this paper for analyzing the electromagnetic scattering by one-dimensional periodic structures. To compare the accuracy, efficiency, and robustness of the formulation, the electric field integral equation (EFIE), magnetic field integral equation (MFIE), and combined field integral equation (CFIE) have been developed to analyze the same structure for different excitations. Due to the periodicity of the structure, the integral equations have been formulated in the spectral domain using the Fourier transform of the integrodifferential operators. The generalized biconjugate gradient-fast Fourier transform (BiCG-FFT) method with subdomain basis functions has been applied to solve the matrix equation.
- Published
- 1993
47. Conductor loss in hollow waveguides using a surface integral formulation
- Author
-
Swaminathan, Madhavan, Sarkar, Tapan K., Petre, Peter, and Roy, Tanmoy
- Subjects
Waveguides -- Research ,Attenuation -- Analysis ,Integral equations -- Usage ,Wave propagation -- Research ,Business ,Computers ,Electronics ,Electronics and electrical industries - Abstract
The power-loss method along with a surface integral formulation has been used to compute the attenuation constant in hollow waveguides of arbitrary cross-section. An E-field integral equation is developed for the surface electric currents which is transformed into a matrix equation using the method of moments. An iterative technique, i.e., Muller's method is used to obtain the relation between the propagation constant and frequency. The attenuation constants have been calculated and formulated for various waveguides and are in good agreement with published data., An analysis of conductor loss in hollow waveguides of arbitrary cross section is presented. It combines the power-loss technique and surface integral principle to derive the attenuation constant. In the surface integral method, the waveguide walls are represented by electric surface currents for which an E-field integral equation is obtained. The moment method then turns the latter into a matrix equation after which the correlation between the propagation constant and the frequency is derived.
- Published
- 1992
48. Computation of TM and TE modes in waveguides based on a surface integral formulation
- Author
-
Swaminathan, Madhavan, Sarkar, Tapan K., and Adams, Arlon T.
- Subjects
Waveguides -- Research ,Wave functions -- Research ,Waveforms -- Research ,Business ,Computers ,Electronics ,Electronics and electrical industries - Published
- 1992
49. Design Space and Frequency Extrapolation: Using Neural Networks.
- Author
-
Waqar Bhatti, Osama, Ambasana, Nikita, and Swaminathan, Madhavan
- Abstract
With the tremendous growth of the semiconductor industry, compute power and memory have become cheap and accessible. One interesting outcome of this growth has been the adoption of machine learning (ML) in several fields traditionally dominated by physics and mathematics [1]-[9]. Solving electrically large systems by analyzing their electromagnetic (EM), thermal, and mechanical behavior can be a time- and memory-intensive process. But, as is well known today, such analyses become inevitable with 1) the increase in operating frequencies, 2) the scaling in system and device size, and 3) the hybrid nature of different components packaged in close proximity. As system complexity increases, design cycles become longer since each product iteration requires the multivariable analysis of EM structures. Contemporary examples of such complexity are millimeter-wave (mmwave) systems, where multiple chiplets and microwave components are integrated on a single substrate or package [10], [11]. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
50. High-density low-loss millimeter-wave package interconnects with the impact of dielectric-material surface roughness.
- Author
-
Watanabe, Atom O., Kanno, Kimiyuki, Ito, Hirokazu, Tummala, Rao R., and Swaminathan, Madhavan
- Subjects
DIELECTRIC materials ,MICROSTRIP transmission lines ,PACKAGING ,DIELECTRICS - Abstract
Heterogeneous package integration and chiplet approaches are the key technology to enable next-generation high performance small form-factor packages for emerging applications. Millimeter-wave packaging for fifth-generation and upcoming sixth-generation platforms also need to meet the high-density low signal-loss interconnect specifications utilizing advanced conductor and dielectric materials. This article presents the comparison of the liquid-based photoimageable dielectric (PID) and dry-film dielectric materials in terms of interconnect path losses that are critical in mm-wave frequency bands. The conductor loss being more dominant in the frequency bands and in thinner dielectric structures, we assess daisy chains and microstrip lines on 15-μm dielectric by measuring the S-parameters to quantify the impact of the surface roughness at around 28 GHz. Measured results from the daisy chain and microstrip line structures exhibit that the smooth surface of the liquid-based PID (3 nm) leads to 8%–32% lower signal loss in the dB scale than the 325-nm rough dry-film dielectric. The study provides comprehensive experimental results that the different material forms with various surface roughness largely impact the package-level interconnect loss. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
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