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Cooperative learning and work-integrated learning are the latest trends in information delivery at high schools and universities. In cooperative learning, teachers organize students' interactions and educate them to work in small groups to enhance each other's learning. Whereas, work-integrated learning, is a type of experiential learning that allows students to participate in real-world work during their studies. Both approaches help bridge the gap between theoretical knowledge gained from classrooms and professional market needs. Electrical engineering is a field that could highly benefit from such a scheme. Having to be continuously up-to-date with the latest advances in the field of micro-electronics is difficult. Consequently, Several challenges are imposed on faculty members and academics who teach micro-electronics circuit design courses in electrical engineering for senior undergraduate or graduate students. This paper presents a case study of the apparent benefits and effectiveness of cooperative learning and work-integrated learning in the Electronics II and VLSI classes offered at a university. Furthermore, it aids programs in electrical engineering to meet ABET students' outcome (4). [ABSTRACT FROM AUTHOR]

This paper proposes a high-efficiency and dimmable current sink topology along with a design methodology for low node processes. The design methodology is demonstrated using a boost-based WLED driver application. In this work, the focus is on current regulation rather than voltage regulation. Therefore, the proposed topology exploits a smaller and faster NMOS pass device, replacing the conventional PMOS-based LDO arrangement. An amplifier-boosted pass-transistor current sink topology combined with a 5-bit programmable degenerated source resistor is being utilized for high-efficiency and brightness control. The realized WLED driver validates the proposed topology and the design methodology utilizing 40 nm CMOS TSMC technology. The design takes advantage of the programmability of the resistor to enhance the system's power efficiency. This programmable resistor enables dimmability via current segmentation with a 1 mA step for a total of 25 mA. For a 500 mV voltage ripple at the DC-DC converter output driving 6 WLEDs with a 3.2 V forward voltage drop each, a worst-case current ripple of 200 µA and simulated efficiency of 97.6% is achieved for optimum pass-transistor size. [ABSTRACT FROM AUTHOR]

This work presents various essential features and design aspects of a single-inductor, common-output, and multi-string White Light Emitting Diode (WLED) driver for low-power portable devices. High efficiency is one of the main features of such a device. Here, the efficiency improvement is achieved by selecting the proper arrangement of WLEDs and a proper sensing-circuit technique to determine the minimum, real-time, needed output voltage. This minimum voltage necessary to activate all WLEDs depends on the number of strings and the forward voltage drops among the WLEDs. Advanced CMOS technology is advantageous in mixed-signal environments such as WLED drivers. However, this process suffers from low on-resistance, which degrades the accuracy of the current sinks. To accommodate the above features and mitigate the low node process issue, a boost-converter that is single output with a load of a three-string arrangement, with 6 WLEDs each, is presented. The designed driver has an input voltage range of 3.2–4.2V. The proposed solution is realized with ultra-low power consumption circuits and verified using ADS tools utilizing 40 nm 1P9M TSMC CMOS technology. An inter-string current accuracy of 0.2% and peak efficiency of 91% are achieved with an output voltage up to 25 V. The integrated WLED driver circuitry enables a high switching frequency of 1MHz and reduces the passive elements' size in the power stage. [ABSTRACT FROM AUTHOR]

Rapid shutdown for rooftop PV cells requires an inside array boundary of 305mm to be de-energized to 30 Volts or less within 30 seconds of initiation of a rapid shutdown event, according to Sunspec specifications. The specification set by Sunspec allows controllers to communicate using a single communication protocol defined by Sunspec, providing interoperability between different components, which utilizes power-line (PLC) communication as a mean of transferring data. This paper proposes a system architecture for a rapid shutdown receiver, that utilizes multi-stage feedback band-pass filtering techniques to actively remove noise from the PLC network and deliver the S-FSK message transmitted to the decision-making block with frequencies to the Mark and Space of frequencies 131.25kHz and 143.75kHz respectively. Furthermore, this paper uses a signal mixing technique to enhance the system's reliability, stability, and provides another layer of security via utilizing the low-frequency as an enabling signal to the decision-making stage (not covered in this paper). [ABSTRACT FROM AUTHOR]

In this work, a multi-independent-output, multi-string, high-efficiency, boost-converter-based white LED (WLED) driver architecture is proposed. It utilizes a single inductor main switch with a common maximum duty cycle controller (MDCC) in the feedback loop. A simple pulse skipping controller (PSC) is utilized in each high-side switch of the multiple independent outputs. Despite the presence of multiple independent outputs, a single over-voltage protection (OVP) circuit is used at the output to protect the circuit from any voltage above 27 V. An open circuit in any of the strings is addressed, in addition to the LED's short-circuit conditions. Excellent current matching between strings is achieved, despite the low ON-resistance ( R d s o n ) of transistors used in the 40 nm process. Most circuits are designed in digital CMOS logic to overcome the extreme process variations in the 40 nm node. Compared to a single output parallel strings topology, a 50 % improvement in efficiency is achieved relative to extremely unbalanced strings. Three strings are used in this proposal, but more strings can be supported with the same topology. Each string is driven by a 25 mA current sink. An input voltage of 3.2–4.2 V and an output voltage up to 27 V are supported. [ABSTRACT FROM AUTHOR]

This paper describes the design methodology and calibration technique for a low-power digital pulse width modulation demodulator to enhance its robustness against the process, voltage, and temperature variations in different process corners, in addition to intra-die variability, which makes it a very good choice for implantable monitoring sensors. Furthermore, the core of the proposed demodulator is fully digital. Thus, along with the proposed design methodology, the proposed demodulator can be simply redesigned in advanced subnanometer CMOS technologies without much difficulty as compared to analog demodulators. The proposed demodulator consists of an envelope detector, a digitizer, a ring oscillator, and a data detector with digital calibration. All the proposed circuits are designed and simulated in the standard 1P9M TSMC's 40 nm CMOS technology. Simulation results have shown that the circuit is capable of demodulating and recovering data from an input signal with a carrier frequency of 13.56 MHz and a data rate of 143 kB/s with an average power consumption of 5.62 μ W. [ABSTRACT FROM AUTHOR]