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Line patterns produced by lamellae- and cylinder-forming block copolymer (BCP) thin films are of widespread interest for their potential to enable nanoscale patterning over large areas. In order for such patterning methods to effectively integrate with current technologies, the resulting patterns need to have low defect densities, and be produced in a short timescale. To understand whether a given polymer or annealing method might potentially meet such challenges, it is necessary to examine the evolution of defects. Unfortunately, few tools are readily available to researchers, particularly those engaged in the synthesis and design of new polymeric systems with the potential for patterning, to measure defects in such line patterns. To this end, we present an image analysis tool, which we have developed and made available, to measure the characteristics of such patterns in an automated fashion. Additionally we apply the tool to six cylinder-forming polystyrene-block-poly(2-vinylpyridine) polymers thermally annealed to explore the relationship between the size of each polymer and measured characteristics including line period, line-width, defect density, line-edge roughness (LER), line-width roughness (LWR), and correlation length. Finally, we explore the line-edge roughness, line-width roughness, defect density, and correlation length as a function of the image area sampled to determine each in a more rigorous fashion.

Precise positioning of metallic nanostructures on semiconductor surfaces is important for applications such as photovoltaics, photoelectrocatalysis, metal interconnects, sensing platforms, and many others. In this paper, we demonstrate the utilization of self-assembling diblock copolymer monolayer films, made up of polystyrene-block-poly(2- or 4-vinylpyridine) (PS-b-P2VP or PS-b-P4VP), to spatially direct an aqueous metal reduction reaction on semiconductor surfaces, a process we call galvanic displacement. The diblock copolymer forms hexagonal arrays of spherical micelles consisting of a P2VP or P4VP core surrounded by a PS corona. Two approaches were developed, termed method 1 and method 2, to deliver metal ions to the semiconductor interface in a spatially defined manner utilizing the diblock template. In method 1, a metal complex preloaded into the P4VP cores is spontaneously reduced on the surface to form hexagonally ordered metallic nanoparticles whose structures mirror the parent polymer templates. This approach was employed to produce ordered Ag nanoparticles on Ge(100), InP(100), and GaAs(100) surfaces. Method 2, on the other hand, involves coating the semiconductor surface with an unloaded self-assembled block copolymer monolayer, followed by immersion in a solution of the metal ions and additional reagents, if required. Method 2 is particularly useful to pattern semiconductor surfaces that require the presence of hydrofluoric acid (HF) as an etchant to initiate the galvanic displacement, including Si(100). Using method 2, Cu, Au, Pt, and Pd nanoparticles were patterned on the semiconductor surfaces. In addition, the apparent order of the self-assembled monolayers is better as compared to that of the preloaded block copolymers (prepared via method 1). Since the self-assembling nanostructures of the PS-b-P2VP or PS-b-P4P diblock copolymers can be inverted to a PS core surrounded by a P2VP or P4VP corona (the so-called core−corona inversion) in the presence of HF, patterns of the resulting metallic structures are influenced by this morphological shift. The effects of polymer morphology on the galvanic displacement is described, and as an alternative approach, metal ion reduction and polymer removal with hydrogen/argon plasma is outlined. [ABSTRACT FROM AUTHOR]

Galvanic displacement, mediated by a diblock copolymer, leads to deposition of well dispersed gold and silver nanoparticles on germanium nanowires. [ABSTRACT FROM AUTHOR]

Using high surface area nanostructured electrodes in organic photovoltaic (OPV) devices is a route to enhanced power conversion efficiency. In this paper, indium tin oxide (ITO) and hybrid ITO/SiO2 nanopillars are employed as three-dimensional high surface area transparent electrodes in OPVs. The nanopillar arrays are fabricated via glancing angle deposition (GLAD) and electrochemically modified with nanofibrous PEDOT:PSS (poly(3,4-ethylenedioxythiophene):poly(p-styrenesulfonate)). The structures are found to have increased surface area as characterized by porosimetry. When applied as anodes in polymer/fullerene OPVs (architecture: commercial ITO/GLAD ITO/PEDOT:PSS/P3HT:PCBM/Al, where P3HT is 2,5-diyl-poly(3-hexylthiophene) and PCBM is [6,6]-phenyl-C61-butyric acid methyl ester), the air-processed solar cells incorporating high surface area, PEDOT:PSS-modified ITO nanoelectrode arrays operate with improved performance relative to devices processed identically on unstructured, commercial ITO substrates. The resulting power conversion efficiency is 2.2% which is a third greater than for devices prepared on commercial ITO. To further refine the structure, insulating SiO2 caps are added above the GLAD ITO nanopillars to produce a hybrid ITO/SiO2 nanoelectrode. OPV devices based on this system show reduced electrical shorting and series resistance, and as a consequence, a further improved power conversion efficiency of 2.5% is recorded. [ABSTRACT FROM AUTHOR]