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In this paper, a new method for evaluating hot-electron degradation in p-GaN gate AlGaN/GaN power HEMTs is proposed. The method exploits a commercial parameter analyzer to study VTH and RON drifts induced by on-state stress at VDS = 50 V. The results show that VTH drift and part of the RON degradation induced by the on-state stress are recoverable and likely due to the ionization of C-related acceptors in the buffer. This was confirmed by a preliminary characterization of C-related buffer traps. Conversely, the remaining part of RON degradation (not recovered in 1000 s) was strongly affected by the surface treatment. The current level set during on-state stress affected the amount of non-recoverable degradation, confirming the involvement of hot electrons. Thanks to the monitoring of the parameters’ recovery, the proposed method provides important insights into the physical mechanisms governing the parameters’ degradation. This extends the capabilities of state-of-the art systems, without the need for custom setup development.

For the first time, we use electrical characterization, spectrally-resolved electroluminescence measurements and degradation tests to explain the negative activation energy of gate reliability in power GaN HEMTs with p-GaN Schottky gate. First, the origin of gate leakage current was modeled. The results indicate that the gate leakage current originates from three different mechanisms: (i) thermionic emission of electrons from the uid-GaN layer across the AlGaN barrier, for gate voltages below threshold $(V_{G} \lt V_{TH})$ , (ii) thermionic emission of electrons from the channel to the p-GaN layer $(V_{TH} \lt V_{G} \lt 4.5 V)$ and (iii) trap-assisted-tunneling of holes at the Schottky metal for higher gate voltages. Then, the analysis of the reliability as function of gate bias demonstrated a negative activation energy (longer lifetime at high temperature). By analyzing the electroluminescence spectra under high positive bias, the improved time to failure at high temperatures was ascribed to the increased hole injection and recombination, that reduces the overall number of electrons that undergo avalanche multiplication, leading to the breakdown. Finally, the model was validated by comparing the electrical properties and conduction model of the devices pre- and post-stress.

AlGaN/GaN devices for both power and RF applications have been investigated in this work. In particular, regarding power applications, 100 V p-GaN gate transistors have been analysed both in DC and in dynamic conditions with specific attention to the high temperature behaviour.As a first step, the high temperature behaviour of the on-resistance (RON) of a reference process (STD process) has been investigated. The role of the different resistive components of the transistor has been analysed by evaluating how their relative weight changes with the temperature increase. Then, two different p-GaN process variations (process A and process B) have been proposed and compared to the STD process to show their improvement in terms of a limited RON increase at 150 °C, highlighting the relevance of an improved p-GaN gate processing.Secondly, the temperature effect on the RON-degradation induced by off-state drain voltage stress has been investigated in process B-like devices. The impact of temperature on the time required to reach a steady state degradation has been addressed, enabling the comparison of the RON degradation (RON/ RON0) at equilibrium. Tests performed on several samples have demonstrated the invariance of the RON/ RON0 ratio in the 25 °C to 150 °C range, suggesting the possibility to reduce the measurements required for dynamic-RON evaluation at different T.Finally, RF devices (featuring Schottky metal gate) have been characterized in terms of DC/RF performances and long-term reliability (through HTRB tests). Different trials with increasing aluminium content of the AlGaN barrier have been compared, showing the correlation with the maximum saturation current and the output power. Moreover, the trade-off with reliability specifications has been put in evidence.

The role of the magnesium (Mg) doping and its electrical activation on the off-state of p-GaN/AlGaN/GaN HEMTs has been investigated in this work. Firstly, the effect of different Mg doping profiles has been studied via the help of Technology Computer-Aided Design (TCAD) simulations, with the objective of analyzing the band diagrams of the structure. Then, it has been shown how experimental Capacitance–Voltage measurements can be useful to obtain information on the net acceptor concentration in the p-GaN. As a result, devices with an undoped (magnesium-free) GaN gate have been experimentally compared to devices whose p-GaN gate has been activated via a reference annealing process. Finally, results on a device characterized by an improved p-GaN activation have been presented and compared, showing improvements on several parameters of both off- and on-state, thus underlining the key role of the Mg activation process in the overall performances of normally-off GaN HEMTs.

Today, wide bandgap (WBG) GaN semiconductors are considered the future, allowing the improvement of power transistors. The main advantage of GaN is the presence of two-dimensional electron gas (2Deg) typically used as a conduction layer in normally-on and normally-off transistors. Concerning the normally-off family, several solutions are proposed. Among these, one of the most promising is the MIS-Gate technology that features a gate recess architecture allowing the semiconductor to physically cut off the 2Deg and drastically decrease gate–source leakage currents. The Vth relaxation characteristic, after voltage stress, has been investigated. It has been shown that the main impact is due to charges close to the gate dielectric/GaN interface, precisely dwelling within the dielectric or the GaN epitaxy. This work provides an analytical model of the Vth evolution of these MIS-GATE (metal insulator semiconductor gate) transistors fabricated on GaN-silicon substrate. This model allows the extraction of different trap energy levels from a temporary threshold voltage (Vth) shift after 650 V stress. Based on this method, it is possible to identify up to four different trap energy levels. By comparing state of the art methods, we show that these obtained energy levels are well correlated with either magnesium and carbon impurity or Ga and/or N vacancy sites in the GaN epitaxy.

The on-resistance (RON) degradation in normally-OFF GaN high electron mobility transistors has been evaluated both experimentally and by means of numerical simulations by analyzing its drift during device pulse-mode operation. Experimental data showed that the device RON measured during the on-time interval of the switching period increased with time resulting in a thermally activated process with an activation energy EA = 0.83 eV. For the first time, numerical simulations have been carried out in order to evaluate the device RON drift during pulse-mode operation and to understand the physical phenomena involved. A good qualitative agreement between experimental and simulated data has been obtained when considering in the simulated device simply a hole trap located at 0.83 eV from the GaN valence-band, an energy level which has been linked in previous works to carbon-doping within the GaN buffer.

Studying the electrical and structural properties of the interface of the gate oxide (SiO2) with silicon carbide (4H-SiC) is a fundamental topic, with important implications for understanding and optimising the performances of metal-oxide-semiconductor field effect transistor (MOSFETs). In this paper, near interface oxide traps (NIOTs) in lateral 4H-SiC MOSFETs were investigated combining transient gate capacitance measurements (C–t) and state of the art scanning transmission electron microscopy in electron energy loss spectroscopy (STEM-EELS) with sub-nm resolution. The C–t measurements as a function of temperature indicated that the effective NIOTs discharge time is temperature independent and electrons from NIOTs are emitted toward the semiconductor via-tunnelling. The NIOTs discharge time was modelled also taking into account the interface state density in a tunnelling relaxation model and it allowed us to locate traps within a tunnelling distance of up to 1.3 nm from the SiO2/4H-SiC interface. On the other hand, sub-nm resolution STEM-EELS revealed the presence of a non-abrupt (NA) SiO2/4H-SiC interface. The NA interface shows the re-arrangement of the carbon atoms in a sub-stoichiometric SiOx matrix. A mixed sp2/sp3 carbon hybridization in the NA interface region suggests that the interfacial carbon atoms have lost their tetrahedral SiC coordination. [ABSTRACT FROM AUTHOR]

This letter presents time-dependent gate-capacitance transient measurements (C–t) to determine the oxide trapped charges (Not) in Al2O3 films deposited on recessed AlGaN/GaN heterostructures. The C–t transients acquired at different temperatures under strong accumulation allowed to accurately monitor the gradual electron trapping, while hindering the re-emission by fast traps that may affect conventional C–V hysteresis measurements. Using this method, an increase of Not from 2 to 6 × 1012 cm−2 was estimated between 25 and 150 °C. The electron trapping is ruled by an Arrhenius dependence with an activation energy of 0.12 eV which was associated to points defects present in the Al2O3 films. [ABSTRACT FROM AUTHOR]