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A digital beam-forming antenna (DBF antenna) used for mobile wireless communications has drawn considerable attention in conjunction with device technology advances. Effective use of the frequency spectrum by means of multibeam antennas and adaptive antennas for mobile communications has also been discussed. With regard to DBF antennas, an offline trial process by means of a workstation and trial fabrication of a general-purpose DSP have been reported. However, to satisfy the high functionality and high-speed operation required for a DBF antenna, an application specific integrated circuit (ASIC) for the digital signal processing section must be realized. The ASIC described here is configured from a digital signal processor that uses a gate array called an FPGA, which can be developed by the user. The gate size necessary for circuit configuration obtained by a trial fabrication is explained and performance for a one-chip ASIC realized with a similar design is discussed. Experimental results are shown for real-time multibeam forming in a large anechoic chamber using the trial system. Confirmation of automatic tracking by means of maximum received beam selection is also shown. © 1997 Scripta Technica, Inc. Electron Comm Jpn Pt 1, 80 (2):100–111, 1997 [ABSTRACT FROM AUTHOR]