Search

Your search keyword '"Lodovico Ratti"' showing total 101 results

Search Constraints

Start Over You searched for: Author "Lodovico Ratti" Remove constraint Author: "Lodovico Ratti" Search Limiters Full Text Remove constraint Search Limiters: Full Text
101 results on '"Lodovico Ratti"'

Search Results

1. Layered CMOS SPADs for Low Noise Detection of Charged Particles

2. First Demonstration of a Two-Tier Pixelated Avalanche Sensor for Charged Particle Detection

3. A Wireless, Battery-Powered Probe Based on a Dual-Tier CMOS SPAD Array for Charged Particle Sensing

4. Dark Count Rate Distribution in Neutron-Irradiated CMOS SPADs

5. DCR Performance in Neutron-Irradiated CMOS SPADs from 150- To 180-nm Technologies

6. Ionizing Radiation Effects on the Noise of 65 nm CMOS Transistors for Pixel Sensor Readout at Extreme Total Dose Levels

7. First Demonstration of a Two-Tier Pixelated Avalanche Sensor for Charged Particle Detection

8. A 65 nm CMOS analog processor with zero dead time for future pixel detectors

9. Algorithms for Threshold Dispersion Minimization of the CHIPIX65 Asynchronous Front-End

10. Dark Count Rate Degradation in CMOS SPADs Exposed to X-Rays and Neutrons

11. Radiation tolerance characterization of Geiger-mode CMOS avalanche diodes for a dual-layer particle detector

12. Design and Test of a 65nm CMOS Front-End with Zero Dead Time for Next Generation Pixel Detectors

13. Characterization of SLVS Driver and Receiver in a 65 nm CMOS Technology for High Energy Physics Applications

14. Dynamic Compression of the Signal in a Charge Sensitive Amplifier: From Concept to Design

15. The PixFEL front-end for X-ray imaging in the radiation environment of next generation FELs

16. Development of a Large Pixel Chip Demonstrator in RD53 for ATLAS and CMS Upgrades

18. Test results of the CHIPIX65 asynchronous front-end for the HL-LHC experiment upgrades

19. A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC

20. Results from CHIPIX-FE0, a Small Scale Prototype of a New Generation Pixel Readout ASIC in 65nm CMOS for HL-LHC

21. APiX: a Geiger-mode Avalanche Digital Sensor for Particle Detection

22. Results from CHIPIX-FE0, a Small-Scale Prototype of a New Generation Pixel Readout ASIC in 65 nm CMOS for HL-LHC

23. First experimental results on active and slim-edge silicon sensors for XFEL

24. Review of radiation damage studies on DNW CMOS MAPS

25. PFM2: A 32 × 32 processor for X-ray diffraction imaging at FELs

26. The PixFEL project: Progress towards a fine pitch X-ray imaging camera for next generation FEL facilities

27. In-pixel conversion with a 10 bit SAR ADC for next generation X-ray FELs

28. 65 nm CMOS analog front-end for pixel detectors at the HL-LHC

29. Geiger-mode Avalanche Pixels in 180 nm HV CMOS Process for a Dual-layer Particle Detector

30. Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC

31. A 10 bit resolution readout channel with dynamic range compression for X-ray imaging at FELs

32. PFM2: A 32×32 readout chip for the PixFEL X-ray imager demonstrator

33. Characterization of bandgap reference circuits designed for high energy physics applications

34. Crosstalk mapping in CMOS SPAD arrays

35. The SLIM5 low mass silicon tracker demonstrator

36. TID Effects in Deep N-Well CMOS Monolithic Active Pixel Sensors

37. Recent developments in 130 nm CMOS monolithic active pixel detectors

38. The PixFEL project: development of advanced X-ray pixel detectors for application at future FEL facilities

39. PixFEL: developing a fine pitch, fast 2D X-ray imager for the next generation X-FELs

40. Design and TCAD simulation of planar p-on-n active-edge pixel sensors for the next generation of FELs

41. Impact of low-dose electron irradiation on n+p silicon strip sensors

42. Radiation damage studies for the BaBar Silicon Vertex Tracker

43. A fabrication process for silicon microstrip detectors with integrated front-end electronics

44. Feasibility studies of microelectrode silicon detectors with integrated electronics

45. PixFEL: Enabling technologies, building blocks and architectures for advanced X-ray pixel cameras at the next generation FELs

46. Low-noise readout channel with a novel dynamic signal compression for future X-FEL applications

47. Design and TCAD simulations of planar active-edge pixel sensors for future XFEL applications

48. Quadruple Well CMOS MAPS with time-invariant processor exposed to ionizing radiation and neutrons

49. Silicon avalanche pixel sensor for high precision tracking

50. Macro Pixel ASIC (MPA): the readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC

Catalog

Books, media, physical & digital resources