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Solder joints can experience fatigue cracking at the interface between the solder and substrate during thermal cycling due to the difference in thermal expansion between joined components. In order to strengthen the interfacial region and prevent cracking, two Cu pad surface treatments were studied on Sn-3Ag-0.5Cu solder, and on matte Sn plate and Ni plate coatings. The resulting intermetallic microstructures were characterized using scanning electron microscopy and energy-dispersive spectroscopy. Mechanical testing was performed using nano-indentation on the solder joints. The matte Sn plate on Cu sample formed an uneven distribution of Ag3Sn particles and a planar Cu6Sn5 interfacial intermetallic. The Ni-plated sample formed a needle-like Ni-rich interfacial intermetallic and uniform dispersion of Ag3Sn particles. The rough intermetallic compound (IMC)/solder interface and even IMC particle distribution cause the Ni-plated sample to experience reduced damage under board-level thermomechanical cycling because the interfacial structure reduces the Sn matrix recrystallization that contributes to fatigue cracking. In contrast, the matte Sn-plated sample exhibited an Ag3Sn particle-free zone adjacent to a planar Cu6Sn5 IMC layer which allows for rapid Sn recrystallization and fatigue crack propagation.

High strain-rate drop impact tests were performed for land grid array (LGA) packages with (electroless nickel immersion gold) ENIG metallization and lead-free solder interconnects. Sn-4Ag-0.5Cu (in wt%, SAC405), Sn-3.5Ag (in wt%), and Sn-0.7Cu (in wt%) were used for pretinning the LGA pads. SAC 405 alloy was used for the LGA-to-board mounting. Drop test results showed two distinct trends. Samples pretinned with Sn-4Ag-0.5Cu and Sn-3.5Ag showed poor drop performance while those pretinned with Sn-0.7Cu (in wt%) or without pretinning showed excellent drop performance. The dierence in behavior is related to the initial intermetallic morphology and structure. The needle shape Ni3Sn4-based intermetallics were observed for the first two cases. This led to poor adhesion between solder and NiP metallization. The samples with Sn-0.7Cu pretinning and no pretinning showed a continuous intermetallic morphology. In this case, sucient Cu improved the solder wetting and formed a continuous intermetallic morphology, leading to better drop performance. A sucient amount of Cu makes the better wetting, forming (Cu,Ni)

Consumer electronic applications are the primary target of the Pb-free initiative and package assembly and performance is affected by the move from eutectic Sn-Pb to Pb-free solder alloys. This paper outlines the key issues and mitigation possibilities for package assembly using Pb-free solders: High temperature reflow, Interfacial reactions, and Reliability. At the high temperatures required to reflow Pb-free alloys, moisture absorbed into the package can result in delamination and failure. The reaction of the Pb-free solder with Ni and Cu metallizations results in interfacial intermetallics that are not significantly thicker than with Sn-Pb but provide a path for fracture under mechanical loading due to the increased strength of the Pb-free alloys. The reliability issues discussed include thermomechanical fatigue, mechanical shock, electromigration and whiskering. The Pb-free alloys tend to improve thermomechanical fatigue and electromigration performance but are detrimental to mechanical shock and whiskering. Design trade-offs must be made to successfully implement Pb-free alloys into consumer applications.

A variety of lead-free solder alloys were studied for use as flip-chip interconnects including Sn-3.5Ag, Sn-0.7Cu, Sn-3.8Ag-0.7Cu, and eutectic Sn-37Pb as a baseline. The reaction behavior and reliability of these solders were determined in a flip-chip configuration using a variety of under-bump metallurgies (TiW/Cu, electrolytic nickel, and electroless Ni-P/Au). The solder micro-structure and intermetallic reaction products and kinetics were determined. The Sn-0.7Cu solder has a large grain structure and the Sn-3.5Ag and Sn-3.8Ag-0.7Cu have a fine lamellar two-phase structure of tin and Ag3Sn. The intermetallic compounds were similar for all the lead-free alloys. On Ni, Ni3Sn4 formed and on copper, Cu6Sn5Cu3Sn formed. During reflow, the intermetallic growth rate was faster for the lead-free alloys, compared to eutectic tin-lead. In solidstate aging, however, the interfacial intermetallic compounds grew faster with the tinlead solder than for the lead-free alloys. The reliability tests performed included shear strength and thermomechanical fatigue. The lower strength Sn-0.7Cu alloy also had the best thermomechanical fatigue behavior. Failures occurred near the solder/intermetallic interface for all the alloys except Sn-0.7Cu, which deformed by grain sliding and failed in the center of the joint. Based on this study, the optimal solder alloy for flip-chip applications is identified as eutectic Sn-0.7Cu.

A variety of Pb-free solder alloys have been proposed for use as interconnects for electronic packaging including Sn−Ag, Sn−Cu, Sn−Ag−Cu, Sn−Ag−Bi, and Sn−Sb, among others. This paper presents a review of the behavior of promising Pb-free solder alloys as related to their microstructure. Recommendations of optimal alloy composition as a function of performance requirements are given. For surface mount applications, eutectic Sn−Ag−Cu is recommended as the optimal alloy. For flip chip interconnects, the eutectic Sn-Cu alloy has the best performance. The materials and process trends of Pb-free packaging are summarized with optimal conditions identified.

Thermal mechanical fatigue (TMF) is an important damage mechanism for solder joints exposed to cyclic temperature environments. Predicting the service reliability of solder joints exposed to such conditions requires two knowledge bases: first, the extent of fatigue damage incurred by the solder microstructure leading up to fatigue crack initiation, must be quantified in both time and space domains. Secondly, fatigue crack initiation and growth must be predicted since this metric determines, explicitly, the loss of solder joint functionality as it pertains to its mechanical fastening as well as electrical continuity roles. This paper will describe recent progress in a research effort to establish a microstructurally-based, constitutive model that predicts TMF deformation to 63Sn-37Pb solder in electronic solder joints up to the crack initiation step. The model is implemented using a finite element setting; therefore, the effects of both global and local thermal expansion mismatch conditions in the joint that would arise from temperature cycling.

The important issues in advanced area-array electronic packaging for semiconductor devices are materials driven. Some of the processing-driven materials issues include the effect of introducing a silicon device interface with copper pads and a low-κ dielectric, the effect of decreasing pitch and feature size on the package interconnects, the development and implementation of organic substrates, and advanced underfills for fine-pitch flip-chip applications. From a materials reliability aspect, important materials issues include enhanced solder interconnect reliability, α-particle-induced soft errors, and the introduction of lead-free solder alloys.

A variety of new materials are needed for solder interconnects in electronic packages for high- and low-temperature applications. This article compares the mechanical behavior of low-temperature materials (Sn-40In-20Pb, Sn-58Bi, and a silver-loaded conductive adhesive) and high-melting-temperature solders (Sn-3.5Ag, Sn-3.4Ag-4.8Bi, and Sn-4.7 Ag-1.7Cu) to near-eutectic Sn-40Pb solder. The results indicate that there are promising materials alternatives to the traditional Sn-Pb solders in electronic interconnect applications.

The use of soft solders, particularly those containing lead, dates back nearly 5,000 years. Solders similar to the materials used to seal the aqueducts of ancient Rome are now an important building block in the manufacture of high-speed computer assemblies. This history attests to the technological versatility of soft solders and, in particular, the solder alloys that contain lead. However, the health effects of prolonged exposure to lead have also been documented; measures to limit human exposure—at the work place and indirectly through the environment—are being considered. The successful introduction of lead-free solders into future electronic products will rely heavily upon their solderability, which can be evaluated by test procedures such as the meniscometer/wetting balance technique and the capillary flow test.

We present the results of a metallurgical study of a 35Pd-30Ag-14Cu-10Au10Pt-1Zn (wt. %) alloy soldered with 60Sn-40Pb for glass-to-metal sealing applications. Mechanical tests were performed on the Pd-Ag-Cu-Au-Pt-Zn alloy and showed that it retains ductility, with an increase in strength, after heat treatments that simulate the glass-to-metal sealing temperature profile. Wetting characteristics of the alloy with 60Sn-40Pb solder were found to be adequate for pin joining applications. The formation and growth of the interfacial interme-tallic between 60Sn-40Pb and the Pd-Ag-Cu-Au-Pt-Zn alloy were characterized. The matrix of the intermetallic layer consists of PdSn4 with platinum and gold substituting for the palladium in the crystal structure. Also present were precipitates of Cu3Sn and Ag3Sn. Nano-indentation hardness tests showed that the intermetallic layer has mechanical properties similar to the base metal while retaining good ductility. The intermetallic was also found to have good wettability under solder reflow conditions. We conclude from these tests that the Pd-Ag-Cu-Au-Pt-Zn alloy is a suitable option as a pin material for glass-to-metal sealing applications.

The grain size and grain growth kinetics in sputter deposited Al-2% Cu films on silicon substrates were determined by TEM for various film thicknesses and anneal times, temperatures and methods. Grain sizes were found to be typically lognormally distributed. The as- deposited grain size (d{sub o}) dependence on film thickness (TH) was found to be d{sub o} = C TH{sup {1/2}}, due to competitive grain growth during film formation. Annealed grain size (d) after Rapid Thermal Annealing (RTA) for time (t) at temperature (T) is described by the general equation d {minus} do = C TH{sup 0.7} {l brace}t exp ({minus}{Delta}E{sub a}/kT){r brace}{sup 1/8}, where {Delta}E{sub a} = 0.85 ev for 0.4 {mu}m films and {Delta}E{sub a} = 1.1 ev for 0.8 {mu}m films. Grain growth is largely saturated for these anneals. Grain growth is shown to be more extensive during RTA anneals than furnace annealing and more extensive in 0.4 {mu}m films than 0.8 {mu}m films for equivalent RTA cycles. The results are discussed in terms of models, simulations and previous results of grain growth in thin metal films. 21 refs., 4 figs.

Thermomechanical fatigue tests were performed on two near-eutectic Sn-Pb solder alloys, 60 Sn-40 Pb and 62 Sn-36 Pb-2 Ag, to examine the effect silver additions have on solder joints. The cyclic load was found to have consistent trends between the two silver alloys (for given amounts of total strain and strain rates). It was found that a decreasing strain rate increased the life of both alloys equally in thermomechanical fatigue. At slower strain rates, the dislocation substructure recovers faster than it work-hardens, which tends to minimize subsequent recrystallization and heterogeneous coarsening of the solder joint. The microstructure of 62 Sn-36 Pb-2 Ag contained large whisker-like Ag/sub 3/Sn precipitates that nucleate and grow out from the Cu/sub 6/Sn/sub 5/ interfacial intermetallics. At this size, the Ag/sub 3/Sn precipitates have little effect on the deformation behavior of the solder. The intermetallics are not detrimental in that they do not prematurely crack, nor are they beneficial because they are too large to stabilize the microstructure. It does not appear, from a microstructural viewpoint, that adding silver to near-eutectic Sn-Pb has any significant effect on improving the thermomechanical fatigue behavior. >

A comprehensive method for testing solder joints under conditions of thermomechanical fatigue is presented. The method involves simultaneous imposition of temperature cycles and strain on discrete solder joints in a shear orientation. The stress, microstructure, and number of cycles to failure were monitored. Cycles to failure were determined by a continuous electrical detection method. 60Sn-40Pb and 40Sn-40In-20Pb solder joints were tested using the proposed method at 20% shear strain. The 60Sn-40Pb alloy has a shorter fatigue lifetime than 40Sn-40In-20Pb. This is attributed to heterogeneous coarsening strain in a small area of the 60Sn-40Pb microstructure. In contrast, the 40Sn-40In-20Pb microstructure becomes refined. The heterogeneous coarsening also results in cyclic softening in 60Sn-Pb, which was not observed in 40Sn-40In-20Pb. Failures initiated within the coarsened band in 60Sn-40Pb at Sn-Sn grain boundaries or phase boundaries. In contrast, failures initiated at the surface of 40Sn-40In-20Pb joints and propagated through both phases of the microstructure. >

The key conclusion out of the Solder Mechanics Workshop is that, overall, the technical and scientific community does not know as much quantitatively about solder behavior as we had hoped. The good news, however, is that the microelectronics user community, which is largely served by solder activities, has come to terms with the current environment through active participation in the workshop. The air has been cleared. As a technical community, we have a better idea of what our priorities for continued research are. A much more detailed overview of the workshop will be available shortly in monograph form. Individual chapters will be written by authors present at the workshop and will emphasize background material (e.g., literature critiques) and detail the technical consensus on critical issues central to the workshop. The book will be available through TMS and will be the first volume in a new series of technical monographs sponsored by the society's Electronic, Magnetic and Photonic Materials Division.

The thermomechanical fatigue failure of solder joints is increasingly becoming an important reliability issue for electronic packages. The purpose of this Laboratory Directed Research and Development (LDRD) project was to develop computational tools for simulating the behavior of solder joints under strain and temperature cycling, taking into account the microstructural heterogeneities that exist in as-solidified near eutectic Sn-Pb joints, as well as subsequent microstructural evolution. The authors present two computational constitutive models, a two-phase model and a single-phase model, that were developed to predict the behavior of near eutectic Sn-Pb solder joints under fatigue conditions. Unique metallurgical tests provide the fundamental input for the constitutive relations. The two-phase model mathematically predicts the heterogeneous coarsening behavior of near eutectic Sn-Pb solder. The finite element simulations with this model agree qualitatively with experimental thermomechanical fatigue tests. The simulations show that the presence of an initial heterogeneity in the solder microstructure could significantly degrade the fatigue lifetime. The single-phase model was developed to predict solder joint behavior using materials data for constitutive relation constants that could be determined through straightforward metallurgical experiments. Special thermomechanical fatigue tests were developed to give fundamental materials input to the models, and an in situ SEM thermomechanical fatiguemore » test system was developed to characterize microstructural evolution and the mechanical behavior of solder joints during the test. A shear/torsion test sample was developed to impose strain in two different orientations. Materials constants were derived from these tests. The simulation results from the two-phase model showed good fit to the experimental test results.« less

Chemical fluxes are typically used during conventional electronic soldering to enhance solder wettability. Most fluxes contain very reactive, hazardous constituents that require special storage and handling. Corrosive flux residues that remain on soldered parts can severely degrade product reliability. The residues are removed with chlorofluorocarbon (CFC), hydrochlorofluorocarbon (HCFC), or other hazardous solvents that contribute to ozone depletion, release volatile organic compounds into the atmosphere, or add to the solvent waste stream. Alternative materials and processes that offer the potential for the reduction or elimination of cleaning are being developed to address these environmental issues. Timing of the effort is critical, since the targeted chemicals will soon be heavily taxed or banned. DOE`s Office of Environmental Restoration and Waste Management (DOE/EM) has supported Sandia National Laboratories` Environmentally Conscious Manufacturing Integrated Demonstration (ECMID). Part of the ECM program involves the integration of several environmentally compatible soldering technologies for assembling electronics devices. Fluxless or {open_quotes}low-residue/no clean{close_quotes} soldering technologies (conventional and ablative laser processing, controlled atmospheres, ultrasonic tinning, protective coatings, and environmentally compatible fluxes) have been demonstrated at Sandia (SNL/NM), the University of California at Berkeley, and Allied Signal Aerospace-Kansas City Division (AS-KCD). The university demonstrations were directed under the guidance of Sandia staff.more » Results of the FY93 Soldering ID are presented in this report.« less

We present a new methodology for predicting the fatigue life of solder joints for electronics applications. This approach involves the integration of experimental and computational techniques. The first stage involves correlating the manufacturing and processing parameters with the starting microstructure of the solder joint. The second stage involves a series of experiments that characterize the evolution of the microstructure during thermal cycling. The third stage consists of a computer modeling and simulation effort that utilizes the starting microstructure and experimental data to produce a reliability prediction of the solder joint. This approach is an improvement over current methodologies because it incorporates the micro-structure and properties of the solder directly into the model and allows these properties to evolve as the microstructure changes during fatigue.

The need for increased speed and functionality by electronic components has pushed traditional electronic packages to the limit of their capabilities. Typically, the electronic device is electrically connected by wires or solder bumps in a package that gives the device environmental isolation and acts as a space transformer to transfer the electronic signals down leads to other discrete packaged devices on a printed circuit board. The discrete spacing of the devices and the time needed to propagate electronic signals along the wiring (that has a finite resistance and slows electron travel to a fraction of the speed of light) on the printed circuit board restricts the speed of the circuit. A promising solution is to use light, rather than electrons, to enhance signal transmission. The use of light, generated by lightemitting diodes (LEDs) or lasers, in these applications is called optoelectronic packaging. Applications in which optoelectronic packaging has had a significant impact include telecommunications (fiberoptic lines), optical reading devices (scanners), and supercomputers. The physics of transmitting signals via optics is well understood. However, there is a significant challenge in the area of interconnects. Interconnects are the interface between a transmission optics line and a device (Le., a laser or LED); they must be manufacturable and have excellent reliability. The difficulty with (and most expensive aspect of) optical interconnections is thatalignmentis critical. For multiple-mode optical interconnects, the alignment between the light source and the transmission line must be between 5 /lm and 10 /lm. In a singlemode interconnect, the alignment must be on the order of 1 /lm or less. The interconnects currently used for traditional electronic packages have nowhere near this requirement of alignment, being in the range of 50 to 100 /lm. Furthermore, accurate optical alignments represent up to 80 percent of the cost of the entire package. Therefore,innovativeapproaches to the materials used in optoelectronic packages-and their processing-are needed to enhance reliabil

This paper discusses the microstructures of solder joints and the mechanism of thermal fatigue, which is an important source of failure in electronic devices. The solder joints studied were near‐eutectic Pb‐Sn solder contacts on copper. The microstructure of the joints is described. While the fatigue life of near‐eutectic solder joints is strongly dependent on the operating conditions and on the microstructure of the joint, the metallurgical mechanisms of failure are surprisingly constant. When the cyclic load is in shear at temperatures above room temperature the shear strain is inhomogeneous, and induces a rapid coarsening of the eutectic microstructure that concentrates the deformation in well‐defined bands parallel to the joint interface. Fatigue cracks propagate along the Sn‐Sn grain boundaries and join across the Pb‐rich regions to cause ultimate failure. The failure occurs through the bulk solder unless the joint is so thin that the intermetallic layer at the interface is a significant fraction of the joint thickness, in which case failure may be accelerated by cracking through the intermetallic layer. The coarsening and subsequent failure are influenced more strongly by the number of thermal cycles than by the time of exposure to high temperature, at least for hold times up to one hour. Thermal fatigue in tension does not cause well‐defined coarsened bands, but often leads to rapid failure through cracking of the brittle intermetallic layer. Implications are drawn for the design of accelerated fatigue tests and the development of new solders with exceptional fatigue resistance.

Solder joints in electronic packages experience cyclical thermally induced strain when temperature fluctuations are encountered in service. This study investigates three parameters that affect the microstructure and therefore the thermal fatigue behavior of 60Sn-40Pb solder joints. These parameters are: 1) the effect of a tensile component in thermal fatigue, 2) solder joint thickness variations, and 3) hold time variations at the elevated temperature portion of the thermal cycle. Solder joints were thermally fatigued in a tension/compression deformation mode. Cracks developed both in the interfacial intermetallic layer (early in thermal fatigue) and in the coarsened regions of the microstructure of the solder joint (after many more cycles). The effect of joint thickness on solder joints thermally fatigued in shear was also explored. Solder joint thickness was found not to significantly affect fatigue lifetimes. The effect of an increase in the hold time at the elevated temperature portion of the thermal fatigue cycle was also investigated. It was found that time spent at the high temperature end of the fatigue cycle does not determine solder joint lifetime, rather it is the combination of the amount of deformation induced during thermal fatigue in concert with the elevated temperature.

Thin films of Al-l%Si were sputter deposited on Si under a variety of pressures of atmospheric impurity gases. The effect of the impurity gases (oxygen, nitrogen, and water), and deposition temperature (15° and 300° C), on the microstructure and properties of the aluminum thin films were studied. The gas pressures introduced during deposition varied from 5 × 10s−6 Torr (6.7 × 10s−4 Pa) to 1 × 10s-10 Torr (1 × 10s−8 Pa). The thin films were investigated by transmission electron microscopy and were found to have a columnar microstructure with an even distribution of silicon precipitates. Both the grain size and silicon precipitate size increased at the higher deposition temperature. A smaller grain size was found in samples that were deposited under the higher impurity gas pressures tested. The specular reflectance of the films was found to be dependent upon the amount of impurity gases present during deposition, the greater the partial pressure the greater the surface roughness. This study also investigated the possibility of using a Resistivity Ratio (RR) measurement to evaluate the grain size of the Al thin films. It has been previously observed that a small Al grain size has poor electromigration resistance. This study found that the correlation between Al grain size and RR values was good indicating that RR tests may be used as a quick, non-destructive measure of film quality.