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Bird's eye view (BEV) generation from front‐looking video stream is considered an important pre‐processing task in various computer vision applications such as driver assistance systems. In this work, hardware implementation of this process using high‐level synthesis in Simulink environment has been considered for rapid prototyping under real‐time constraints. Traditionally, researchers have employed lookup table‐based approaches to circumvent the exorbitant cost of implementing arithmetic modules associated with the perspective transformation. The hardware implementation scheme proposed here, however, demonstrates that a polynomial approximation over the limited domain of the involved operands not only saves precious hardware resources but also provides better fixed‐point precision. Synthesis results on Zynq‐7000 FPGA show that the proposed circuit reduces the block memory utilisation by 9% compared to the lookup table‐based built‐in Simulink Vision HDL block. The proposed design evaluates the results in fixed‐point format which is essential for subsequent bilinear interpolation to produce high‐fidelity output frame, albeit at the cost of 4% increase in DSP48E utilisation. The approximation error of the proposed solution is less than quarter‐pixel on average. The proposed hardware has been integrated as an IP core in a hardware‐software co‐design system. The whole framework is publicly available to facilitate practitioners and researchers. [ABSTRACT FROM AUTHOR]

Abstract Radial basis function-generated finite differences (RBF-FD) based on the combination of polyharmonic splines (PHS) with high degree polynomials have recently emerged as a powerful and robust numerical approach for the local interpolation and derivative approximation of functions over scattered node layouts. Among the key features, (i) high orders of accuracy can be achieved without the need of selecting a shape parameter or the issues related to numerical ill-conditioning, and (ii) the harmful edge effects associated to the use of high order polynomials (better known as Runge's phenomenon) can be overcome by simply increasing the stencil size for a fixed polynomial degree. The present study complements our previous results, providing an analytical insight into RBF-FD approximations augmented with polynomials. It is based on a closed-form expression for the interpolant, which reveals the mechanisms underlying these features, including the role of polynomials and RBFs in the interpolant, the approximation error, and the behavior of the cardinal functions near boundaries. Numerical examples are included for illustration. [ABSTRACT FROM AUTHOR]

A fully implementable filtered polynomial approximation on spherical shells is considered. The method proposed is a quadrature-based version of a filtered polynomial approximation. The radial direction and the angular direction of the shells are treated separately with constructive filtered polynomial approximation. The approximation error with respect to the supremum norm is shown to decay algebraically for functions in suitable differentiability classes. Numerical experiments support the results. [ABSTRACT FROM AUTHOR]

A novel technique for designing piecewise-polynomial interpolators for hardware implementation of elementary functions is investigated in this paper. In the proposed approach, the interval where the function is approximated is subdivided in equal length segments and two adjacent segments are grouped in a segment pair. Suitable constraints are then imposed between the coefficients of the two interpolating polynomials in each segment pair. This allows reducing the total number of stored coefficients. It is found that the increase in the approximation error due to constraints between polynomial coefficients can easily be overcome by increasing the fractional bits of the coefficients. Overall, compared with standard unconstrained piecewise-polynomial approximation having the same accuracy, the proposed method results in a considerable advantage in terms of the size of the lookup table needed to store polynomial coefficients. The calculus of the coefficients of constrained polynomials and the optimization of coefficients bit width is also investigated in this paper. Results for several elementary functions and target precision ranging from 12 to 42 bits are presented. The paper also presents VLSI implementation results, targeting a 90 nm CMOS technology, and using both direct and Horner architectures for constrained degree-1, degree-2, and degree-3 approximations. [ABSTRACT FROM AUTHOR]