Author: "Jesshope, C.R." / Search Limiters: Full Text and Peer Reviewed - Searchworks@Jio Institute Digital Library Search Results

Searchworks

Select search scope, currently: Articles

Catalog

books, media & more in Jio Institute collections

Articles

journal articles & other e-resources

Your search keyword '"Jesshope, C.R."' showing total 8 results

Start Over Author "Jesshope, C.R." Search Limiters Full Text Search Limiters Peer Reviewed

8 results on '"Jesshope, C.R."'

1. Implementation and evaluation of a microthread architecture

Author: Bousias, K., Guang, L., Jesshope, C.R., and Lankamp, M.
Published: 2009
Full Text: View/download PDF

2. An implementation of the SANE Virtual Processor using POSIX threads

Author: van Tol, M.W., Jesshope, C.R., Lankamp, M., and Polstra, S.
Published: 2009
Full Text: View/download PDF

3. Compilation of process algebra expressions into delay-insensitive circuits

Author: Jesshope, C.R., Nedelchev, I.M., and Huang, C.G.
Subjects: Circuit Design, Timing, Algebra, Top-Down Design, New Technique, Scientific Research
Published: 1993

4. Systematic method for synthesising purely delay-insensitive circuits

Author: Huang, C.G., Jesshope, C.R., and Nedelchev, I.M.
Subjects: Circuit Design, Theory, Mathematical Models, Synchronous, New Technique, Scientific Research
Published: 1993

5. Design of SIMD microprocessor array

Author: Jesshope, C.R., O'Gorman, R., and Stewart, J.M.
Subjects: Microprocessor, Arrays, Theoretical Approach, SIMD, Parallel Processing, Computer Design, Packet Switch, Floating-Point Arithmetic, Reconfiguration, Programmable
Published: 1989

6. Adaptive, low latency, deadlock-free packet routing for networks of processors

Author: Yantchev, J. and Jesshope, C.R.
Subjects: Packet Switch, Routing, Networks, Mathematical Models, Mathematics of Computing, Theoretical Approach, Transputers, Deadlock Avoidance, Computer Design, Processor Architecture, Throughput
Published: 1989

7. Pascal circuit compiler for UK5000.

Author: Jesshope, C.R.
Published: 1985
Full Text: View/download PDF

8. An I2L clocked gate array for undergraduate design exercises.

Author: Jesshope, C.R. and Ashburn, P.
Published: 1985
Full Text: View/download PDF

Catalog

Books, media, physical & digital resources

See catalog results