1. A 4-b 7-$\mu$ W Phase Domain ADC With Time Domain Reference Generation for Low-Power FSK/PSK Demodulation
- Author
-
Yan Zhu, Rui P. Martins, Xuewei Lei, and Chi-Hang Chan
- Subjects
Frequency-shift keying ,Computer science ,020208 electrical & electronic engineering ,02 engineering and technology ,Effective number of bits ,CMOS ,Hardware and Architecture ,Dynamic demand ,Hardware_INTEGRATEDCIRCUITS ,0202 electrical engineering, electronic engineering, information engineering ,Electronic engineering ,Baseband ,Demodulation ,Figure of merit ,Time domain ,Electrical and Electronic Engineering - Abstract
This paper presents a 4-b phase-domain analog-to-digital converter (ADC) that utilizes the time-domain reference generation scheme for low-power operation. Rather than prior arts that rely on power-hungry resistive/current combiners or the IQ-assisted binary-search algorithm with large power T&H circuits for the reference generation, this design benefits from the fully dynamic power characteristic of the time-domain operation, thus leading to an energy-efficient phase ADC design. By introducing several on-chip calibration techniques, the design achieves good robustness with the proposed time-domain operation. The prototype is fabricated in the standard 65-nm CMOS technology, achieving an ENOB of 3.42 bits at 1 MS/s with near Nyquist input, while dissipating $7~\mu \text{W}$ from a 1-V supply. It leads to a 1.36-pJ/conversion-step Walden Figure of Merit at Nyquist input (FoM@Nyquist).
- Published
- 2019