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This paper describes a four-layer-stacked chip with 45-nm dynamic random access memory (DRAM) dice and 65-nm logic controller, which are interconnected by backside-via-last through-silicon via (TSV) processes. Fabrication of backside-via-last process and multiple die stacking using chip-to-chip bonding are presented with electrical connection between TSV (5- $\mu \text{m}$ -diameter/50- $\mu \text{m}$ -length) and Cu interconnects. Excellent fabrication of stacked dice verified that the micro bumps with 12- $\mu \text{m}$ diameter are bonded using three step temperature bonding profile. Further stacked DRAM/Logic performance and system verifications are demonstrated successfully using 3-D heterogeneous integration.

During the field service of composite insulators, high temperature vulcanized (HTV) silicone rubber (SIR) material used for insulator’s sheath and sheds is gradually aging, and thus how to effectively evaluate its aging state has become an inevitable issue. In this paper, artificially corona-aged and naturally site-aged SIR materials are employed as samples, and their properties such as hydrophobicity, leakage current, trap density/energy level, surface microstructure and chemical composition are investigated for comparative study. With the increasing of corona aging intensity, the contact angle of SIR samples drops gradually and recovers more slowly. The hydrophobicity of site-aged insulators also declines, from HC1 for 2-year service to HC5 for 15-year service. The leakage current of corona-aged and site-aged samples both increase with aging, which indicates that aging induces the increase of surface conductivity of SIR material. The peak trap density of corona-aged and site-aged samples increases with the aging duration or service duration remarkably. The changes of these properties are attributed to the changes of micro-structures and compositions in the surface layer of SIR. The scanning electron microscope (SEM) and X-ray photoelectron spectroscopy (XPS) analysis results reflect that a hardened inorganic silica-like (SiO2) layer with many polar chemical groups and distributed micro-pores is formed on the surface of SIR material after corona aging. Because of this silica-like layer, the hydrophobicity decreases while surface conductivity and trap density of SIR material increases. Besides the traditional properties like hydrophobicity and surface conductivity, the trap density is expected to be a novel parameter for effective evaluation of aging state of HTV silicone rubber material.

Dielectric window is an important component of high-power microwave (HPM) devices. However, surface breakdown easily occurs at the vacuum/dielectric interface when HPM pass through the dielectric window. This greatly limits transmission of HPM and makes the window a bottle neck of HPM technology development. Secondary electron emission (SEE) from dielectric window plays an important role in its surface breakdown. This paper studies the total SEE (including true secondary electrons and backscattered electrons) coefficients of several inorganic and organic dielectric materials including polytetrafluoroethylene, polyethylene, alumina ceramic, and machinable ceramic. The measurements are implemented by using pulsed electron beam impacting the materials with energies from 200 eV to 5 keV. In addition, surface desorbed gas property is studied with the quadrupole mass spectrometer. The performances of different materials are evaluated. The obtained results are useful for the selection of HPM window materials.

Heterogeneously integrated and miniaturized neural sensing microsystems are crucial for brain function investigation. In this paper, a 2.5D heterogeneously integrated bio-sensing microsystem with $\mu$ -probes and embedded through-silicon-via (TSVs) is presented for high-density neural sensing applications. This microsystem is composed of $\mu$ -probes with embedded TSVs, 4 dies and a silicon interposer. For capturing 16-channel neural signals, a 24 $\times$ 24 $\mu$ -probe array with embedded TSVs is fabricated on a $5\times 5\ {\rm mm}^{2}$ chip and bonded on the back side of the interposer. Thus, each channel contains 6 $\times$ 6 $\mu$ -probes with embedded TSVs. Additionally, the 4 dies are bonded on the front side of the interposer and designed for biopotential acquisition, feature extraction and classification via low-power analog front-end (AFE) circuits, area-power-efficient analog-to-digital converters (ADCs), configurable discrete wavelet transforms (DWTs), filters, and a MCU. An on-interposer bus ( $\mu$ -SPI) is designed for transferring data on the interposer. Finally, the successful in-vivo test demonstrated the proposed 2.5D heterogeneously integrated bio-sensing microsystem. The overall power of this microsystem is only 676.3 $\mu{\rm W}$ for 16-channel neural sensing.

3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.