Search

Pastes based on copper (Cu) nanoparticles (NPs) are promising electronic-packaging materials for the attachment of high-power devices. However, the rapid oxidation of nanostructured Cu requires the use of reducing agents during processing, which makes it less suitable for attaching large-area dies (> 4 mm2). Recently, the functionalization of Cu-NP surfaces with a mixture of amines prevented oxidation, allowing for sintering without the need for reducing agents. Here we investigate the sintering mechanisms involved during die attachment using pastes of passivated Cu NPs, with particular focus on the critical role of the carrier solvents. Using 1-nonanol or 1-decanol as solvents, we first demonstrate the absence of Cu-oxide phases in the pastes after fabrication and the stability of the resulting nanostructured copper for as much as 30 min in air. By measuring the evolution of the electrical characteristics of the paste during drying and sintering, we show that electrically conductive agglomerates form among the NPs between 141°C and 144°C, independent of the carrier solvent used. The carrier solvent was found to affect mainly the densification temperature of the copper agglomerates. Because they lead to uniform sintering of the material, Cu pastes based on solvents with a low boiling point and high vapor pressure are preferable for attaching dies with area greater than 25 mm2. We show that dies with an area as large as 100 mm2 can be attached using a Cu paste based on 1-nonanol. These pastes enables the formation of temperature-resistant bonding for high-power devices using a simple and cost-effective approach.

Non-isothermal liquid evaporation in micro-pore structures is studied experimentally and numerically using the lattice Boltzmann method. A hybrid thermal entropic multiple-relaxation-time multiphase lattice Boltzmann model (T-EMRT-MP LBM) is implemented and validated with experiments of droplet evaporation on a heated hydrophobic substrate. Then liquid evaporation is investigated in two specific pore structures, i.e. spiral-shaped and gradient-shaped micro-pillar cavities, referred to as SMS and GMS, respectively. In SMS, the liquid receding front follows the spiral pattern; while in GMS, the receding front moves layer by layer from the pillar rows with large pitch to the rows with small one. Both simulations agree well with experiments. Moreover, evaporative cooling effects in liquid and vapour are observed and explained with simulation results. Quantitatively, in both SMS and GMS, the change of liquid mass with time coincides with experimental measurements. The evaporation rate generally decreases slightly with time mainly because of the reduction of liquid–vapour interface. Isolated liquid films in SMS increase the evaporation rate temporarily resulting in local peaks in evaporation rate. Reynolds and capillary numbers show that the liquid internal flow is laminar and that the capillary forces are dominant resulting in menisci pinned to the pillars. Similar Péclet number is found in simulations and experiments, indicating a diffusive type of heat, liquid and vapour transport. Our numerical and experimental studies indicate a method for controlling liquid evaporation paths in micro-pore structures and maintaining high evaporation rate by specific geometry designs.

BACKGROUND Research integrating multisensory home-monitoring in respiratory disease is scarce. Therefore, we created a novel multisensory home-monitoring device tailored for long-term respiratory disease management (named the CAir-Desk). We hypothesize that recent technological accomplishments can be integrated into a multisensory participant-driven platform. We also believe that this platform could improve chronic disease management and be accessible to large groups at an acceptable cost. OBJECTIVE This study aimed to report on user adherence and acceptance as well as system functionality of the CAir-Desk in a sample of participants with stable chronic obstructive pulmonary disease (COPD) or asthma. METHODS We conducted an observational usability study. Participants took part in 4 weeks of home-monitoring with the CAir-Desk. The CAir-Desk recorded data from all participants on symptom burden, physical activity, spirometry, and environmental air quality; data on sputum production, and nocturnal cough were only recorded for participants who experienced symptoms. After the study period, participants reported on their perceptions of the usability of the monitoring device through a purpose-designed questionnaire. We used descriptive statistics and visualizations to display results. RESULTS Ten participants, 5 with COPD and 5 with asthma took part in this study. They completed symptom burden questionnaires on a median of 96% (25th percentile 14%, 75th percentile 96%), spirometry recordings on 55% (20%, 94%), wrist-worn physical activity recordings on 100% (97%, 100%), arm-worn physical activity recordings on 45% (13%, 63%), nocturnal cough recordings on 34% (9%, 54%), sputum recordings on 5% (3%, 12%), and environmental air quality recordings on 100% (99%, 100%) of the study days. The participants indicated that the measurements consumed a median of 13 (10, 15) min daily, and that they preferred the wrist-worn physical activity monitor to the arm-worn physical activity monitor. CONCLUSIONS The CAir-Desk showed favorable technical performance and was well-accepted by our sample of participants with stable COPD and asthma. The obtained insights were used in a redesign of the CAir-Desk, which is currently applied in a randomized controlled trial including an interventional program.

Continuous patient monitoring is essential to achieve an effective and optimal patient treatment in the intensive care unit. In the specific case of epilepsy it is the only way to achieve a correct diagnosis and a subsequent optimal medication plan if possible. In addition to automatic vital sign monitoring, epilepsy patients need manual monitoring by trained personnel, a task that is very difficult to be performed continuously for each patient. Moreover, epileptic manifestations are highly personalized even within the same type of epilepsy. In this work we assess two machine learning methods, dictionary learning and an autoencoder based on long short-term memory (LSTM) cells, on the task of personalized epileptic event detection in videos, with a set of features that were specifically developed with an emphasis on high motion sensitivity. According to the strengths of each method we have selected different types of epilepsy, one with convulsive behaviour and one with very subtle motion. The results on five clinical patients show a highly promising ability of both methods to detect the epileptic events as anomalies deviating from the stable/normal patient status.

Drying of colloidal suspension towards the exploitation of the resultant nanoparticle deposition has been applied in different research and engineering fields. Recent experimental studies have shown that neck-based thermal structure (NTS) by colloidal nanoparticle deposition between microsize filler particle configuration (FPC) can significantly enhance vertical heat conduction in innovative three-dimensional chip stacks [Brunschwiler et al., J. Electron. Packag. 138, 041009 (2016)10.1115/1.4034927]. However, an in-depth understanding of the mechanisms of colloidal liquid drying, neck formation, and their influence on heat conduction is still lacking. In this paper, using the lattice Boltzmann method, we model neck formation in FPCs and evaluate the thermal performances of resultant NTSs. The colloidal liquid is found drying continuously from the periphery of the microstructure to its center with a decreasing drying rate. With drying, more necks of smaller size are formed between adjacent filler particles, while fewer necks of larger size are formed between filler particle and the top/bottom plate of the FPCs. The necks, forming critical throats between the filler particles, are found to improve the heat flux significantly, leading to an overall heat conduction enhancement of 2.4 times. In addition, the neck count, size, and distribution as well as the thermal performance of NTSs are found to be similar for three different FPCs at a constant filler particle volume fraction. Our simulation results on neck formation and thermal performances of NTSs are in good agreement with experimental results. This demonstrates that the current lattice Boltzmann models are accurate in modeling drying of colloidal suspension and heat conduction in microporous structures, and have high potentials to study other problems such as surface coating, salt transport, salt crystallization, and food preserving.

Nanoparticle deposition by drying of colloidal suspension in thin micro-porous architectures has attracted a lot of attention in scientific research as well as industrial applications. However, the underlying mechanisms of such three-dimensional (3D) deposition are not yet fully revealed due to the complexity of the co-occurring processes of two-phase fluid flows, phase change and mass transport. Consequently, the control of 3D nanoparticle deposition remains a challenge. We use a combined experimental and numerical approach to achieve controlled 3D nanoparticle deposition by drying of colloidal suspension in two pillar-based thin micro-porous architectures. By the design of pillar layout, rectangular-spiral and circular-spiral deposition configurations are obtained globally. By varying the surface wettability, vertically symmetric and sloped nanoparticle depositions can be achieved locally. While the numerical modeling reveals the mechanisms of liquid internal flow, as well as the impact of local drying rate on nanoparticle transport, accumulation and final deposition, the experimental results of deposition configurations validate the controlling strategies. This combined experimental and numerical work provides a framework to achieve desired 3D nanoparticle deposition in thin micro-porous architectures, with a thorough understanding of the underlying mechanisms of two-phase fluid flows, phase change and mass transport. (© Elsevier 2020)., International Journal of Heat and Mass Transfer, 158, ISSN:0017-9310, ISSN:1879-2189

BACKGROUND Chronic obstructive pulmonary disease (COPD) is one of the most common disorders in the world. COPD is characterized by airflow obstruction, which is not fully reversible. Patients usually experience breathing-related symptoms with periods of acute worsening and a substantial decrease in the health-related quality-of-life. Active and comprehensive disease management can slow down the progressive course of the disease and improve patients’ disabilities. Technological progress and digitalization of medicine have the potential to make elaborate interventions easily accessible and applicable to a broad spectrum of patients with COPD without increasing the costs of the intervention. OBJECTIVE This study aims to develop a comprehensive telemonitoring and hybrid virtual coaching solution and to investigate its effects on the health-related quality of life of patients with COPD. METHODS A monocentric, assessor-blind, two-arm (intervention/control) randomized controlled trial will be performed. Participants randomized to the control group will receive usual care and a CAir Desk (custom-built home disease-monitoring device to telemonitor disease-relevant parameters) for 12 weeks, without feedback or scores of the telemonitoring efforts and virtual coaching. Participants randomized to the intervention group will receive a CAir Desk and a hybrid digital coaching intervention for 12 weeks. As a primary outcome, we will measure the delta in the health-related quality of life, which we will assess with the St. George Respiratory Questionnaire, from baseline to week 12 (the end of the intervention). RESULTS The development of the CAir Desk and virtual coach has been completed. Recruitment to the trial started in September 2020. We expect to start data collection by December 2020 and expect it to last for approximately 18 months, as we follow a multiwave approach. We expect to complete data collection by mid-2022 and plan the dissemination of the results subsequently. CONCLUSIONS To our knowledge, this is the first study investigating a combination of telemonitoring and hybrid virtual coaching in patients with COPD. We will investigate the effectiveness, efficacy, and usability of the proposed intervention and provide evidence to further develop app-based and chatbot-based disease monitoring and interventions in COPD. CLINICALTRIAL ClinicalTrials.gov identifier: NCT04373070; https://clinicaltrials.gov/ct2/show/NCT04373070 INTERNATIONAL REGISTERED REPORT DERR1-10.2196/20412

Background: Chronic obstructive pulmonary disease (COPD) is one of the most common disorders in the world. COPD is characterized by airflow obstruction, which is not fully reversible. Patients usually experience breathing-related symptoms with periods of acute worsening and a substantial decrease in the health-related quality-of-life. Active and comprehensive disease management can slow down the progressive course of the disease and improve patients’ disabilities. Technological progress and digitalization of medicine have the potential to make elaborate interventions easily accessible and applicable to a broad spectrum of patients with COPD without increasing the costs of the intervention. Objective: This study aims to develop a comprehensive telemonitoring and hybrid virtual coaching solution and to investigate its effects on the health-related quality of life of patients with COPD. Methods: A monocentric, assessor-blind, two-arm (intervention/control) randomized controlled trial will be performed. Participants randomized to the control group will receive usual care and a CAir Desk (custom-built home disease-monitoring device to telemonitor disease-relevant parameters) for 12 weeks, without feedback or scores of the telemonitoring efforts and virtual coaching. Participants randomized to the intervention group will receive a CAir Desk and a hybrid digital coaching intervention for 12 weeks. As a primary outcome, we will measure the delta in the health-related quality of life, which we will assess with the St. George Respiratory Questionnaire, from baseline to week 12 (the end of the intervention). Results: The development of the CAir Desk and virtual coach has been completed. Recruitment to the trial started in September 2020. We expect to start data collection by December 2020 and expect it to last for approximately 18 months, as we follow a multiwave approach. We expect to complete data collection by mid-2022 and plan the dissemination of the results subsequently. Conclusions: To our knowledge, this is the first study investigating a combination of telemonitoring and hybrid virtual coaching in patients with COPD. We will investigate the effectiveness, efficacy, and usability of the proposed intervention and provide evidence to further develop app-based and chatbot-based disease monitoring and interventions in COPD. © 2020 JMIR Publications. All rights reserved., JMIR Research Protocols, 9 (10), ISSN:1929-0748

Integrated Voltage Regulators (IVRs) are attractive substitutes for conventional voltage regulators located on the motherboards, due to outstanding dynamic performances and superior power densities. IVRs operate with switching frequencies in the range of 100 MHz and are assembled in highly compact packages close to the microprocessor load. This paper presents a comprehensive characterization of a PCB and inductor-based four-phase ANPC-type IVR that uses a Power Management IC (PMIC) implemented in a 14 nm CMOS technology node. The characterization is based on the results of electrical measurements, thermal inspections of the chip surface, and simulations, which enables the separation of the total losses into on-chip and off-chip loss components and the allocation of important loss components inside the chip. The investigated IVR achieves a maximum efficiency of 84.1% at an output power of P out = 640 mW and a switching frequency of f s = 50 MHz. The thermal measurements reveal that the maximum efficiency of the PMIC itself is between 88 % and 90 % at f s = 50 MHz and P out ∈ [500 mW, 600 mW]; at P out = 890 mW, a chip current density of 24.7 A/mm 2 is achieved. The findings in particular point out that the losses in the chip-internal interconnections, i.e., the conductors of the Power Distribution Network (PDN) and the twelve stacked metal layers below the PDN, have a substantial contribution to the total losses. Furthermore, the combination of Cadence post-layout simulations with impedance networks obtained from an appropriate software tool, e.g., FastHenry, is found to establish a suitable toolbox for estimating losses in IVRs., IEEE Open Journal of Power Electronics, 1, ISSN:2644-1314

Federated Learning enables training of a general model through edge devices without sending raw data to the cloud. Hence, this approach is attractive for digital health applications, where data is sourced through edge devices and users care about privacy. Here, we report on the feasibility to train deep neural networks on the Raspberry Pi4s as edge devices. A CNN, a LSTM and a MLP were successfully trained on the MNIST data-set. Further, federated learning is demonstrated experimentally on IID and non-IID samples in a parametric study, to benchmark the model convergence. The weight updates from the workers are shared with the cloud to train the general model through federated learning. With the CNN and the non-IID samples a test-accuracy of up to 85% could be achieved within a training time of 2 minutes, while exchanging less than $10$ MB data per device. In addition, we discuss federated learning from an use-case standpoint, elaborating on privacy risks and labeling requirements for the application of emotion detection from sound. Based on the experimental findings, we discuss possible research directions to improve model and system performance. Finally, we provide best practices for a practitioner, considering the implementation of federated learning., Accepted in ACM AIChallengeIoT 2019, New York, USA

This paper introduces technical solutions devised to support the Deployment Site - Regione Emilia Romagna (DS-RER) of the ACTIVAGE project. The ACTIVAGE project aims at promoting IoT (Internet of Things)-based solutions for Active and Healthy ageing. DS-RER focuses on improving continuity of care for older adults (65+) suffering from aftereffects of a stroke event. A Wireless Sensor Kit based on Wi-Fi connectivity was suitably engineered and realized to monitor behavioral aspects, possibly relevant to health and wellbeing assessment. This includes bed/rests patterns, toilet usage, room presence and many others. Besides hardware design and validation, cloud-based analytics services are introduced, suitable for automatic extraction of relevant information (trends and anomalies) from raw sensor data streams. The approach is general and applicable to a wider range of use cases, however, for readability&rsquo, s sake, two simple cases are analyzed, related to bed and toilet usage patterns. In particular, a regression framework is introduced, suitable for detecting trends (long and short-term) and labeling anomalies. A methodology for assessing multi-modal daily behavioral profiles is introduced, based on unsupervised clustering techniques. The proposed framework has been successfully deployed at several real-users&rsquo, homes, allowing for its functional validation. Clinical effectiveness will be assessed instead through a Randomized Control Trial study, currently being carried out.

A tricoupled hybrid lattice Boltzmann model (LBM) is developed to simulate colloidal liquid evaporation and colloidal particle deposition during the nonisothermal drying of colloidal suspensions in micropore structures. An entropic multiple-relaxation-time multirange pseudopotential two-phase LBM for isothermal interfacial flow is first coupled to an extended temperature equation for simulating nonisothermal liquid drying. Then the coupled model is further coupled with a modified convection diffusion equation to consider the nonisothermal drying of colloidal suspensions. Two drying examples are considered. First, drying of colloidal suspensions in a two-pillar micropore structure is simulated in two dimensions (2D), and the final configuration of colloidal particles is compared with the experimental one. Good agreement is observed. Second, at the temperature of 343.15 K ($70{\phantom{\rule{0.16em}{0ex}}}^{\ensuremath{\circ}}\mathrm{C}$), drying of colloidal suspensions in a complex spiral-shaped micropore structure containing 220 pillars is simulated (also in 2D). The drying pattern follows the designed spiral shape due to capillary pumping, i.e., transport of the liquid from larger pores to smaller ones by capillary pressure difference. Since the colloidal particles are passively carried with liquid, they accumulate at the small menisci as drying proceeds. As liquid evaporates at the small menisci, colloidal particles are deposited, eventually forming solid structures between the pillars (primarily), and at the base of the pillars (secondarily). As a result, the particle deposition conforms to the spiral route. Qualitatively, the simulated liquid and particle configurations agree well with the experimental ones during the entire drying process. Quantitatively, the model demonstrates that the evaporation rate and the particle accumulation rate slowly decrease during drying, similar to what is seen in the experimental results, which is due to the reduction of the liquid-vapor interfacial area. In conclusion, the hybrid model shows the capability and accuracy for simulating nonisothermal drying of colloidal suspensions in a complex micropore structure both qualitatively and quantitatively, as it includes all the required physics and captures all the complex features observed experimentally. Such a tricoupled LBM has a high potential to become an efficient numerical tool for further investigation of real and complex engineering problems incorporating drying of colloidal suspensions in porous media.

Thermal management is one of the major challenges facing the development of three-dimensional (3D) chip stacks. Recently, experimental studies have shown that neck-based thermal structure (NTS) between chip layers formed by drying of colloidal suspension in cavity filled with micro-size particles can improve the vertical heat conduction threefold. However, a deep understanding of the mechanisms of neck formation and its influence on heat conduction is still lacking. In this paper, we numerically study the effects of three parameters, i.e., initial nanoparticle concentration, drying temperature and chip surface wettability on neck formation between filler particles and on the resulting heat conduction of the NTS. With increasing nanoparticle concentration, the size and number of necks increase, resulting in an increased effective thermal conductivity (ETC) of NTS. The drying temperature is found to have only little influence on the ETC of resultant NTS, while the neck size and spatial distribution become more uniform at higher drying temperature. When reducing the wettability of the top and bottom surfaces of the cavity, the necks shrink in size until completing evacuating at the top and bottom layers, while the size of the necks between filler particles in the middle height of the cavity expands slowly. In consequence, the ETC of NTS drops at an increasing rate. Being able to reveal the underlying multiple mechanisms of two-phase flow, phase change and heat transport, the current numerical study suggests optimal values for the deposition process, with initial nanoparticle concentration over 0.8%, a drying temperature of 60°C and a uniform contact angle of 30° for practical production of NTS.

The shift to multicore microprocessor architecture is likely to result in higher coolant flow requirements and thus exacerbate the problem of increasing data center energy consumption, also with respect to hotspot elimination. We present and experimentally prove a novel concept, for embedded, hotspot-targeted and energy efficient cooling of heterogeneous chip power landscapes. The rationally distributed, embedded microstructures presented here are able to adapt the heat transfer capability to a steady but non-uniform chip power map by passively throttling the flow in low heat flux areas. For the industrially acceptable limit on pressure drop of approximately 0.4 bar, the hotspot-targeted embedded liquid cooling (HT-ELC) designs are evaluated against a conservatively chosen conventional embedded liquid cooling (C-ELC) design and existing heat sinks in the literature. For an average steady-state heat flux of 150 W/cm 2 in core areas (hotspots) and 20 W/cm 2 over the remaining chip area (background), the chip temperature variation is reduced from 10 °C under the conventional cooling to 4 °C under the current hotspot targeted heat sink – a reduction of 57%. For heat fluxes of 300 and 24 W/cm 2 , the temperature variation is reduced by 30%. We show that the HT-ELC designs consume less than 0.3% of total chip power as pumping power to achieve this thermal performance, which the C-ELC design cannot match under all feasible levels of pumping power. Moreover, the HT-ELC designs achieve at least 70% improvement over the existing hotspot targeted heat sinks in terms of normalized chip temperature non-uniformity, without the need for any additional system level complexity, reducing reliability risks.

Large data centers today already account for nearly 1.31% of total electricity consumption with cooling responsible for roughly 33% of that energy consumption. This energy intensive cooling problem is exacerbated by the presence of hotspots in multicore microprocessors due to excess coolant flow requirement for thermal management. Here we present a novel liquid-cooling concept, for targeted, energy efficient cooling of hotspots through passively optimized microchannel structures etched into the backside of a chip (embedded liquid cooling or ELC architecture). We adopt an experimentally validated and computationally efficient modeling approach to predict the performance of our hotspot-targeted ELC design. The design is optimized for exemplar non-uniform chip power maps using Response Surface Methodology (RSM). For industrially acceptable limits of approximately 0.4 bar (40 kPa) on pressure drop and one percent of total chip power on pumping power, the optimized designs are computationally evaluated against a base, standard ELC design with uniform channel widths and uniform flow distribution. For an average steady-state heat flux of 150 W/cm 2

The cooling of three-dimensional electronic chip assemblies (stacks) is one of the most serious challenges facing the electronics industry as it moves toward fabrication approaches combining speed with energy efficiency. Here we show that by generating vortical microscale flows taking advantage of the inherent presence of Through Silicon Vias (TSV) in 3D integrated liquid (water) cooling of chip stacks, both large heat transfer enhancement as well as significantly better temperature uniformity can be accomplished. The approach is demonstrated experimentally in heat sinks consisting of a microcavity confining micropin fin arrays, mimicking TSV. Flow fluctuations and vortex shedding were triggered at specific Reynolds numbers, which are functions of the pin geometries and level of confinement. The resulting heat transfer enhancement due to the vortex-induced fluctuations and mixing, yields local Nusselt number increases up to 230% thereby reducing the chip temperature non-uniformity almost by a factor of three. The vortex shedding also induces a pressure drop increase. Remarkably, the effective improvement in the thermal performance due to vortex shedding, even after factoring in the rise in pumping power, reaches a peak value of 190%. Analysis of instantaneous liquid temperature signatures of shed microvortices using micron-resolution laser-induced fluorescence (μLIF), proved them to be the reason for both the elimination of liquid hotspots and the exceptional augmentation in heat transfer. These findings have important implications in the design of the new generation of integrated, out of plane electronics cooling with liquids.

We present in this paper a fundamental hydrothermal investigation of the next generation interlayer integrated water cooled three-dimensional (3D) chip stacks, with high volumetric heat generation. Such investigation of flow through microcavities with embedded heat transfer structures such as micro pin-fin arrays and microchannels is crucial for the successful realization of 3D chip stacks. We focus mainly on the complex physics of the entrance region of the cooling microcavities in order to assess its importance. The flow and heat transfer in the entrance region is strongly influenced by developing boundary layers and, as we show herein, the development lengths can occupy a significant portion of the microcavity due to the size restrictions of the 3D chip stack. These effects make a fundamental understanding of conjugate heat transfer in microcavities with heat transfer structures a necessity. The flow field and heat transfer in the entrance region are characterized by means of correlations determining the effective coolant permeability as well as the heat transfer coefficient as a function of the streamwise coordinate x, the flow Reynolds number (Re) and the Prandtl number. Based on a thermal non-equilibrium porous medium model relying on these results, a substantially improved estimation of pressure drop and temperature distribution inside the chip stack is realized. The modeling results are validated against measurements on a 3D chip stack simulator. The range of flow rates and thermal loads in the hot spots of the chip stack, over which it is crucial to consider the developing hydrothermal effects, are analyzed and discussed in detail. Moreover, microchannel and micro pin-fin structures are compared, showing more than 20% increased performance of the latter for all operating conditions investigated.

3-D stacked systems reduce communication delay in multiprocessor system-on-chips (MPSoCs) and enable heterogeneous integration of cores, memories, sensors, and RF devices. However, vertical integration of layers exacerbates temperature-induced problems such as reliability degradation. Liquid cooling is a highly efficient solution to overcome the accelerated thermal problems in 3-D architectures; however, it brings new challenges in modeling and run-time management for such 3-D MPSoCs with multitier liquid cooling. This paper proposes a novel design-time/run-time thermal management strategy. The design-time phase involves a rigorous thermal impact analysis of various thermal control variables. We then utilize this analysis to design a run-time fuzzy controller for improving energy efficiency in 3-D MPSoCs through liquid cooling management and dynamic voltage and frequency scaling (DVFS). The fuzzy controller adjusts the liquid flow rate dynamically to match the cooling demand of the chip for preventing overcooling and for maintaining a stable thermal profile. The DVFS decisions increase chip-level energy savings and help balance the temperature across the system. Our controller is used in conjunction with temperature-aware load balancing and dynamic power management strategies. Experimental results on 2-tier and 4-tier 3-D MPSoCs show that our strategy prevents the system from exceeding the given threshold temperature. At the same time, we reduce cooling energy by up to 63% and system-level energy by up to 21% in comparison to statically setting a flow rate setting to handle worst-case temperatures.

Microchannel cold plates enjoy increasing interest in liquid cooling of high-performance computing systems. Fast and reliable design tools are required to comply with the fluid mechanics and thermal specifications of such complex devices. In this paper, a methodology accounting for the local as well as the device length scales of the involved physics is introduced and applied to determine the performance of a microchannel cooler. A unit cell of the heat transfer microchannel system is modeled and implemented in conjugate CFD simulations. The fluidic and thermal characteristics of three different cold plate mesh designs are evaluated. Periodic boundary conditions and an iteration procedure are used to reach developed flow and thermal conditions. Subsequently, two network-like models are introduced to predict the overall pressure drop and thermal resistance of the device based on the results of the unit cell evaluations. Finally, the performance figures from the model predictions are compared to experimental data. We illustrate the cooling potential for different channel mesh porosities and compare it to the required pumping power. The agreement between simulations and experiments is within 2%. It was found that for a typical flow rate of 250 ml/min, the thermal resistance of the finest microchannel network examined is reduced by 7% and the heat transfer coefficient is increased by 25% compared to the coarsest channel network. On the other hand, an increase in pressure drop by 100% in the case of densest channel network was found.

Microfluidics and Nanofluidics, 15 (2), ISSN:1613-4982, ISSN:1613-4990

Experiments in Fluids, 51 (3), ISSN:0723-4864, ISSN:1432-1114

New tendencies envisage 3D Multi-Processor System-On-Chip (MPSoC) design as a promising solution to keep increasing the performance of the next-generation high-performance computing (HPC) systems. However, as the power density of HPC systems increases with the arrival of 3D MPSoCs, supplying electrical power to the computing equipment and constantly removing the generated heat is rapidly becoming the dominant cost in any HPC facility. Thus, both power and thermal/cooling implications play a major role in the design of new HPC systems, given the energy constraints in our society. Therefore, EPFL, IBM and ETHZ have been working within the CMOSAIC Nano-Tera.ch program project in the last three years on the development of a holistic thermally-aware design. This paper presents the exploration in CMOSAIC of novel cooling technologies, as well as suitable thermal modeling and system-level design methods, which are all necessary to develop 3D MPSoCs with inter-tier liquid cooling systems. As a result, we develop energy-efficient run-time thermal control strategies to achieve energy-efficient cooling mechanisms to compress almost 1 Tera nano-sized functional units into one cubic centimeter with a 10 to 100 fold higher connectivity than otherwise possible. The proposed thermally-aware design paradigm includes exploring the synergies of hardware-, software- and mechanical-based thermal control techniques as a fundamental step to design 3D MPSoCs for HPC systems. More precisely, we target the use of inter-tier coolants ranging from liquid water and two-phase refrigerants to novel engineered environmentally friendly nano-fluids, as well as using specifically designed micro-channel arrangements, in combination with the use of dynamic thermal management at system-level to tune the flow rate of the coolant in each micro-channel to achieve thermally-balanced 3D-ICs. Our management strategy prevents the system from surpassing the given threshold temperature while achieving up to 67% reduction in cooling energy and up to 30% reduction in system-level energy in comparison to setting the flow rate at the maximum value to handle the worst-case temperature.

This paper analyzes a transient method for the characterization of low-resistance thermal interfaces of microelectronic packages. The transient method can yield additional information about the package not available with traditional static methods at the cost of greater numerical complexity, hardware requirements, and sensitivity to noise. While the method is established for package-level thermal analysis of mounted and assembled parts, its ability to measure the relatively minor thermal impedance of thin thermal interface material (TIM) layers has not yet been fully studied. We combine the transient thermal test with displacement measurements of the bond line thickness to fully characterize the interface., Comment: Submitted on behalf of TIMA Editions (http://irevues.inist.fr/tima-editions)

We address integration density in future computers based on packaging and architectural concepts of the human brain: a dense 3-D architecture for interconnects, fluid cooling, and power delivery of energetic chemical compounds transported in the same fluid with little power needed for pumping. Several efforts have demonstrated that by vertical integration, memory proximity and bandwidth are improved using efficient communication with low-complexity 2-D arrays. However, power delivery and cooling do not allow integration of multiple layers with dense logic elements. Interlayer cooled 3-D chip stacks solve the cooling bottlenecks, thereby allowing stacking of several such stacks, but are still limited by power delivery and communication. Electrochemical power delivery eliminates the electrical power supply network, freeing valuable space for communication, and allows scaling of chip stacks to larger systems beyond exascale device count and performance. We find that historical efficiency trends are related to density and that current transistors are small enough for zetascale systems once communication and supply networks are simultaneously optimized. We infer that biological efficiencies for information processing can be reached by 2060 with ultracompact space-filled systems that make use of brain-inspired packaging and allometric scaling laws.

We have tested hot water data center cooling by directly reusing the generated thermal energy in neighborhood heating systems. First, we introduce high-performance liquid cooling devices with minimal thermal resistance in order to cool a computer system board. This cooling is performed with water at a temperature as high as 608C, thereby eliminating the chillers and their electrical power consumption, and enabling direct reuse of the heat. We collect 85% of the board heat using microscale liquid coolers for CPUs (central processing units), interfaces, and dc (direct current) converters. With our concept, data centers can be cooled in all climate zones throughout the year without a pre-cooled heat carrier. Second, we analyze how the supply of heat and financial payback from customers reduce the total cost of ownership. With 5,000 district heating systems satisfying 9.7% of the thermal demand of Europe, ample opportunities exist for data centers to become heat providers, thereby reducing the associated carbon dioxide emission. Finally, we show how our concept can be developed within 5 years into a zero-emission data center and that such investments are economically viable and ecologically beneficial given increasing energy prices. With such data centers, the IT (information technology) industry can assume a key role in greatly reducing carbon dioxide emissions and global warming by replacing energy-intensive processes with more efficient, digitally assisted processes.

An infrared detector in standard SOI technology is proposed that comprises an antenna-coupled bolometer and a MOSFET as a sensor. As proof of concept, a logarithmic planar antenna was designed and implemented in 90 nm bulk CMOS technology and connected to the proposed detector. Measurements at 10 m wavelength confirm the feasibility of this approach.

Interlayer cooling is the only heat removal concept which scales with the number of active tiers in a vertically integrated chip stack. In this work, we numerically and experimentally characterize the performance of a three tier chip stack with a footprint of 1cm2. The implementation of 100μm pitch area array interconnect compatible heat transfer structures results in a maximal junction temperature increase of 54.7K at 1bar pressure drop with water as coolant for 250W/cm2 hot-spot and 50W/cm2 background heat flux. The total power removed was 390W which corresponds to a 3.9kW/cm3 volumetric heat flow. An efficient multi-scale modeling approach is proposed to predict the temperature response in the complete chip stack. The experimental validation confirmed an accuracy of +/- 10%. Detailed sub-domain modeling with parameter extraction is the base for the system level porous-media calculations with thermal field-coupling between solid – fluid and solid – solid interfaces. Furthermore, the strength and weakness of microchannel and pin fin heat transfer geometries in 2-port and 4-port fluid architectures is identified. Microchannels efficiently mitigate hot spots by distributing the dissipated heat to multiple cavities due to their low porosity. Pin fins with improved permeability and convective heat dissipation are advantageous at small power map contrast and aligned hot spots on the different tiers. Large stacks of 4cm2 can be cooled sufficiently by the 4-port fluid delivery architecture. The flow rate is improved four times compared to the 2-port fluid manifold. The non-uniformity of the flow in case of the 4-port demands a more careful floor- planning with hot spots placed in the chip stack corners. This is especially true in case of communicating heat transfer geometries such as pin fin structures with zero fluid velocity in the stack center. This large velocity contrast can be reduced by the implementation of non- communicating microchannels.

Liquid-cooling using microchannel heat sinks etched on silicon dies is seen as a promising solution to the rising heat fluxes in two-dimensional and stacked three-dimensional integrated circuits. Development of such devices requires accurate and fast thermal simulators suitable for early-stage design. To this end, we present 3D-ICE, a compact transient thermal model (CTTM), for liquid-cooled ICs. 3D-ICE was first advanced incorporating the 4-resistor model-based CTTM (4RM-based CTTM). Later, it was enhanced to speed up simulations and to include complex heat sink geometries such as pin fins using the new 2 resistor model (2RM-based CTTM). In this paper, we extend the 3D-ICE model to include liquid-cooled ICs with multi-port cavities, i.e., cavities with more than one inlet and one outlet ports, and non-straight microchannels. Simulation studies using a realistic 3D multiprocessor system-on-chip (MPSoC) with a 4-port microchannel cavity highlight the impact of using 4-port cavity on temperature and also demonstrate the superior performance of 2RM-based CTTM compared to 4RM-based CTTM. We also present an extensive review of existing literature and the derivation of the 3D-ICE model, creating a comprehensive study of liquid-cooled ICs and their thermal simulation from the perspective of computer systems design. Finally, the accuracy of 3D-ICE has been evaluated against measurements from a real liquid-cooled 3D-IC, which is the first such validation of a simulator of this genre. Results show strong agreement (average error ${\bf \lt 10\%}$ ), demonstrating that 3D-ICE is an effective tool for early-stage thermal-aware design of liquid-cooled 2D-/3D-ICs.

Three-dimensional (3D) stacking of integrated-circuit (IC) dies by vertical integration increases system density and package functionality. The vertical integration of IC dies by area-array Through-Silicon-Vias (TSVs) reduces the length of global interconnects and accordingly the signal delay time. On the other hand, the ongoing miniaturization trend of ICs results in constantly increasing chip-level power densities. Thus, the development of new chip cooling concepts is of utmost importance. Therefore, scalable cooling solutions for chip stacks, such as interlayer cooling, need to be investigated. This paper presents a new concept for the integration of intra chip stack fluidic cooling, namely die-embedded microchannels for single- and two-phase thermal management, using a patterned thin-layer eutectic solder bonding technique for the stack assembly. Results showed the successful fabrication of 5-layer chip stacks with embedded microchannels and high aspect ratio TSVs. Optical inspections demonstrated the proper bond line formation and direct current (DC) daisy-chain electrical tests indicated the successful combination of TSVs with thin-layer solder interconnects. Mechanical shear tests on die-on-die bonded samples showed the strength of the patterned thin-layer solder bond (16MPa). An added solder ring-pad component to seal the electrically active pad from any conductive liquid coolant was also investigated and reflow tests on such geometries showed the appearance of a balling effect along the solder ring line. This balling was found to be mitigated when the ring aspect ratio (deposited solder height to ring width ratio) was kept below the experimentally observed critical value of 0.65.