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3. The Quantum Cost Optimized Design of 2:4 Decoder Using the New Reversible Logic Block

Author

Maity Heranmoy, Pal Anita, Biswas Arindam, and K. Bhattacharjee Arup

Subjects
010302 applied physics, Logic block, business.industry, Computer science, 0103 physical sciences, 02 engineering and technology, Building and Construction, Quantum cost, 021001 nanoscience & nanotechnology, 0210 nano-technology, business, 01 natural sciences, Computer hardware
Abstract

Aim and Objective: This paper presents the quantum cost, garbage output, constant input and number of reversible gate optimized 2:4 decoder using 4×4 new reversible logic gate which is named as reversible decoder block or RD block. Method: The proposed block is implemented with a quantum circuit and quantum cost of the proposed RD block is 8. The proposed decoder can be designed using only one new proposed block. Results and Conclusion: The quantum cost, garbage output, constant input and gate number of the proposed 2:4 decoder is 9, 0, 2 and 1 which is better w.r.t previously reported work. The improvement % of quantum cost, garbage output, constant input and number of gates are 12.5 – 77.148 %, 100 %, 33.33 – 75 % and 0 – 85.71%.

Published
2020

5. Design of Reversible Combinational Circuits Using New Reversible Logic Gate.

Author

Maity, Heranmoy, Biswas, Arindam, Bhattacharjee, Anup Kumar, and Pal, Anita

Subjects
*COMBINATIONAL circuits, *LOGIC circuits, *COMPARATOR circuits, *QUANTUM computing, *CODE converters, *NAND gates, *GARBAGE collection (Computer science), *ELECTRONIC circuit design
Abstract

In this paper the authors have proposed a new 3x3 reversible gate and also proposed the reversible combinational logic circuits with better optimized quantum cost, garbage outputs and delay. The proposed new reversible logic gate is used to design of reversible 1-bit comparator circuit and realization of different logic functions such as NOT, AND, NAND, OR, NOR, XOR, NXOR. The proposed new reversible logic gate is represented by quantum implementation. The quantum cost of proposed gate is 4. The quantum cost, garbage output and delay of proposed reversible 1-bit comparator circuit are 6 which is better w. r. t. previously reported results. [ABSTRACT FROM AUTHOR]

Published
2018
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