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Abstract Electrical and material properties of plasma‐enhanced atomic layer deposited (PE‐ALD) AlON on dry‐etched n‐type GaN substrates are investigated for nitrogen concentration ranging from 1.5% to 7.1%. Firstly, an increase in flat‐band voltage (VFB) and its hysteresis with increasing nitrogen concentration is reported. The increase in VFB is associated with the nitrogen content whereas the increase in hysteresis to the presence of impurities (hydroxyl groups and carbon‐related impurities). Alongside the nitrogen concentration, the impact of different post‐deposition annealing (PDA) temperatures is studied (400–800 °C). Stable AlON layers and interfaces with etched GaN substrates are reported with slight gallium oxide growth or gallium diffusion towards the dielectric layer. Finally, with increasing PDA temperature, an increase in VFB and a significant reduction of both VFB hysteresis and interface state density (Dit) are observed, notably at the measuring temperature of 150 °C. These results present a promising pathway toward more reliable and stable normally‐OFF GaN‐based MOS‐channel high electron mobility transistors (MOSc‐HEMTs).

Plasma etching treatments are important steps in GaN-based devices fabrication, but can create defects on GaN surfaces. These surface defects can strongly alter device performances. The main objective of this work is to characterize the impact of different plasma etching recipes using an innovative electrochemical short loop based on Mott-Schottky (MS) method. The effect of defects has been studied in terms of Fermi Level pinning. Barrier height has been identified as a relevant criteria to describe surface damage induced by plasma treatment. Probing Conventional LETI plasma etching process with the Mott-Schottky method demonstrates a good reproducibility of the electrochemical data and confirms the reliability of the developed method. Various electrochemical tests conducted on 3 plasmas recipes demonstrated that: 1) the RIE etching is damaging, 2) the optimized RIE (Steady A) is less damaging than the other RIE (Steady B) and 3) the RIE associated with ALE process shows the least damaging plasma recipe, as expected.

Homogeneous AlOxNy thin films with a controlled nitrogen composition, up to 7.1%, were grown on GaN substrate using plasma-enhanced atomic layer deposition. This was achieved through repeated cycles consisting of AlN thin layers deposition and subsequent in situ O2 plasma oxidation under optimized conditions. We demonstrate that the nitrogen concentration in AlOxNy films can be finely tuned from 1.5% to 7.1% by a precise control of the AlN thin film thickness from 0.25 to 0.96 nm before each oxidation step. It is shown also that higher AlN thickness, ≥1.96 nm, leads to an incomplete plasma oxidation of AlN films, resulting in the formation of AlOxNy/AlN-like structures. Several structural and physic-chemical characterizations, including focused ion beam-scanning transmission electron microscopy, Auger electron spectroscopy, XPS, and time-of-flight secondary ion mass spectrometry were performed to confirm these findings. These results highlight the importance of this approach for growing homogeneous AlOxNy thin films with controlled nitrogen doping, which can be used as dielectrics in gate stacks for high performance GaN-based transistors.

For high electron mobility transistors (HEMTs) power transistors based on AlGaN/GaN heterojunction, p-GaN gate has been the gate topology commonly used to deplete the two dimensional electron gas (2-DEG) and achieve a normally-OFF behavior. But fully recessed MIS gate GaN power transistors or MOSc-HEMTs have gained interest as normally-OFF HEMTs thanks to the wider voltage swing and reduced gate leakage current when compared to p-GaN gate HEMTs. However the mandatory AlGaN barrier etching to deplete the 2-DEG combined with the nature of the dielectric/GaN interface generates etching-related defects, traps, and roughness. As a consequence, the threshold voltage (VTH) can be unstable, and the electron mobility is reduced, which presents a challenge for the integration of a fully recessed MIS gate. Recent developments have been studied to solve this challenge. In this paper, we discuss developments in gate recess with low impact etching and atomic layer etching (ALE) alongside surface treatments such as wet cleaning, thermal or plasma treatment, all in the scope of having a surface close to pristine. Finally, different interfacial layers, such as AlN, and alternative dielectrics investigated to optimize the dielectric/GaN interface are presented.