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Dielectric REduced SURface Field (RESURF) is a promising concept to enhance the breakdown voltage of power semiconductor devices. This letter reports a set of simple and unified analytical equations to calculate the breakdown voltage, critical electric field, and depletion widths for dielectric RESURF p-n junctions. These analytical models are derived from the basic power law relationship between the p-n junction breakdown voltage and doping concentration, and use the material and structural information of the dielectric RESURF p-n junction as variables to accurately predict reverse bias performance. The analytically calculated results are compared with 2D TCAD simulation results for Si, GaN, and SiC in combination with dielectrics, such as SiO2 and Si3N4, and show reasonable agreement well within 10% of error.

A comprehensive description of a procedure to form dense locally ordered 2D arrays of vertically aligned hexagonal in section GaN nanocolumns (NCs) without height deviations will be presented. Particular focus will be given for the preparation of silica nanosphere hard masks, dry etching to form GaN NCs, wet etching to modify NC shape, thermal annealing and regrowth to recover non-polar m-plane facets, improve NC crystal quality and array fill factor.

DC circuit protection applications provide a unique market opportunity for wide-bandgap (WBG) semiconductors, which are outside the conventional focus on power electronic converters. This paper presents an overview of emerging dc power systems, the needs for dc solid-state circuit breakers (SSCBs), and the benefits and advantages of various WBG SSCB concepts. Furthermore, a new class of self-powered SSCBs based on SiC or GaN normally-ON switching devices is proposed in this paper. One implementation of the SSCB concept based on a 1200 V SiC JFET experimentally demonstrated turn-off of a fault current of 125 A at a dc voltage of 400 V within $1~\mu $ s without requiring any external power supply. The SSCB detects short-circuit faults by sensing its drain–source voltage rise and draws power from the fault condition to turn off the SiC JFET. Various implementations of the SSCB concept for unipolar and bipolar capability using both SiC and GaN are also discussed from both device and circuit perspectives. It is concluded that very low ON-resistance normally-ON WBG switching devices are excellent candidates for the emerging SSCB applications.

A new concept of vertical gallium nitride (GaN) Schottky barrier diode based on nanowire (NW) structures and the principle of dielectric REduced SURface Field (RESURF) is proposed in this paper. High-threading dislocation density in GaN epitaxy grown on foreign substrates has hindered the development and commercialization of vertical GaN power devices. The proposed NW structure, previously explored for LEDs offers an opportunity to reduce defect density and fabricate low cost vertical GaN power devices on silicon (Si) substrates. In this paper, we investigate the static characteristics of high-voltage GaN NW Schottky diodes using 3-D TCAD device simulation. The NW architecture theoretically achieves blocking voltages upward of 700 V with very low specific on-resistance. Two different methods of device fabrication are discussed. Preliminary experimental results are reported on device samples fabricated using one of the proposed methods. The fabricated Schottky diodes exhibit a breakdown voltage of around 100 V and no signs of current collapse. Although more work is needed to further explore the nano-GaN concept, the preliminary results indicate that superior tradeoff between the breakdown voltage and specific on-resistance can be achieved, all on a vertical architecture and a foreign substrate. The proposed NW approach has the potential to deliver low cost reliable GaN power devices, circumventing the limitations of today's high electron mobility transistors (HEMTs) technology and vertical GaN on GaN devices.

A Nanostructured GaN Device Architecture for Power Applications Z. John Shen, Gourab Sabui, Vitaly Z. Zubialevich, Mary White, Pietro Pampili, Peter J. Parbrook, Mathew McLaren, Miryam Arredondo-Arechavala Gallium nitride (GaN) has emerged as a promising material for development of power semiconductor devices owing to its high critical electric field, large bandgap and superior transport properties. The unique properties of GaN have prompted realization of power devices both in a lateral (high electron mobility transistors (HEMTs)) and a vertical layout (bulk GaN on GaN devices). GaN power devices show extremely low conduction and switching losses and holds the key to extremely low-loss and high-efficiency power converters of the future. However, GaN power devices have been plagued with several inherent drawbacks preventing a ubiquitous adoption of GaN as the material of choice for power switches. The most critical trade-off has been the choice of substrate for the growth of GaN epitaxy: a high performance, high-cost native substrate against a low-cost, non-native substrate with associated reliability issues. For GaN to thrive as a superior successor to Si, a low cost, high performance epitaxy with improved reliability is expected moving forward. Current lateral HEMTs and vertical GaN on GaN devices are inadequate to address this trade-off. A novel nanostructured approach to GaN power devices is proposed in this paper. The unique property of GaN nanowires is its ability to elastically relax in the lateral direction, and accommodate lattice mismatch with non-native substrate through pseudomorphic growth without dislocation formation as compared to thin-film heterostructures. Experimental studies have shown self-induced GaN NWs grown with a high surface to volume ratio on a Si substrate have a non-polar side face and is virtually free of threading dislocations and other structural defects. Power devices grown on a nano-GaN epitaxy theoretically have the potential to bypass the reliability concerns associated with a non-native substrate but still deliver comparable or even superior performance, albeit at a low-cost. Schottky barrier diodes are designed and fabricated based on the nano-GaN concept. Fabricated diodes grown on a Sapphire substrate show distinct rectifying properties blocking voltages of 100 V. Despite repetitive biasing, the devices did not show any sign of current collapse. Design optimization of the nanowire Schottky barrier diode (NWSBD) is performed using 3D TCAD drift-diffusion simulations and semiconductor-oxide interaction was utilized to push the performance of the NWSBDs beyond the unipolar limit of GaN. The optimized NWSBD show the potential to block voltages upwards of 650 V working under present fabrication constraints of doping concentrations and pillar height. Simulated characteristics predict superior VRB 2/RON FoM, outperforming both the lateral HEMTs and the vertical GaN on GaN devices. A fully controlled, three terminal nanowire field effect transistor (NWFET) is also investigated using 3D TCAD drift-diffusion modeling. The NWFET can be operated in both normally-off and normally-on modes based on design and requirements. The 3D gate around the nanowires coupled with a strong dielectric REduced SURface Field (RESURF) effect allows this architecture to block voltages beyond the 1D unipolar material limit of GaN in the reverse bias. With proper design, highly desirable linear voltage to pillar height scaling can be achieved for the NWFET. Breakdown voltages of more than 900 V is predicted, with superior VRB 2/RON and QGD x RDS(ON) figure of merits. Despite lacking a body-diode, the NWFETs being quasi-symmetrical enables current conduction in the 3rd quadrant itself by self-commutated reverse conduction with a very low voltage drop. The nanowire architecture holds great potential to produce power rectifiers and controlled FETs with high performance, improved reliability and ruggedness and in a cost-effective way.

Bulk gallium nitride (GaN) power semiconductor devices are gaining significant interest in recent years, creating the need for technology computer aided design (TCAD) simulation to accurately model and optimize these devices. This paper comprehensively reviews and compares different GaN physical models and model parameters in the literature, and discusses the appropriate selection of these models and parameters for TCAD simulation. 2-D drift-diffusion semi-classical simulation is carried out for 2.6 kV and 3.7 kV bulk GaN vertical PN diodes. The simulated forward current-voltage and reverse breakdown characteristics are in good agreement with the measurement data even over a wide temperature range.