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A Sigma-Delta modulator (SDM) realized with a fully differential third-order single-loop cascaded integrator feedforward (CIFF) architecture is proposed. A pair of low-frequency chopper switches are nested outside the chopper amplifier to further reduce the residual offset voltage. To reduce the power consumption and ensure linearity, a high-speed dynamic comparator is also used to implement a one-bit quantizer. The proposed architecture and the corresponding functionality are first simulated in MATLAB Simulink at the behavioral level. The results show that the designed modulator has an SNDR of 124.9 dB corresponding to an ENOB of 20.46 bits at a clock frequency of 256 kHz and 312.5 Hz input with a differential-mode voltage of 700 mV sinusoidal waveform. Based on SMIC 180 nm/1.8 V standard CMOS process on the Cadence platform, the subcircuit-level simulation is also performed, while the result shows that the proposed modulator can effectively achieve 115.52 dB SNDR, 18.90-bit ENOB, and 8.40 mW power consumption, which correspond to FoM W and FoM schreier of 0.067 pJ/step and 163.27 dB, respectively. The proposed modulator shows a significant advantage to be applied for high-precision analog-to-digital conversion applications such as high-quality equipment for audio, ECG and EEG signal sensing. [ABSTRACT FROM AUTHOR]

This paper presents an extensive characterization of the low-frequency noise (LFN) at room temperature (RT) and cryogenic temperature (4.2K) of 40-nm bulk-CMOS transistors. The noise is measured over a wide range of bias conditions and geometries to generate a comprehensive overview of LFN in this technology. While the RT results are in-line with the literature and the foundry models, the cryogenic behavior diverges in many aspects. These deviations include changes with respect to RT in magnitude and bias dependence that are conditional on transistor type and geometry, and even an additional systematic Lorentzian feature that is common among individual devices. Furthermore, we find the scaling of the average LFN with the area and its variability to be similar between RT and 4.2K, with the cryogenic scaling reported systematically for the first time. The findings suggest that, as no consistent decrease of LFN at lower temperatures is observed while the white noise is reduced, the impact of LFN for precision analog design at cryogenic temperatures gains a more predominant role.

In this paper, we have investigated the flicker noise (1/ $f$ ) in 45-nm RFSOI NFETs for quantum computing applications. 1/ $f$ noise characterization and analysis were performed in linear region at cryogenic temperatures down to 10K. A Lorentzian-like noise is also observed depending on bias conditions, possibly due to the floating body of PDSOI. The extracted frequency exponent $(\gamma)$ shows an inverted U-shape behavior with temperature mainly attributed to non-uniform energy distribution of traps in the gate dielectric. The dominant source of 1/ $f$ noise is carrier number fluctuation. Thermal-activation behavior of 1/ $f$ noise is studied, which shows the traps responsible for noise are not thermally activated. Volume trap densities are also extracted from 300K down to 10K. The volume trap density increases with a decrease in temperature, but no significant increase in normalized noise is observed at cryogenic temperatures in the measured NFETs. The non-uniform distribution along with the thermal inactive behavior of traps over the studied temperature range is expected to be a plausible reason for the temperature-independent behavior of normalized noise.

Temperature dependence of the low‐frequency electronic noise in NiOx/β‐Ga2O3 p–n heterojunction diodes is reported. The noise spectral density is of the 1/f‐type near room temperature but shows signatures of Lorentzian components at elevated temperatures and at higher current levels (f is the frequency). It is observed that there is an intriguing non‐monotonic dependence of the noise on temperature near T = 380 K. The Raman spectroscopy of the device structure suggests material changes, which results in reduced noise above this temperature. The normalized noise spectral density in such diodes is determined to be on the order of 10−14 cm2 Hz−1 (f = 10 Hz) at 0.1 A cm−2 current density. In terms of the noise level, NiOx/β‐Ga2O3 p–n diodes perform excellently for new technology and occupy an intermediate position among devices of various designs implemented with different ultra‐wide‐bandgap semiconductors. The obtained results are important for understanding the electronic properties of NiOx/β‐Ga2O3 heterojunctions and contribute to the development of noise spectroscopy as the quality assessment tool for new electronic materials and device technologies. [ABSTRACT FROM AUTHOR]

We discuss the implementation challenges of gas sensing systems based on low-frequency noise measurements on chemoresistive sensors. Resistance fluctuations in various gas sensing materials, in a frequency range typically up to a few kHz, can enhance gas sensing by considering its intensity and the slope of power spectral density. The issues of low-frequency noise measurements in resistive gas sensors, specifically in two-dimensional materials exhibiting gas-sensing properties, are considered. We present measurement setups and noise-processing methods for gas detection. The chemoresistive sensors show various DC resistances requiring different flicker noise measurement approaches. Separate noise measurement setups are used for resistances up to a few hundred kΩ and for resistances with much higher values. Noise measurements in highly resistive materials (e.g., MoS2, WS2, and ZrS3) are prone to external interferences but can be modulated using temperature or light irradiation for enhanced sensing. Therefore, such materials are of considerable interest for gas sensing. [ABSTRACT FROM AUTHOR]

This article reports an improvement in the low-frequency noise characteristics in hafnium oxide-based (HfO2) field-effect transistors by different precursor materials at ALD process. The Hafniumoxide on the devices were fabricated once with organic precursor materials and once with chloridic precursor materials. The investigation shows an improvement in the noise behavior when using chloridic precursor materials. Regarding the main noise source, which are divided into fluctuation of the number of carriers (ΔN) and fluctuation of the effective transistor mobility (Δμ), the results show that the devices fabricated with organic precursor materials show typical behavior of ΔN noise, where the devices fabricated with chloridic precursor materials show typical behavior of Δμ noise.

Abstract Temperature dependence of the low‐frequency electronic noise in NiOx/β‐Ga2O3 p–n heterojunction diodes is reported. The noise spectral density is of the 1/f‐type near room temperature but shows signatures of Lorentzian components at elevated temperatures and at higher current levels (f is the frequency). It is observed that there is an intriguing non‐monotonic dependence of the noise on temperature near T = 380 K. The Raman spectroscopy of the device structure suggests material changes, which results in reduced noise above this temperature. The normalized noise spectral density in such diodes is determined to be on the order of 10−14 cm2 Hz−1 (f = 10 Hz) at 0.1 A cm−2 current density. In terms of the noise level, NiOx/β‐Ga2O3 p–n diodes perform excellently for new technology and occupy an intermediate position among devices of various designs implemented with different ultra‐wide‐bandgap semiconductors. The obtained results are important for understanding the electronic properties of NiOx/β‐Ga2O3 heterojunctions and contribute to the development of noise spectroscopy as the quality assessment tool for new electronic materials and device technologies.

Stochastic computing (SC) is widely known for its high error tolerance and efficient computing ability of complex functions with remarkably simple logic gates. The noise of electronic devices is widely used to be the entropy source due to its randomness. Compared with thermal noise and random telegraph noise (RTN), flicker noise is favored by researchers because of its high noise density. Meanwhile, unlike using RRAM, PCRAM and other emerging memory devices as the entropy source, using logic devices does not require any additional process steps, which is significant for industrialization. In this work, we systematically and statistically studied the 1/f noise characteristics of 14 nm FinFET, and found that miniaturizing the channel area of the device or lowering the ambient temperature can effectively increase the 1/f noise density of the device. This is of great importance to improve the accuracy of the SC system and simplify the complexity of the stochastic number generator (SNG) circuit. At the same time, these rules of 1/f noise characteristics in FinFET devices can provide good guidance for our device selection in circuit design. [ABSTRACT FROM AUTHOR]

In this work, the degradation of the random telegraph noise (RTN) and the threshold voltage ( V t ) shift of an 8.3Mpixel stacked CMOS image sensor (CIS) under hot carrier injection (HCI) stress are investigated. We report for the first time the significant statistical differences between these two device aging phenomena. The V t shift is relatively uniform among all the devices and gradually evolves over time. By contrast, the RTN degradation is evidently abrupt and random in nature and only happens to a small percentage of devices. The generation of new RTN traps by HCI during times of stress is demonstrated both statistically and on the individual device level. An improved method is developed to identify RTN devices with degenerate amplitude histograms. [ABSTRACT FROM AUTHOR]

This paper presents an injection locked digitally controlled ring oscillator (IL-DCRO). To reduce jitter variations, minimize oscillator spurious signals, and eliminate periodical phase error, a double edge-injection (window injection) scheme with synchronized edge directions is proposed. A combinational edge generator is utilized to substitute the sequential edge generators for injection timing requirements relaxation. By biasing devices in deep triode, digitally controlled delay cells currents are adopted for frequency tuning. This helps reducing the devices flicker (1/f) noise and minimize the DCRO overall phase noise. At 1 MHz offset of frequency, the proposed oscillator has a measured phase noise of −125.95 dBc/Hz and −115.6 dBc/Hz at oscillation frequencies of 913.4 MHz and 432.6 MHz, respectively. Fabricated in 350 nm CMOS process, with a maximum power consumption of 3.3 mW, and oscillating at 913.4 MHz, this DCRO achieves a tuned oscillator figure of merit (FoM) of −197.35 dBc/Hz. The core area of this edge-injection-based DRCO is only 0.08 mm2. [ABSTRACT FROM AUTHOR]

This paper presents a noise reduction technique using common-mode feedback in active CMOS mixers. The proposed technique decreases the common-mode noise, thus reducing the common-to-differential conversion noise arising from mismatch and process variations. In addition, the proposed technique reduces sensitivity to process, voltage, and temperature (PVT) variations due to negative feedback. A negative feedback theory is adopted to analyze the low-noise performance of the proposed technique. The theoretical analysis is validated by simulations and measurements. The conventional and proposed mixers are fabricated in a 65-nm CMOS process. Measurement results of the proposed mixer operating at an RF of 2.1 GHz show a conversion gain of 21.5 dB, the input-referred third-order intercept point (IIP3) of -16.2 dBm, and a flicker noise figure of 8.7 dB at 10 kHz while it dissipates 3.45 mW from a 1.5 V supply voltage. Measurements also show common-mode noise reduction of 10.1 dB at 10 kHz, without degradation of other characteristics. It is demonstrated that the proposed mixer can be applied to decrease phase noise of a self-oscillating mixer (SOM) due to the low common-mode flicker noise mixer.

This paper describes the implementation of low-power, low-phase-noise (PN), and robust startup tailless class-C voltage-controlled oscillator (TVCO) for 5G new radio (NR) technology. It features dual gate voltage control source biasing to generate fast startup and differential signal amplitude balancing, thus eliminating the requirement of the conventional tail current source, which introduces more parasitic capacitance that affects the oscillation frequency, phase noise, and power consumption. The TVCO is fabricated in 180 nm complementary metal-oxide semiconductor (CMOS) technology, oscillating at 2.59 GHz 5G NR carrier frequency with an output voltage swing of 1.7 V and low-phase-noise of -122 dBc/Hz at 1 MHz offset with supply voltage headroom of 0.7 V. Without additional features added, the TVCO consumes very low-power and a small die area of 0.98 mW and 0.49 mm2, respectively. The achieved figure of merit (FoM) is 190.36 dBc/Hz.

Subject and Purpose. The subject of research is the flicker noise present in informant signals of search-and-rescue radars, specifically its properties and the effect it may have on algorithms for detecting and identifying manifestations of human breath and heartbeat processes during rescue operations. The work has been aimed at creating a suitable description of flicker noise for developing optimal algorithms of digital signal processing for quick detection and identification of informant signals during rescue missions. Method and Methodology. The low-frequency flicker noise has been modeled within the polynomial equations technique, proceeding from an analysis of real data on noise components in the output signals from a coherent search-and-rescue radar. A comparative analysis is done for a variety of approximating functions suggested for representing the low frequency portion of the spectrum observed. Results. For the low-frequency range wherein spectral components of the informative signal owing to respiration and heartbeat of humans are concentrated, an adequate model of the fluctuating interference is the flicker noise model built on the basis of polynomial equations. The problem of optimized model representation of the noise in digital signal processing algorithms has been analyzed for the case of a coherent search-and-rescue radar. A model of the fluctuating process has been suggested, based on a polynomial approximation for the spectral function in the low-frequency range of the signals observed at the radar output. Conclusion. Spectral characteristics of both interference and informant signals have been investigated. A structural diagram has been proposed for a high sensitivity, coherent search-and-rescue radar implementing a signal storage algorithm based on the polynomial model of the fluctuating process. The advantages and disadvantages of the radar are discussed, with examples given of real signal implementations and of noise spectrograms. Methods of effective estimation of Doppler signal phases are presented. The paper suggests an analysis of basic requirements as to parameters and performance characteristics of the rescue radar.

Subject and Purpose. Designers of the research radars intended for detecting manifestations of biological activity of living organisms may be interested in the noise characteristics shown by their oscillators at offsets about 10–2 Hz or even 10–3Hz from the carrier frequency. Unfortunately, the producing companies do not practice regular information on noise performance of their products at frequencies below 1 Hz. The present authors have set the goal of deriving an analytical expression for the spectral density of flicker noise which should allow radar engineers estimating the probable noise performance of low-noise oscillators over any frequency range. Methods and Methodology. A great number of writers considering spectral properties of flicker noise tend to support the assertion that its spectral density increases continuously with a decrease in frequency, following the power law 1/f. Meanwhile, the present authors assume availability of a certain frequencyfmbelow which the spectral density should most likely remain unchanged, even to as low as zero frequency. Also, there is a range of frequencies above which the spectral density of flicker noise remains constant and the total spectral density is determined solely by thermal noise. Results.The spectral density of noise follows the power law 1/f throughout the range fromfm and up to the point where thermal noise starts to overbalance the flicker noise. The authors have proposed an approximating function to describe the behavior of the averaged spectral density of noise from the oscillator within the entire frequency range. Conclusions. The results obtained shall allow radio system designers to make estimates of the probable noise performance of low-noise oscillators in any frequency range, using only known reference data provided by the manufacturer.

A coupling mechanism between flicker noise and hot carrier degradation (HCD) is revealed in this work. Predicting the flicker noise properties of fresh and aged devices is becoming essential for circuit designs, requiring an understanding of the fundamental noise behaviors. While certain models for fresh devices have been proposed, those for aged devices have not been reported yet because of the lack of a clear mechanism. The flicker noise of aged FinFETs is characterized based on the measure-stress-measure (MSM) method and analyzed from the device physics. It is found that both the mean and deviations of the noise power spectral density increase compared with the fresh counterparts. A coupling mechanism is proposed to explain the trap time constants, leading to the trap characterizations in their energy profiles. The amplitude and number of contributing traps are also changing and are dependent on the mode of HCD and determined by the position of the induced traps. A microscopic picture is developed from the perspective of trap coupling, reproducing well the measured noise of advanced nanoscale FinFETs. The finding is important for accurate flicker noise calculations and aging-aware circuit designs. [ABSTRACT FROM AUTHOR]

Noises in the GPS vertical coordinate time series, mainly including the white and flicker noise, have been proven to impair the accuracy and reliability of GPS products. Various methods were adopted to weaken the white and flicker noises in the GPS time series, such as the complementary ensemble empirical mode decomposition (CEEMD), wavelet denoising (WD), and variational mode decomposition (VMD). However, a single method only works at a limited frequency band of the time series, and the corresponding denoising ability is insufficient, especially for the flicker noise. Hence, in this study, we try to build two combined methods: CEEMD & WD and VMD & WD, to weaken the flicker noise in the GPS positioning time series from the Crustal Movement Observation Network of China. First, we handled the original signal using CEEMD or VMD with the appropriate parameters. Then, the processed signal was further denoised by WD. The results show that the average flicker noise in the time series was reduced from 19.90 mm/year0.25 to 2.8 mm/year0.25. This relates to a reduction of 86% after applying the two methods to process the GPS data, which indicates our solutions outperform CEEMD by 6.84% and VMD by 16.88% in weakening the flicker noise, respectively. Those apparent decreases in the flicker noises for the two combined methods are attributed to the differences in the frequencies between the WD and the other two methods, which were verified by analyzing the power spectrum density (PSD). With the help of WD, CEEMD & WD and VMD & WD can identify more flicker noise hidden in the low-frequency signals obtained by CEEMD and VMD. Finally, we found that the two combined methods have almost identical effects on removing the flicker noise in the time series for 226 GPS stations in China, testified by the Wilcoxon rank sum test. [ABSTRACT FROM AUTHOR]

We discuss the implementation challenges of gas sensing systems based on low-frequency noise measurements on chemoresistive sensors. Resistance fluctuations in various gas sensing materials, in a frequency range typically up to a few kHz, can enhance gas sensing by considering its intensity and the slope of power spectral density. The issues of low-frequency noise measurements in resistive gas sensors, specifically in two-dimensional materials exhibiting gas-sensing properties, are considered. We present measurement setups and noise-processing methods for gas detection. The chemoresistive sensors show various DC resistances requiring different flicker noise measurement approaches. Separate noise measurement setups are used for resistances up to a few hundred kΩ and for resistances with much higher values. Noise measurements in highly resistive materials (e.g., MoS2, WS2, and ZrS3) are prone to external interferences but can be modulated using temperature or light irradiation for enhanced sensing. Therefore, such materials are of considerable interest for gas sensing.

Stochastic computing (SC) is widely known for its high error tolerance and efficient computing ability of complex functions with remarkably simple logic gates. The noise of electronic devices is widely used to be the entropy source due to its randomness. Compared with thermal noise and random telegraph noise (RTN), flicker noise is favored by researchers because of its high noise density. Meanwhile, unlike using RRAM, PCRAM and other emerging memory devices as the entropy source, using logic devices does not require any additional process steps, which is significant for industrialization. In this work, we systematically and statistically studied the 1/f noise characteristics of 14 nm FinFET, and found that miniaturizing the channel area of the device or lowering the ambient temperature can effectively increase the 1/f noise density of the device. This is of great importance to improve the accuracy of the SC system and simplify the complexity of the stochastic number generator (SNG) circuit. At the same time, these rules of 1/f noise characteristics in FinFET devices can provide good guidance for our device selection in circuit design.

In this work, the degradation of the random telegraph noise (RTN) and the threshold voltage (Vt) shift of an 8.3Mpixel stacked CMOS image sensor (CIS) under hot carrier injection (HCI) stress are investigated. We report for the first time the significant statistical differences between these two device aging phenomena. The Vt shift is relatively uniform among all the devices and gradually evolves over time. By contrast, the RTN degradation is evidently abrupt and random in nature and only happens to a small percentage of devices. The generation of new RTN traps by HCI during times of stress is demonstrated both statistically and on the individual device level. An improved method is developed to identify RTN devices with degenerate amplitude histograms.

The input-referred noise (IRN) is one of the most crucial performance indicators for the analog front-end (AFE) of neural recording devices. In this study, we present a novel design approach for a low-noise amplifier (LNA) based on the transistor optimization method in CMOS technology. Because flicker noise is predominant in neural recording applications, AFE has been designed to meet input-referred flicker noise specifications, whereas thermal noise contributions are monitored and controlled by flicker noise corner frequencies. Transistor optimization is accomplished using a lookup table that encapsulates its performance based on its current density. Initially, transistors are optimized based on the flicker noise performance; later, they may be further optimized based on their size, power consumption, transconductance, or thermal noise contribution. The proposed approach was validated by designing a folded-cascode amplifier with IRN ranging from 2 to 8 $\mu \text{V}_{\text {rms}}$ . The results of the simulation show that the errors of our design methodology are less than 10%, which is less than those of the $g_{m}/I_{D} $ and inversion coefficient methods. The proposed LNA achieves 2.1 $\mu \text{V}_{\text {rms}}$ while consuming 0.83 $\mu \text{W}$ from a 1.2 V supply.

Phase noisehas become the single most critical factor to be addressed in the design of modern communication systems. Facing the challenging requirements of 5G cellular communication, our paper describes a new theoretical framework to calculate the phase noise of LC oscillators, relying on easy to implement closed form solutions for phase noise calculations. Using closed form phase noise solutions enables oscillator designers to easily implement multiple phase noise calculation options for a number of oscillator circuits, which would be very difficult to implement with the existing mathematically complex phase noise theories. The analytic methods of our theory rely on modeling all real oscillators as having non-ideal or latent behaviors in addition to their primary nature for generating a carrier wave operating at a single frequency with a single amplitude. It is a cascade of these non-ideal transformation processes that produce non-ideal oscillator outputs containing the phase noise sidebands. Enhanced qualitative and quantitative insights into oscillator phase noise performances are achieved by using this approach. We validate our methods by comparing their results with phase noise simulations carried out for a sample CMOS LC voltage-controlled oscillator in 90 nm RFCMOS process using SpectreRF simulator. The results for the oscillator's output 1/f2 thermal phase noise, 1/f noise upconversion into 1/f3 phase noise and the 1/f3 corner frequency of phase noise spectrum using our theory yields −136 dBc/Hz at 10 MHz offset, −21.3 dBc/Hz at 1 kHz offset and 2.6 MHz respectively. The corresponding values obtained with SpectreRF simulation are −135.9 dBc/Hz, −23.4 dBc/Hz and 2.1 MHz. The carrier frequency is 5.4 GHz with output power of 9.78 dBm.

A new technique to reduce flicker noise generated in light-fidelity (Li-Fi) transmission links based on the white light-emitting diode (LED) is proposed. Here, flicker noise with a frequency of 120 Hz, which is twice the frequency of AC power (60 Hz), is generated. The proposed technique is implemented in the receiver of the Li-Fi link. It can reduce flicker noise regardless of various digital modulation formats. In addition, there is no need to change the structure of the electrical circuit driving the LED to reduce the flicker noise. As a result, the non-return to-zero-on-off-keying (NRZ–OOK) signal waveform is tilted according to the flicker noise waveform. We implement the derivative equalization with a pseudo-flicker weight function to reduce the flicker noise. The derivative value of the NRZ–OOK signal mixed with flicker noise becomes larger than that without the flicker noise. In the proposed technique, the derivative value between adjacent sampling points is suppressed below the preset thresholds when it is greater than the preset threshold. Furthermore, a pseudo-flicker weight function is applied to accelerate the flicker noise reduction. As a result, using the proposed technique, a 2 dB signal-to-noise ratio (SNR) gain is obtained based on the bit error rate (BER) threshold (3.5 × 10−5) corresponding to 10% flicker modulation, which is known to have no serious effect on human health. This means that it is possible to implement a Li-Fi transmission link based on an illumination environment with a flicker modulation reduced from 10% to 7%. [ABSTRACT FROM AUTHOR]

This paper describes the implementation of lowpower, low-phase-noise (PN), and robust startup tailless class-C voltage-controlled oscillator (TVCO) for 5G new radio (NR) technology. It features dual gate voltage control source biasing to generate fast startup and differential signal amplitude balancing, thus eliminating the requirement of the conventional tail current source, which introduces more parasitic capacitance that affects the oscillation frequency, phase noise, and power consumption. The TVCO is fabricated in 180 nm complementary metal-oxide semiconductor (CMOS) technology, oscillating at 2.59 GHz 5G NR carrier frequency with an output voltage swing of 1.7 V and low-phase-noise of - 122 dBc/Hz at 1 MHz offset with supply voltage headroom of 0.7 V. Without additional features added, the TVCO consumes very low-power and a small die area of 0.98 mW and 0.49 mm², respectively. The achieved figure of merit (FoM) is 190.36 dBc/Hz. [ABSTRACT FROM AUTHOR]

A coupling mechanism between flicker noise and hot carrier degradation (HCD) is revealed in this work. Predicting the flicker noise properties of fresh and aged devices is becoming essential for circuit designs, requiring an understanding of the fundamental noise behaviors. While certain models for fresh devices have been proposed, those for aged devices have not been reported yet because of the lack of a clear mechanism. The flicker noise of aged FinFETs is characterized based on the measure-stress-measure (MSM) method and analyzed from the device physics. It is found that both the mean and deviations of the noise power spectral density increase compared with the fresh counterparts. A coupling mechanism is proposed to explain the trap time constants, leading to the trap characterizations in their energy profiles. The amplitude and number of contributing traps are also changing and are dependent on the mode of HCD and determined by the position of the induced traps. A microscopic picture is developed from the perspective of trap coupling, reproducing well the measured noise of advanced nanoscale FinFETs. The finding is important for accurate flicker noise calculations and aging-aware circuit designs.

Noises in the GPS vertical coordinate time series, mainly including the white and flicker noise, have been proven to impair the accuracy and reliability of GPS products. Various methods were adopted to weaken the white and flicker noises in the GPS time series, such as the complementary ensemble empirical mode decomposition (CEEMD), wavelet denoising (WD), and variational mode decomposition (VMD). However, a single method only works at a limited frequency band of the time series, and the corresponding denoising ability is insufficient, especially for the flicker noise. Hence, in this study, we try to build two combined methods: CEEMD & WD and VMD & WD, to weaken the flicker noise in the GPS positioning time series from the Crustal Movement Observation Network of China. First, we handled the original signal using CEEMD or VMD with the appropriate parameters. Then, the processed signal was further denoised by WD. The results show that the average flicker noise in the time series was reduced from 19.90 mm/year0.25 to 2.8 mm/year0.25. This relates to a reduction of 86% after applying the two methods to process the GPS data, which indicates our solutions outperform CEEMD by 6.84% and VMD by 16.88% in weakening the flicker noise, respectively. Those apparent decreases in the flicker noises for the two combined methods are attributed to the differences in the frequencies between the WD and the other two methods, which were verified by analyzing the power spectrum density (PSD). With the help of WD, CEEMD & WD and VMD & WD can identify more flicker noise hidden in the low-frequency signals obtained by CEEMD and VMD. Finally, we found that the two combined methods have almost identical effects on removing the flicker noise in the time series for 226 GPS stations in China, testified by the Wilcoxon rank sum test.

The analog AI core concept is appealing for deep‐learning (DL) because it combines computation and memory functions into a single device. Yet, significant challenges such as noise and weight drift will impact large‐scale analog in‐memory computing. Here, effects of flicker noise and drift on large DL systems are explored using a new flicker‐noise model with memory, which preserves temporal correlations, including a flicker noise figure of merit (FOM) Ar to quantify impacts on system performance. Flicker noise is characterized for Ge2Sb2Te5 (GST) based phase‐change memory (PCM) cells with a discovery of read‐noise asymmetry tied to shape asymmetry of mushroom cells. This experimental read polarity dependence is consistent with Pirovano's trap activation and defect annihilation model in an asymmetric GST cell. The impact of flicker noise and resistance drift of analog PCM synaptic devices on deep‐learning hardware is assessed for six large‐scale deep neural networks (DNNs) used for image classification, finding that the inference top‐1 accuracy degraded with the accumulated device flicker noise and drift as ∝Ar×twait, and ∝twait−ν, respectively, where ν is the drift coefficient. These negative impacts could be mitigated with a new hardware‐aware (HWA) (pre)‐training of the DNNs, which is applied before programming to the analog arrays. [ABSTRACT FROM AUTHOR]

In this work, a differential ring VCO architecture and its phase noise are inspected. Resistor bridges are added between the stages that, as evident through theory and simulation, are capable of reducing flicker and thermal noise upconversion. A differential two-stage ring VCO is considered operating at 2.5 GHz for simulation in 180 nm CMOS technology which show phase noise reduction by 4 dBc/Hz and 6.5 dBc/Hz at 10 kHz offset frequency for resistor values of 11 k Ω and 5 k Ω respectively with similar power dissipation compared to the unmodified architecture. Similar reduction in phase noise also observed in a three-stage structure operating at 1.5 GHz. [ABSTRACT FROM AUTHOR]

Modern CMOS image sensors generally face difficulties in limiting the noise effect of their readout circuits. The existing noise sources range from spatial to temporal noise, such as the thermal, the flicker, and the random telegraph signal noise sources. The noise sources and the device's image quality issues become more evident when targeting design goals, such as high resolution and high frame-rate. This paper focuses on the theoretical derivation of the Correlated Multiple Sampling technique by means the Discrete Fourier Transform in which it explicitly includes the noise contamination process during the image sensor readout operation. The purpose of the proposed approach is to deepen the underlying multiple sampling process role in low noise systems and how beneficial this technique is in suppressing the noise contamination, as such proposing a more intuitive way to understand the method. [ABSTRACT FROM AUTHOR]

The analog AI core concept is appealing for deep‐learning (DL) because it combines computation and memory functions into a single device. Yet, significant challenges such as noise and weight drift will impact large‐scale analog in‐memory computing. Here, effects of flicker noise and drift on large DL systems are explored using a new flicker‐noise model with memory, which preserves temporal correlations, including a flicker noise figure of merit (FOM) Ar to quantify impacts on system performance. Flicker noise is characterized for Ge2Sb2Te5 (GST) based phase‐change memory (PCM) cells with a discovery of read‐noise asymmetry tied to shape asymmetry of mushroom cells. This experimental read polarity dependence is consistent with Pirovano's trap activation and defect annihilation model in an asymmetric GST cell. The impact of flicker noise and resistance drift of analog PCM synaptic devices on deep‐learning hardware is assessed for six large‐scale deep neural networks (DNNs) used for image classification, finding that the inference top‐1 accuracy degraded with the accumulated device flicker noise and drift as ∝Ar×twait, and ∝twait−ν, respectively, where ν is the drift coefficient. These negative impacts could be mitigated with a new hardware‐aware (HWA) (pre)‐training of the DNNs, which is applied before programming to the analog arrays.

In this paper, the flicker noise properties of bottom-gate ESL structured amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) from two different technologies have been studied and modeled. Model development is carried out by adapting the Unified Model parameter Extraction Method (UMEM), developed for parameter extraction and compact modeling of TFT devices, and the unified 1/f noise model. Furthermore, comparative study of device figures of merits is performed to point out the device performance enhancements that the different fabrication technologies have brought about. It is found out that both devices have low deep state density, whereas the second device demonstrated higher performance in terms of carrier mobility and subthreshold slope. Both the DC and noise models are validated by matching them against experimental data obtained in different regimes of device operation.

Flicker noise contributed by active mixers usually compromises the overall sensitivity level of direct-conversion receivers (DCRs). In this article, a qualitative quasi-analytical model has been developed to in-depth explain the flicker noise mechanism existing in the switched-gm active mixer in which an improved current source switch is presented for high mixer common-mode rejection ratio (MCMRR). The built model simply explains how frequency translations take place within the mixer. Compact equations are derived to estimate the flicker noise contribution of individual stages at the output. Simulations validate the accuracy of the predictions, and the dependence of flicker noise on local oscillator (LO) slope ratio, period, and other circuit parameters. The high-frequency limitation of the mixer is further estimated by investigating into the tail parasitic capacitance charging and discharging behavior. Furthermore, a switched-gm pMOS mixer prototype with low flicker noise is implemented in a 0.18-μm CMOS process. It operates at an RF input frequency of 1 GHz and provides a maximal conversion gain of 12.9 dB and an NF of 11.4 dB while a flicker noise corner of 220 kHz and an IIP3 of 3.6 dBm are measured, respectively. The mixer core only consumes 3.3 mW from a 1.8 V supply.

A new technique to reduce flicker noise generated in light-fidelity (Li-Fi) transmission links based on the white light-emitting diode (LED) is proposed. Here, flicker noise with a frequency of 120 Hz, which is twice the frequency of AC power (60 Hz), is generated. The proposed technique is implemented in the receiver of the Li-Fi link. It can reduce flicker noise regardless of various digital modulation formats. In addition, there is no need to change the structure of the electrical circuit driving the LED to reduce the flicker noise. As a result, the non-return to-zero-on-off-keying (NRZ–OOK) signal waveform is tilted according to the flicker noise waveform. We implement the derivative equalization with a pseudo-flicker weight function to reduce the flicker noise. The derivative value of the NRZ–OOK signal mixed with flicker noise becomes larger than that without the flicker noise. In the proposed technique, the derivative value between adjacent sampling points is suppressed below the preset thresholds when it is greater than the preset threshold. Furthermore, a pseudo-flicker weight function is applied to accelerate the flicker noise reduction. As a result, using the proposed technique, a 2 dB signal-to-noise ratio (SNR) gain is obtained based on the bit error rate (BER) threshold (3.5 × 10−5) corresponding to 10% flicker modulation, which is known to have no serious effect on human health. This means that it is possible to implement a Li-Fi transmission link based on an illumination environment with a flicker modulation reduced from 10% to 7%.

Analytical models of low-frequency noise (LFN) characteristics for planar-type tunnel field-effect-transistors (TFETs) are proposed. A surface-potential-based current–voltage model is developed to physically represent the current fluctuation due to charge trapping/detrapping in the gate dielectric. An LFN model can be analytically derived from the current fluctuation with a reasonable approximation. The proposed model is verified using Technology Computer Aided Design (TCAD) and measurement data, which are in good agreement with each other. The analytical model can not only serve as a valuable reference and tool for low-power analog circuit design but also provide physical insights into the LFN of TFETs. [ABSTRACT FROM AUTHOR]

This paper presents a down-conversion active mixer with improved performance for direct conversion receivers in wireless local area networks. The effect of negative admittance on the Gilbert cell mixer performance is investigated in terms of flicker noise, conversion gain, and linearity. The proposed negative admittance is implemented using a modified negative capacitance connected in parallel to a negative resistance, which exhibits a high degree of freedom to achieve high negative capacitance along with low negative resistance. The proposed mixer is designed and simulated using TSMC 0.18 µm CMOS technology in Cadence Spectre-RF at the input frequency of 2.4 GHz and intermediate frequency of 10 MHz. Post-layout simulation results show using the negative admittance can improve the flicker noise more than 16.7 dB at the frequency of 1 kHz. The proposed mixer exhibits a conversion gain of 19.3 dB and a flicker noise corner frequency of 5 kHz. The double-side band noise figure is 7.57 dB at the output frequency of 10 MHz, and the third-order intermodulation intercept point (IIP3) is − 7.5 dBm. The power dissipation is 13.6 mW from the power supply of 1.8 V. Moreover, the linearity of the proposed mixer can be enhanced by choosing the proper values for transconductance of switching quad and negative resistance so that it achieves the IIP3 of + 7.9 dBm with the conversion gain of 7.6 dB. [ABSTRACT FROM AUTHOR]

We proposed applying low-frequency (flicker) noise in proton-exchange membrane fuel cells under selected loads to assess their state of health. The measurement set-up comprised a precise data acquisition board and was able to record the DC voltage and its random component at the output. The set-up estimated the voltage noise power spectral density at frequencies up to a few hundred mHz. We observed the evolution of the electrical parameters of selected cells of different qualities. We confirmed that flicker noise intensity varied the most (more than 10 times) and preceded changes in the impedance or a drop in the output DC voltage (less than 2 times). The data were observed for current loads (from 0.5 to 32 A) far from the permissible load. We deduce that the method can be utilised in industrial conditions to monitor the state of health of the selected cells by noise analysis. The method can be used in real-time when the flicker noise is measured within the range of a few Hz and requires a reasonable amount of averaging time to estimate its power spectral density. The presented method of flicker noise measurement has considerable potential for use in innovative ways of fuel cell quality monitoring.

This article presents a comparative low-frequency noise (LFN) characterization of gate-all-around nanosheet n-channel Si metal–oxide–semiconductor field effect transistors, processed with three different metal gates (MGs): an aluminum-based reference process and two alternative effective work function (EWF) stacks. In all cases, the gate dielectric is composed of HfO2 over an SiO2 interfacial layer. The LFN figures of merit are extracted, such as the oxide trap density and Coulomb scattering coefficient, and the correlations with the threshold voltage and the electron mobility are investigated. Carrier number fluctuations are confirmed as the dominant mechanism of the 1/ƒ noise for all evaluated devices. Additionally, it is shown that the specific MG can contribute to the carrier scattering, degrading the electron mobility. The most promising results are obtained for one of the alternative MGs, exhibiting a low oxide trap density level, a low threshold voltage and insignificant mobility degradation. [ABSTRACT FROM AUTHOR]

This study presents a new low-power and low-phase noise Colpitts quadrature voltage-controlled oscillator (QVCO). The proposed QVCO contains two differential Colpitts voltage-controlled oscillators (VCOs) that use gain-boosting technique to enhance the negative transconductance and relax start-up condition. Both switching and tail transistors are configured in class-C to improve impulse sensitivity function and phase noise performance of the circuit via better noise modulation function. In addition, flicker noise would be reduced because of the switched-biasing mechanism of tail transistors. Phase noise analysis shows that changing the bias voltage of switching as well as tail transistors can improve the phase noise performance of the core VCO with overlap reduction of the transistors active time. Consequently, due to no extra noisy elements for coupling and class-C biasing of all transistors, low-phase noise quadrature signals are generated. To verify the performance of the proposed technique, post-layout simulation is performed in Taiwan Semiconductor Manufacturing Company (TSMC) of 0.18 μm Radio Frequency-Complementary Metal-Oxide- Semiconductor (RF-CMOS) process at a supply voltage of 1.2 V. Post-layout simulation results show that the phase noise of the proposed QVCO is −120.6 dBc/Hz at 1 MHz offset from 5.73 GHz operation frequency. The total power consumption of the QVCO is 3.1 mW and the tuning range is from 5 to 5.73 GHz. [ABSTRACT FROM AUTHOR]

This article shows how to properly define modulated flicker noise in Verilog-A compact models, and how a simulator should handle flicker noise for periodic and transient analyses. By considering flicker noise in a simple linear resistor driven by a sinusoidal source, we demonstrate that the absolute value formulation used in most existing Verilog-A flicker noise models is incorrect when the bias applied to the resistor changes sign. Our new method for definition overcomes this problem, in the resistor as well as more sophisticated devices. The generalization of our approach should be adopted for flicker noise, replacing the formulation in existing Verilog-A device models, and it should be used in all new models. Since Verilog-A is the de facto standard language for compact modeling, it is critical that model developers use the correct formulation. [ABSTRACT FROM AUTHOR]

Silicon–carbon (SiC) strained nMOSFETs with sub-35-nm gate length in a 40-nm CMOS technology can realize superior cutoff frequency ($f_{T}$) up to 405 GHz, attributed to more than 20% enhancement of the mobility and transconductance. This super-400-GHz $f_{T}$ makes SiC strained nMOS an attractive high mobility device aimed at millimeter-wave (mm-wave) CMOS circuits design. However, the SiC nMOSFETs reveal a dramatic increase in flicker noise and random telegraph noise (RTN), which may cause worse phase noise and detrimental impact on CMOS oscillator stability. The complex RTN features abnormally long capture and emission time constants ($\tau _{c}$ and $\tau _{e}$) and suggests electron-phonon coupling responsible for the anomalously slow trapping and detrapping, due to a significant increase of relaxation energy from SiC strain. This critical tradeoff between high-frequency performance and low-frequency noise becomes a key factor to be considered for the most appropriate adoption of high mobility devices and design optimization adapted to various circuits. [ABSTRACT FROM AUTHOR]

In this paper, a novel circuit method is proposed to reduce 1/f3 (close-in) phase noise in a cross-coupled LC Voltage Control Oscillator (VCO) by suppressing flicker noise power of the tail transistor. Using an added resistor between drain and gate of the tail transistor, that works as a negative feedback, the tail transistor flicker noise is suppressed, and therefore, the 1/f3 output phase noise is reduced by 5.7 dB. Also, the added resistor helps in better tail current shaping for phase noise reduction. The proposed oscillator is designed in a 0.18 μ m CMOS technology with 1.8 V supply and 3.6 mW power consumption. Post-layout simulations predict a phase noise of − 1 0 4 dBc/Hz for the proposed oscillator at 100 KHz offset from 3.1 GHz carrier frequency. Mathematical analysis is included in the paper for confirmation of the phase noise performance enhancement. The Figure of Merit (FOM) of the proposed oscillator is 188.3 and 190.6 dBc/Hz at 100 KHz and 1 MHz offsets, respectively. [ABSTRACT FROM AUTHOR]

A developed method and measurement setup for measurement of noise generated in a supercapacitor is presented. The requirements for noise data recording are considered and correlated with working modes of supercapacitors. An example of results of low-frequency noise measurements in commercially available supercapacitors are presented. The ability of flicker noise measurements suggests that they can be used to assess quality of tested supercapacitors.

Multiple-mesa-fin-channel array patterned by a laser interference photolithography system and gallium oxide (Ga2O3) gate oxide layer deposited by a vapor cooling condensation system were employed in double-channel Al0.83In0.17N/GaN/Al0.18Ga0.82N/GaN heterostructured-metal-oxide-semiconductors (MOSHEMTs). The double-channel was constructed by the polarized Al0.18Ga0.82N/GaN channel 1 and band discontinued lattice-matched Al0.83In0.17N/GaN channel 2. Because of the superior gate control capability, the generally induced double-hump transconductance characteristics of double-channel MOSHEMTs were not obtained in the devices. The superior gate control capability was contributed by the side-wall electrical field modulation in the fin-channel. Owing to the high-insulating Ga2O3 gate oxide layer and the high-quality interface between the Ga2O3 and GaN layers, low noise power density of 8.7 × 10−14 Hz−1 and low Hooge’s coefficient of 6.25 × 10−6 of flicker noise were obtained. Furthermore, the devices had a unit gain cutoff frequency of 6.5 GHz and a maximal oscillation frequency of 12.6 GHz.

Surface acoustic wave (SAW) sensors for the detection of magnetic fields are currently being studied scientifically in many ways, especially since both their sensitivity as well as their detectivity could be significantly improved by the utilization of shear horizontal surface acoustic waves, i.e., Love waves, instead of Rayleigh waves. By now, low-frequency limits of detection (LOD) below 100 pT/Hz can be achieved. However, the LOD can only be further improved by gaining a deep understanding of the existing sensor-intrinsic noise sources and their impact on the sensor’s overall performance. This paper reports on a comprehensive study of the inherent noise of SAW delay line magnetic field sensors. In addition to the noise, however, the sensitivity is of importance, since both quantities are equally important for the LOD. Following the necessary explanations of the electrical and magnetic sensor properties, a further focus is on the losses within the sensor, since these are closely linked to the noise. The considered parameters are in particular the ambient magnetic bias field and the input power of the sensor. Depending on the sensor’s operating point, various noise mechanisms contribute to f0 white phase noise, f−1 flicker phase noise, and f−2 random walk of phase. Flicker phase noise due to magnetic hysteresis losses, i.e. random fluctuations of the magnetization, is usually dominant under typical operating conditions. Noise characteristics are related to the overall magnetic and magnetic domain behavior. Both calculations and measurements show that the LOD cannot be further improved by increasing the sensitivity. Instead, the losses occurring in the magnetic material need to be decreased.

In this brief, we propose an active mixer based on a modified Gilbert-cell topology intended for radar applications, which uses an LO waveform shaper at mm-wave frequencies to decrease the high 1/f noise of MOS transistors. Compared to a reference mixer without an LO waveform shaper, measurement results show that this mixer achieves a significant 5 dB noise figure (NF) reduction at 100 kHz. The measured voltage conversion gain (CG) and input-referred 1-dB compression point (IP1dB) are 2 dB and −4 dBm, respectively. The core of the proposed modified Gilbert-cell draws 13 mA from a single 0.9-V supply, while it occupies an area of 0.5 mm $\times $ 0.94 mm. Additionally, an IF buffer drawing 12 mA has been added to drive a 50 $\Omega $ load for measurement purposes. To the best of author’s knowledge, we apply the principle of switched biasing for 1/f noise reduction of an active mixer at mm-wave frequencies for the first time. [ABSTRACT FROM AUTHOR]

In this paper, we examine the origins of bias instability in three-axis, mode-matched MEMS gyroscopes. Reducing this drift phenomenon is crucial for highly accurate navigation in applications, such as automated driving or indoor localization. We show that for a typical MEMS gyroscope, bias instability noise becomes the dominant orientation error component after less than 10 s of integration time. A model-based approach summarizing the most common sources of zero-rate offset is combined with a detailed experimental analysis. We find naturally occurring flicker noise acting on the frequency tuning electrodes to be the dominant source of bias instability for the in-plane axis. By controlling the frequency tuning state, we establish an unprecedented value for bias instability of an automotive-type MEMS gyroscope of lower than 0.1 dph—more than a factor 10 improvement from its performance in ordinary operation. Furthermore, we analyze the so far sparsely studied effect of scale-factor instability, which is an increase of drift that scales with applied angular rate. This phenomenon is particularly important for applications, where high angular rates are common, such as dead-reckoning with smart-phones. As out-of-plane MEMS gyroscopes are significantly more challenging to manufacture, their performance has been studied much less. The out-of-plane axes in this paper are shown to exhibit a complex composition of bias instability sources with a total level as low as 0.7 dph. The presented gyroscopes were furthermore designed for ultra-low white noise. The angle random walk (ARW) is lower than 2.5 md/s/rtHz in all three axes. [2018-0165] [ABSTRACT FROM AUTHOR]

In this paper, we propose a novel compact statistical model for the low-frequency noise (LFN) of MOS devices with halo implants. The compact model is suited for the incorporation in modern models, such as BSIM, PSP, and EKV, and can be used to predict the dependence of the LFN of halo-implanted MOSFETs with bias, temperature, geometry, and technological parameters. This compact model is based on the physics-based random telegraph noise (RTN) model, previously published by our group. The previous model was simplified in analytical expressions dependent on parameters and on physical quantities already calculated in modern compact models. Following the physics-based model, the LFN compact model predicts the large bias dependence of the LFN statistics induced by the halo implants in long-channel devices. Moreover, we show for the first time that the halo implants also induce a large temperature dependence of the LFN statistics for devices operated near the weak inversion or saturation, and the proposed compact model predicts this dependence. [ABSTRACT FROM AUTHOR]