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A network was characterized by its viscoelastic properties. The viscoelastic property indicates the deformations or changes in the shape and in the internal structure during the evolution of a network. The change in the direction of motion was taken as elastic deformation and the change in the vertical direction as viscous deformation. These deformations were related to the change of geometry of internal structure and of shape. Thus it was possible to characterize a network by its storage and loss moduli. The change of the structure of a network during its evolution changes also its entropy. However entropy depends on the number of microstates of an already existing framework. As examples, two different systems (i) New York Stock Exchange and (ii) a melody were studied for their viscoelastic properties. The change of viscous property was compared with the change of different types of entropies such as configurational entropy, crossing entropy, and topological entropy. This last entropy was introduced and explained in the text. It was found out that there is no direct correspondence between the increase of entropy and the increase of viscous property of a network although they sometimes correlate with each other. [ABSTRACT FROM AUTHOR]

Current studies of "messy" broadcasting have so far concentrated on finding worst-case times. However, such worst-case scenarios are extremely unlikely to occur in general. Hence, determining average-case times or tight upper bounds for completing "messy" broadcasting in various network topologies is both necessary and meaningful in practice. In this paper, we focus on seeking the average-case "messy" broadcast times of stars, paths, cycles, and d-ary trees, and finding good upper bounds for hypercubes. Finally, we derive a recursive formula to express the average-case time for a specific "messy" broadcast model on a complete graph using a classical occupancy problem in probability theory, and provide a nice simulation result which indicates that this model behaves like classical broadcasting. [ABSTRACT FROM AUTHOR]

This paper investigates the influence of the interconnection network topology of a parallel system on the delivery time of an ensemble of messages, called the communication scheme. More specifically, we focus on the impact on the performance of structure in network topology and communication scheme. We introduce causal structure learning algorithms for the modeling of the communication time. The experimental data, from which the models are learned automatically, is retrieved from simulations. The qualitative models provide insight about which and how variables influence the communication performance. Next, a generic property is defined which characterizes the performance of individual communication schemes and network topologies. The property allows the accurate quantitative prediction of the runtime of random communication on random topologies. However, when either communication scheme or network topology exhibit regularities the prediction can become very inaccurate. The causal models can also differ qualitatively and quantitatively. Each combination of communication scheme regularity type, e.g. a one-to-all broadcast, and network topology regularity type, e.g. torus, possibly results in a different model which is based on different characteristics. [ABSTRACT FROM AUTHOR]

For exploiting the inherent parallelism enclosed in System-on-Chip designs, special architectural prerequisites have to be met. These prerequisites mainly affect the communication infrastructure, as parallel processing of all hardware modules accounts for a continuous and sufficient provision of data. While traditional communication architectures may fulfill these requirements for a fixed System-on-Chip design, changing composition, number and locations of processing modules in runtime reconfigurable System-on-Chips require new communication paradigms. Special communication architectures especially for use in runtime reconfigurable System-on-Chip designs are presented in this article. Their analysis provides a basis for the design of CoNoChi, a runtime reconfigurable Network-on-Chip dedicated for the usage in FPGA-based designs. CoNoChi supports the adaptation of the network topology during runtime by providing mechanisms to add or remove switches from the network during runtime without stopping or stalling the network. The applicability of CoNoChi is shown on the basis of a complex runtime reconfigurable System-on-Chip for networking applications. Prototyping results demonstrate that CoNoChi is a promising alternative to existing communication architectures supporting both a high degree of adaptability during runtime and a high concurrency of data transfers. [ABSTRACT FROM AUTHOR]

Secured communication in mobile ad hoc network is a crucial issue due to dynamic nature of the network topology. Due to lack of centralized control, issuing certificates from a centralized certification agent is not possible in ad hoc network. The major problem in providing security services in such infrastructure-less networks is how to manage the cryptographic keys that are needed. In MANET any node may compromise the packet routing functionality by disrupting the route discovery process. These unique characteristics of mobile ad hoc networks such as open network architecture, shared wireless medium, stringent resource constraints and highly dynamic topology cause a number of nontrivial challenges to security design. These challenges make a cause for building multi-fence security solution that achieves both extensive protection and desirable network performance. In particular, the absence of a central authorization facility in an open and distributed communication environment is a major challenge, especially due to the need for cooperative network operation. We propose a novel cluster based security scheme to protect mobile ad hoc network link layer and network layer operations of delivering packet over the multihop wireless channel. The dynamic network topology can be managed efficiently by the proposed cluster based architecture. A well-behaving node becomes a cluster member after the initial trust verification process. The membership validity period of a node depends on how long it has stayed and behaved well. Non-overlapping clusters are created using the dynamic cluster creation algorithm. The cluster construction is fully distributed so efficiency is not degraded by node mobility. [ABSTRACT FROM AUTHOR]

Testing equivalence is a quite powerful way of expressing security properties of cryptographic protocols, but its formal verification is a difficult task, because it is based on universal quantification over contexts. A technique based on state exploration to address this verification problem has previously been presented; it relies on an environment-sensitive labelled transition system (ES-LTS) and on symbolic term representation. This paper shows that such a technique can be enhanced by exploiting symmetries found in the ES-LTS structure. Experimental results show that the proposed enhancement can substantially reduce the size of the ES-LTS and that the technique as a whole compares favorably with respect to related work. [ABSTRACT FROM AUTHOR]

A method of using hypercomplex numbers for the analysis of linear electric circuits with nonsinusoidal voltages and currents has been proposed. Similar to the complex number method for circuits with sinusoidal voltages and currents, the proposed method reduces the analysis of nonsinusoidal circuits to the analysis of direct-current circuits. A special system of hypercomplex numbers, called hypernions, has been created in order to obtain a new efficient method for analyzing nonsinusoidal networks. This system is interesting in that it expands the concept of numbers and attaches meaning to equations and transformations involving discontinuous functions and makes it possible to describe various non-Euclidean spaces. It is shown that the proposed method of analysis of linear nonsinusoidal electric networks makes it possible to carry out numerical calculations for complex circuits by using standard software. [ABSTRACT FROM AUTHOR]

In refined network analysis, a compact network model is combined with distributed models for semiconductor devices in a multiphysics approach. For linear RLC networks containing diodes as distributed devices, we construct a mathematical model that combines the differential-algebraic network equations of the circuit with elliptic boundary value problems modeling the diodes. For this mixed initial-boundary value problem of partial differential-algebraic equations a first existence result is given. [ABSTRACT FROM AUTHOR]

For a system to display bistable behavior (or hysteresis), it is well known that there needs to be a nonlinear component and a feedback mechanism. In the Chua circuit, nonlinearity is supplied by the Chua diode (nonlinear resistor) and in the physical medium, feedback would be inherently present, however, with standard computer models this feedback is omitted. Using Poincaré first return maps, bifurcations for a varying parameter in the Chua circuit equations are investigated for both increasing and decreasing parameter values. Evidence for the existence of a small bistable region is shown and numerical methods are applied to determine the behavior of the solutions within this bistable region. [ABSTRACT FROM AUTHOR]

Several existing studies have revealed that pipelined circuit switching (or PCS for short) can provide superior performance characteristics over wormhole switching. This paper proposes a new analytical model for PCS in high-radix highdimensional k-ary n-cubes augmented with virtual channel support. The model uses Random Walk Theory to analyse the backtracking actions of the message header during the path set-up phase, and M/G/1 queueing systems to compute the mean waiting time that a message experiences at a source node before entering the network. Results from simulation experiments confirm that the proposed model exhibits a good degree of accuracy for various network sizes and under different operating conditions. [ABSTRACT FROM AUTHOR]