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The power losses, current and voltage stresses in semiconductor devices in voltage source transformerless multilevel inverters (VSTMLIs) topologies are unequal, depending on the switching states, the duty ratio, the levels of output voltage, the load power factor and the depth of modulation index. Non-uniform power loss profiles mean both unequal junction temperature and power rating in semiconductors. In this study, a comparison of power losses, current and voltage stresses in semiconductors of VSTMLIs is performed. Initially, the structural characteristics and operating principles of dominant VSTMLIs with sinusoidal pulse width modulation are analysed. Then, modifications of existing VSTMLIs and simplified multilevel topologies are proposed, which achieve a further reduction in switch count and power losses in semiconductors. The proposed modified circuitries are suitable for converting existing four-level VSTMLI topologies into five-level ones. This conversion is desirable, when a zero output voltage level under no-load conditions or low modulation indices should be obtained. Power losses in semiconductors are calculated analytically and then confirmed by simulation. A comparative presentation of profiles of power losses, current and voltage stresses in semiconductors of the examined VSTMLIs is analytically carried out. The obtained results are valuable for sizing and selecting the semiconductors in VSTMLIs. [ABSTRACT FROM AUTHOR]