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Abstract The inhomogeneous native oxide shells on the surfaces of III–V group semiconductors typically yield inferior and unstable electrical properties metrics, challenging the development of next‐generation integrated circuits. Herein, the native GaOx shells are profitably utilized by a simple in‐situ thermal annealing process to achieve high‐performance GaSb nanowires (NWs) field‐effect‐transistors (FETs) with excellent bias‐stress stability and synaptic behaviors. By an optimal annealing time of 5 min, the as‐constructed GaSb NW FET demonstrates excellent stability with a minimal shift of transfer curve (ΔVth ≈ 0.54 V) under a 60 min gate bias, which is far more stable than that of pristine GaSb NW FET (ΔVth ≈ 8.2 V). When the high bias‐stress stability NW FET is used as the chargeable‐dielectric free synaptic transistor, the typical synaptic behaviors, such as short‐term plasticity, long‐term plasticity, spike‐time‐dependent plasticity, and reliable learning stability are demonstrated successfully through the voltage tests. The mobile oxygen ion in the native GaOx shell strongly offsets the trapping states and leads to enhanced bias‐stress stability and charge retention capability for synaptic behaviors. This work provides a new way of utilizing the native oxide shell to realize stable FET for chargeable‐dielectric free neuromorphic computing systems.

One of the emerging paradigms to resolve pressing issues of modern computing electronics, such as limits in miniaturization and excessive energy consumption, takes inspiration from the biological brain and is therefore expected to display some of its properties, such as energy efficiency and effective learning. Moreover, one of the brain's remarkable properties is its ability to process complex information by resolving it on different timescales. In synapse‐emulating artificial devices, some form of memory (e.g., hysteresis in current–voltage characteristics) is required. One of the important characteristics of biological synapses is the coexistence of short‐ and long‐term memory, also called plasticity. However, a broader exploration of memory at multiple timescales in materials remains limited. Herein, the first example of synaptic transistors utilizing colloidal quantum dots (CQDs) as active material is reported. It is demonstrated that PbS‐CQDs, with metal halide and perovskite‐like ligands, are ideal as an active material for synaptic transistors exhibiting both short‐ and long‐term plasticity. Most interestingly, by changing the chemistry of the quantum dot outer monolayer, a drastic change in the temporal response of the learning is observed, demonstrating the possibility of engineering materials exhibiting learning at multiple timescales, similar to the biological synapses.

Nociceptors are kinds of sensory neurons that send warning information to the central nervous system in response to noxious stimuli. Thermal nociception happens as the thermal stimulus exceeds 45 °C as this temperature is perceived to be potentially harmful. Simulating this function is of great significance to developing bioinspired electronic skins and humanoid robots, which thus creates more demands for electronic devices that can simulate thermal nociception. Herein, an artificial thermal nociceptor (ATN) is fabricated by integrating a temperature sensor and a synaptic transistor, which can simulate the thermal pain threshold of the human body and operates in a very similar way as the transient receptor potential vanilloid 1 (TRPV1). For this ATN, the function of temperature sensing is realized by a graphite–polydimethylsiloxane (Gr–PDMS) composite temperature sensor, and the synaptic functions, as well as nociceptor features, are emulated through a synaptic transistor using xanthan gum polysaccharide electrolyte as gate dielectric, providing energy‐efficient building blocks for brain‐inspired computation systems. In a word, the ATN proposed can help to open a new avenue and provides more possibilities in the design of artificial sensory systems with the functions of temperature perception and thermal feedback.

Abstract Three‐terminal synaptic transistor has drawn significant research interests for neuromorphic computation due to its advantage of facile device integrability. Lately, bulk‐heterojunction‐based synaptic transistors with bipolar modulation are proposed to exempt the use of an additional floating gate. However, the actual correlation between the channel's ambipolarity, memory characteristic, and synaptic behavior for a floating‐gate free transistor has not been investigated yet. Herein, by studying five diketopyrrolopyrrole–benzotriazole dual‐acceptor random conjugated polymers, a clear correlation among the hole/electron ratio, the memory retention characteristic, and the synaptic behavior for the polymer channel layer in a floating‐gate free transistor is described. It reveals that the polymers with balanced ambipolarity possess better charge trapping capabilities and larger memory windows; however, the high ambipolarity results in higher volatility of the memory characteristics, namely poor memory retention capability. In contrast, the polymer with a reduced ambipolarity possesses an enhanced memory retention capability despite showing a reduced memory window. It is further manifested that this enhanced charge retention capability enables the device to present artificial synaptic characteristics. The results highlight the importance of the channel's ambipolarity of floating‐gate free transistors on the resultant volatile memory characteristics and synaptic behaviors.

In biological synapses, short‐term plasticity is important for computation and signal transmission, whereas long‐term plasticity is essential for memory formation. Comparably, designing a strategy that can easily tune the synaptic plasticity of artificial synapses can benefit constructing an artificial neural system, where synapses with different short‐term plasticity (STP) and long‐term plasticity (LTP) are required. Herein, a strategy is designed that can easily tune the plasticity of crystallized conjugated polymer nanowire‐based synaptic transistors (STs) by low‐temperature solvent engineering. Essential synaptic functions are achieved, such as excitatory postsynaptic current (EPSC), paired‐pulse facilitation (PPF), spike‐frequency‐dependent plasticity (SFDP), spike‐duration‐dependent plasticity (SDDP) and spike‐number‐dependent plasticity (SNDP), and potentiation/depression. The balance between crystallinity and roughness is successfully adjusted by altering solvent compositions, and plasticity of the synaptic device is easily tuned between short term and long term. The evident transition from STP to LTP, good linearity and symmetry of potentiation and depression, and the broad dynamic working range of synaptic weight are achieved. This provides a facile way to tune synaptic plasticity at low temperatures and is applicable to future organic and flexible artificial nervous systems.