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The increasing permeation of the distributed generators in the power system brings great challenges for fault diagnosis, especially for the distribution networks with ungrounded neutral or grounded by Peterson coil as the fault current is limited and easily affected by the noises and interferences. A single phase‐to‐ground fault section identification method is proposed based on feature extraction of the synchronous waveforms and the calculation of the eigenvalues for the time‐sequenced features. First, several fault features are defined and extracted from the synchronous current waveforms obtained by the fault recorders. Then, the topology related fault feature matrix is constructed using the time‐series features obtained from different measurement sites, and the eigenvalues of the matrix are calculated based on the random matrix theory. Lastly, using the distribution characteristics of the eigenvalues, improved K‐means clustering algorithm is utilised in classifying the fault cases and identifying the faulty sections. The effectiveness of the proposed scheme is verified by IEEE 34 nodes test system and a multi‐feeder distribution network.

Short circuit fault occurrence in high-voltage DC (HVDC) systems causes extremely high currents in a fast raising time that does not experience current zero-crossing. To protect HVDC systems/grids against fault current, fast HVDC breaker is an essential equipment. This study presents the design procedure of a novel HVDC breaker based on solid-state controllable reactor which is able to reduce the fault current's rate of rise and fault current amplitude to less than grid nominal current in the breaking process. The main achievement of the proposed HVDC breaker is that not only breaker does not encounter fault current, but also none of the series HVDC equipment is influenced by the fault. The designed breaker performance is studied by PSCAD/EMTPS, and then the simulation results are validated by the developed laboratory experimental setup.

Impedance-based algorithms commonly used for determining the fault location in transmission lines are prone to several sources of error and are specific to the line and system configuration. Furthermore, these algorithms do not utilise available valuable information about the power system surrounding the faulted line. These issues can be overcome using a model-based fault location (MBFL) approach. It uses a circuit model to simulate possible fault scenarios and compares the simulated fault currents with the measured currents recorded by the relay to identify the fault location. However, there are several difficulties and limitations while applying MBFL. There is a loss in accuracy and precision based on the number of simulated scenarios and a requirement to store voluminous simulation results. Hence, this study presents a novel application technique for implementing model-based approach efficiently to estimate the fault location and fault resistance using artificial neural networks-based approach. A key highlight of the proposed approach is the ability to identify the location of a fault present on neighbouring lines using the measured through fault current. The study also presents representative scenarios to demonstrate the capability and potential of the proposed approach.

The article proposes a mechanical DC circuit breaker (CB) based on a series LC circuit. It requires two switches (a fast disconnector and an AC circuit breaker), an inductor and a capacitor, and therefore the cost is expected to be low. A series LC circuit is analysed and it is concluded that fault current will always have natural zero-current crossings which enable use of simple AC CBs. The current commutation into a capacitor is investigated since this is important for successful operation. A number of analytical conditions are derived for the voltage stress across disconnector contacts which enable arc-less contact opening. Experimental results on a 900 V laboratory prototype LC DC CB illustrate successful DC fault clearing, with commutation of 130 A and peak DC current of 190 A. A detailed PSCAD model for 320 kV LC DC CB is developed and DC fault clearing is evaluated in order to understand the possible benefit for high-voltage direct current applications. Further comparisons with the commercialised hybrid DC CB and mechanical DC CB on 320 kV system illustrate some benefits in terms of performance and simplicity. The mechanical LC DC CB operates very fast because of early capacitor insertion, and this results in low peak current and energy dissipation.

The 110 V lead-acid battery pack is widely used as the DC power supply for the load control of power plants. If the low-voltage DC circuit breaker (LVDCCB) at the DC side of its charging device cannot operate in time when the fault current is flowing in charging loop, there will be of harmfulness to the safety and the durability of the battery pack. The plasma theory is applied to analyse the arc mechanism based on the voltage, the current and the power waveform of LVDCCB when it breaking. Then, an arc extinction is developed by assembling an additional device to LVDCCB. The device, connected to the contacts of LVDCCB, includes an insulated-gate bipolar transistor series branch, an energy-absorbing branch, a transfer switches branch, and a drive circuit. The test shows that the break time of LVDCCB, assembled with the additional device, is significantly shortened than that of the original.

This study presents a study on the time when the short-circuit fault current in an MV distribution network will cross the zero point in the presence of DC offset affected by the local synchronous and/or induction machines. The motivation of the study is to examine using thyristors to bypass a series compensator in the network while the subsequent turning-off of the thyristors depends on the zero-crossing of the current. One of the main uncertainties is the DC offset in the fault current due to the machines connected locally, which may defer the thyristor turning-off. This possibility has been examined in this study and the results demonstrate the parameters of the machines that have most influence on the time when the fault current will pass the zero point. It is shown that machines with higher unit ratings usually cause more delays in comparison with smaller units.

The dc transmission line protection plays a crucial role in the secure operation of a multi-terminal modular-multilevel-converter-based high-voltage direct current (MMC–MTDC) system, which is increasingly adopted as a promising option in the power transmission fields. However, the MTDC is the most vulnerable to a dc fault, which paralyses all of the MMCs until the dc fault is cleared out. It is a huge challenge that how to locate and isolate dc fault current and ensure the continuous operation of the healthy part of the MMC–MTDC system under dc faults. This study proposes a least-squares-based ɛ-support vector regression scheme, which captures fault features via the Hilbert–Huang transform. Fault features are used as the inputs of ɛ-support vector regression to obtain fault distance. Then, least-squares method is utilised to optimise the parameters of the model so that it can meet the demand on fault location for MMC–MTDC transmission lines. In the end, the simulation model of the multi-terminal MMC–HVDC system using PSCAD/EMTDC is built to demonstrate that the proposed method has well reliability and accuracy for fault location.

High-voltage direct current (HVDC) grids have been assumed as a promising technology for its advantages in accommodation and integration of large-scale renewable energy. However, the fault current increases dramatically once the fault occurs in HVDC grids, which makes great difficulty in fault clearance. Therefore, it is necessary to take some measures to limit the fault current. A bidirectional solid current-limiter (BSCL) topology is proposed. The BSCL can improve the performance of inductors to limit DC fault currents through the high-frequency switching between two current-limiting branches. Besides, the BSCL can be installed at both ends of a DC transmission line or between a converter and a DC bus. The feasibility of the proposed topology is demonstrated in power systems computer-aided design/electro-magnetic transient design and control. Simulation results indicate that the BSCL can effectively limit the rising speed and the amplitude of short-circuit currents, decrease the maximum breaking currents of DC breakers and improve the breaking speed of DC breakers.

As a key element of the DC grid, the technology of DC circuit breakers (DCCBs) still have difficulty to be widely used due to its large cost and volume. This paper studies the basic principle and its realisation methods for DCCBs. First, two basic ways of breaking the fault current are discussed, including the way by inserting a metal oxide varistor (MOV) to force the fault current to zero and the way by inserting capacitor to change the nature of the fault current. Second, a new approach to realise the DCCB has been proposed based on the inserting capacitor way. According to this new approach, three topologies of DCCB are proposed, including the single-branch DCCB with inserted capacitor (SB-DCCB-C), the double-branch DCCB with inserted capacitor (DB-DCCB-C) and the triple-branch DCCB with inserted capacitor (TB-DCCB-C). All these three DCCBs are proved to be able to deal with DC faults effectively according to the simulation results in PSCAD/EMTDC. Finally, the economy of four circuit breaker structures are compared.

The presence of distributed generation (DG) in a power distribution network can cause difficulties in managing the voltage, power flow and fault level as the network was designed for supplying passive loads. This study focuses on the control of a back-to-back (B2B) voltage source converter operated as a synchronverter and a soft open point (SOP) between adjacent feeders to mitigate the voltage fluctuation caused by DG and to increase the reliability of the supply without increasing the fault level. Better reliability is achieved as the B2B converter can continue to supply the loads when a loss of mains occurs on one side. The proposed control of the two DC–AC converters, which also needs to regulate the DC link voltage and adapts the synchronverter algorithm to the new application requirements, so that events will cause minimum disruption. Simulation shows that the B2B-synchronverter is capable of regulating the load voltage under normal mains connected condition, and also limiting the fault current and supplying the loads within its rating during islanding, providing seamless transition to the islanded mode.

The DC microgrid has become a typical distribution network due to its excellent performances. However, a well-designed protection scheme still remains to be a challenge for DC microgrids. This paper proposes a fault distance estimation-based protection scheme for DC loop-type microgrids relying on two-terminal electrical quantities. Different from the traditional methods, a small inductor is implemented at each head of the line instead of obtaining the derivative of fault current using current difference value. Thus, the derivative of currents can be calculated accurately with the measured voltages on the small inductors during faults. The presented protection method is able to realise fault location and fault isolation quickly and accurately. Furthermore, it is immune to fault resistances. The presented protection scheme has been tested and verified through PSCAD/EMTDC simulations. The results prove that the new protection scheme possesses the excellent performance.

With the advantage of saving resources and high utilisation, DC transmission becomes the vital part of the sustainable development. However, due to the control strategies of grid-side inverter, the fault characteristics of the grid will change dramatically, which influences the reliability of grid protection. By establishing the model in PSCAD, the fault characteristics of the inverter was obtained and the effects on current protection was analysed here. The results reveal that the magnitude of fault current was directly influenced because of being connected with the inverter. The grid inverter can make a difference in selectivity and reliability of current protection. In order to solve this problem, the paper constructs the equivalent model of the inverter and attains the unique feature that the fault component impedance measured in the location of protection decreases with the increasing distance of fault location. According to the characteristics, a targeted fault component impedance protection is designed. The feasibility and effectiveness of this protection is verified by simulation in PSCAD model.

Traditional directional relays of AC transmission lines are usually based on 50 Hz information in frequency domain in China. However, this conventional approach cannot provide the correct fault direction for the lines connected to wind farm because of the fault characteristics of the wind power system, that is, frequency deviation, variation of system impedance, weak feed feature, and so on. Then, the conventional approach of finding the phase angle between the fault current and a voltage signal will not identify the correct fault direction. To solve this problem, this paper proposes a novel fault direction identification method in time domain. Based on the RL model of transmission lines, opposite-side voltages of the line can be derived with the measuring current and voltage at wind farm terminal after the fault. Then, the adjusted cosine similarity between the calculation voltage based on the RL model and the memory voltage can be acquired. If the correlation between the calculation voltage and the memory voltage is close to 1, it is a reverse fault. Otherwise, it is a forward fault. Finally, the proposed novel fault direction identification criterion is verified by the PSCAD/EMTDC-based simulation results.

A wavelet-based electromagnetic time reversal method for locating faults in voltage source converter-high-voltage direct current (VSC-HVDC) transmission lines is proposed in this study. This principle, firstly, is to use wavelet decomposition to filter the 1-mode fault currents, which are recorded at ends of the transmission line. Secondly, the filtered currents are mirrored on time axes, which called time reversal. Thirdly, the time-reversed currents are set as current sources at ends of the lossless mirror lines. Through assuming a fault at each point of line, the assumed fault currents are calculated, and the RMS of fault current at actual fault location is maximal according to a strict scientific proof. Theoretically, the Wavelet-based Electromagnetic Time Reversal (WEMTR) method is robust against fault types and resistance. A multilevel converter-HVDC system is established in Power Systems Computer-Aided Design (PSCAD)/Electromagnetic Transients including DC (EMTDC) to verify the feasibility of the proposed method, and the transmission line is simulated by frequency independent phase model. The results show that, the fault location can be calculated exactly without high sampling rates.