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[ILLUSTRATION OMITTED] There are many reasons to consider outsourcing all or part of a chip design. Perhaps you are on a board-level-design team, and the correct approach to your new [...]

In simpler times, FPGA power consumption was a simpler issue. In the traditional applications of high-capacity FPGAs, such as expensive network routers, telecommunications switching gear, and prototype boards for ASIC [...]

It was a shimmering promise on the horizon: As SOCs (systems on chips) became more complex, we would simply move from RTL (register-transfer level) to the next-higher level of abstraction--what [...]

A challenge that often confronts IC designers and support engineers is creating realistic data-channel models and accurately simulating signal transmission through them. Spice models of connectors, vias, and transmission lines [...]

[ILLUSTRATION OMITTED] The SOC (system-on-chip) began life in the image of the board-level computers that preceded it: as a central processor that a CPU bus connected to local memory and [...]

It is a well-publicized trend that HDTV (high-definition TV) is sweeping through the next generation of SoC (system-on-chip) platforms. SoCs for set-top boxes, television monitors, disk players, and--in the near [...]

Increasingly, ICs require embedded NVM (nonvolatile memory). The popularity of consumer appliances such as MP3 players--with their asSoCiated need for digital-rights management--and security considerations, for example, drive this trend. At [...]

One of the most common tasks in analog circuit design is measuring current. A current sense circuit often resides at the heart of power and battery-life management, bias current control, [...]

One of the most common tasks in analog circuit design is measuring current. A current sense circuit often resides at the heart of power and battery-life management, bias current control, [...]

Over the last three years, IC-power management has moved from a third-order to a first-order concern for chip designers, especially those designing ASICs and SOCs (systems on chips) for portable-system [...]

One of the intended consequences of universal-power-supply designs--those that accommodate inputs from 100V ac or less to 240V ac or more--is that the power-management circuits become source-independent and the designer [...]

SEMICONDUCTOR DATA SHEETS have changed a lot in the last few years, including growing from 10 pages to a hundred. The problem is that data sheets contain almost too much [...]

ESD (ELECTROSTATIC DISCHARGE) is a major cause of electronic-device failure that can affect the functioning of an electronic device at any stage--from manufacturing, to testing, assembly, production, field operation, and [...]

DESIGNS THAT INCORPORATE backplanes and interconnects operating at greater than 1 Gbps require accurate Spice and IBIS (I/O-buffer-information) models. At such speeds, these interconnects appear to be complex, often distributed [...]

Hysteretic current-mode control has many advantages over constant-frequency control, including stability, inherent load-current limiting in a buck topology, and an instantaneous response to load-current changes. Since the first current-mode control [...]

PC-based Electronic Design Automation (EDA) tools are approaching the functionality of workstation-based tools, but these tools are lower priced. To choose an EDA software package it is necessary to balance the need for speed and leading-edge technology offered by Unix and workstations against the lower costs of PC-based programs. Most companies offering PC EDA tools provide free demonstration software that will help in this evaluation. This software will generally provide a good idea of the program's functionality, but will not enable the user to enter design data. Some companies also offer software with just a few limitations, such as the inability to save or print, for a nominal fee and include the documentation. A buyers' guide compares the available products of more than 80 vendors.

While solving today's system-packaging puzzles, you can design products that are not only smaller but more reliable. While solving today's system-packaging puzzles, you can design products tha are not only [...]

The quest for higher integration levels in ASICs and competitive pressures to reduce system manufacturing costs has driven IC manufacturers to improve package capabilities and develop new methods. This article [...]

Although op amps are mature devices, many designers often ignore the effects of input capacitance on frequency stability. A bode plot analysis lets you add compensation capacitors to counteract poles [...]

Back when systems loafed along at 10-MHz clock speeds, designers could cure timing problems by using faster chips in trouble spots. They no longer have this easy way out--in today's [...]

A major reason for using switching regulators is to achieve high efficiency. Efficiency depends on many factors; to minimize wasted power, you must account for all of them. Effieiency is [...]

Purchasing a standard system rack and backplane can reduce the size of any initial design task significantly. However, the expense is often significant and may be prohibitive for low-cost systems. [...]

Electrical engineers must carefully choose operational amplifiers (op amps) for single-supply analog power designs and be aware of the proper methods for using them. Designers should choose amplifiers made specifically for single-supply design. This creates a more linear operation. Using these special op amps also increases the ranges of operation, of supply-power, of dynamics and of input and output. Because single-supply systems operate under more limited voltage ranges, such as 12V to 3 or 1.5V, designers' choice of single-supply op amps is smaller than dual-supply. Single-supply systems have the danger of possibly failing or malfunctioning if the amplifiers are overdriven below the negative rail, especially pnp inputs. To prevent overdrive, designers can use a Schottky diode to limit input voltage to 300 mV under the negative rail.

What's new in noise is the increasing number of engineers who have to deal with noise who didn't before. For example, two hot applications are fraught with new noise problems [...]

When attempting to find a path through a forest of complex op-amp feedback arrangements, you can lose your way amidst all the branches on the trees. Consolidating the branches into [...]

Through the first five articles in this ASIC-design series, I set up a design center; wrote, simulated, and debugged a VHDL behavioral model of the Z80 microprocessor; and synthesized the [...]

Current-feedback amplifiers have virtues unavailable in the traditional voltage-feedback design. To take full advantage of these virtues, you'll need to know the strengths and weaknesses of current-feedback amplifiers and techniques [...]

Designing optimal state machines depends on taking advantage of the architectural features of the device you're using. PLDs are usually best suited for encoded state-machine designs because of their register-sparse, [...]

Of all the difficulties associated with choosing and using high-density programmable logic, whether field programmable gate arrays (FPGAs) or complex PLDs, meeting speed goals is often at the top of [...]

There are three standard macromodels commonly used when designing analog circuits with operational amplifiers (op-amps). These models are intended for the engineer to compare different types of op-amps to determine which is most applicable for a certain application. Model 1, called the Boyle model and containing two transistors and ideal components, was the first model and remains the basis for others. Model 2 resembles model one but has no transistors. Model 3 comprises three transistors, decoupled components and folded ideal circuit blocks routed to power supply rails to avoid use of a physical ground within the macromodel. Comparison of the three models yields the general conclusion that model 1 is the fastest and the best choice for simple DC analysis. Model 2 provides accurate simulation in the time domain but ignores DC and supply currents. Model 3 has shortcomings but is suited for DC analysis.

The only firm spec logic designers have been able to get for FPGAs (field-programmable gate arrays) and HDPLDs (high-density programmable-logic devices) has been pricing. But in addition to dollars, logic [...]

Digital signal processing (DSP) microprocessors can provide cost-effective replacements for analog filters. They are also effective for implementing programmable and adaptive filters, but the finite word lengths of digital filters cause errors at the register level. Fixed-point filters reduce these problems and provide increased filter bandwidth, lower system costs, less power consumption and decreased board area. Digital filters are classified as finite impulse-response (FIR) or infinite impulse-response (IIR) filters. FIR filters are feed-forward networks, stable, have a simple structure and are easily protected from finite-word-length effects, but they need to be of a high order. IIR filters are both feed-forward and feedback networks, a structure that causes stability problems and recirculates finite-word-length errors. They generally meet specifications with a much lower-order design, which makes them the preferred choice. Instructions are presented for designing an IIR filter.

Design methodology, performance, and software tools should all influence you as you seek the right high-density PLD. But first you have to know the foundations of complex PLD and FPGA [...]

For large, high-speed digital ICs, physical layout can upset logic design goals, lengthening time-to-market. Doing your own place and route can shorten your design cycle. Is it time for you [...]

Tough, accurate, and affordable, silicon sensors are entering high-volume markets. And, entry into these markets promises to spur further improvements. High-powered DSP chips and powerful microcontrollers are still indebted to [...]

Using floorplanning tools to do a preliminary physical layout and predict interconnect delays lets you short-circuit the layout-and-resimulate loop. SOME IC-INDUSTRY EXPERTS SAY THE CAE market offers no good floorplanning [...]

FAST PROTOTYPING METHODS LET YOU get your circuit up and running, or at least ready for debugging, quickly. By having the necessary equipment inside your company, you get prototyping speed [...]

As equipment manufacturers strive to cram complex processors, denser memories, and high-capacity disk drives into workstations and high-performance desktop computers, the need to reduce power drain -- and heat generation [...]

Between small, general-purpose programmable logic devices (PLDs) and large field-programmable gate arrays (FPGAs) lies a little-known class of programmable logic: application-tailored PLDs. The right tailored device can encompass a design [...]

Part 1 of this 2-part hands-on design project (in the April 9 EDN) discussed the overall circuit and the schematic entry of this FPGA (field-pro-grammable gate array) design project. Pail [...]

More and more, reliability demands that EPROMs and EEPROMs be permanently soldered onto printed-circuit boards. Such demanding applications include vibration-proof construction for avionics, military, and aerospace projects. In addition, surface-mount [...]

Heisenberg's uncertainty principle states that you can't measure a physical event without somehow affecting that event. This principle holds true for CMOS circuits, but armed with the right analytical techniques [...]

Operational amplifier (op-amp) distortion in complex designs can be measured through selective amplification, which moderates rather than negates the limitations of signal generators and signal analyzers. Selective amplification separates distortion and test signals and makes the amplifier distortion signal dominant in the measurement, although it also reduces measurement bandwidth. The selective-amplification technique is demonstrated using a voltage-follower connection as an example. Making the op amp part of the measurement system causes the amplifier's bandwidth to limit resolution of higher-order distortion harmonics. Selective amplification and signal separation both work in inverting circuits, but the combination makes more demands on measurement bandwidth. The advantages of power-supply bootstrapping and selective amplification in specific circuit designs are described., The second Part of this 2-part series describes bow to measure the distortion of more complex amplifier circuits and bow to handle the highest-performance op amps. Selective amplification offers an [...]

Operational amplifier (op-amp) distortion becomes more important with the increased use of the fast Fourier transform (FFT). Distortion produced by an op amp creates erroneous Fourier components; op-amp distortion must be characterized to predict these error components, but the distortion often surpasses that of available test equipment. This can be solved by making the amplifier-under-test part of the test system, which works for op amps and other feedback amplifiers. Amplifier distortion is reduced to minute levels at its output by feedback, which also separates amplifier distortion from the test signal. The distortion signal is insensitive to any distortion in the incoming test signal once it is separated, and the separated signal's reduced magnitude in turn reduces the dynamic range that must be handled by the test equipment. Three techniques for distortion measurement are described: direct signal separation, selective distortion amplification, and bootstrapping of the op amp's power supplies on the test signal itself; direct measurement and selective amplification are discussed in part one, while part two discusses selective amplification and bootstrapping., Part 1 of this 2-part series introduces the theory involved in measuring the low distortion levels of state-of-the-art op amps. It also provides simple methods for characterizing some low-distortion op [...]

Engineers are rarely provided with incentives for including testability in their circuit designs, and many obstacles exist to adoption of design-for-test (DFT) strategies. Some designers worry about the effects the inclusion of test circuitry will have on performance, but there are many ways around this, even in complex application-specific integrated circuit (ASIC) designs; many ASIC vendors now offer zero-delay scan latches, which have no time impact on functional circuits. DFT strategies let a company's manufacturing department test designs, but they also offer the ability to use test circuits to set internal states and conditions if the test strategy supports control of internal voltage levels. Behavior can be analyzed by defining a specific internal condition, which facilitates prototype or device debug. Several DFT techniques are described, and test-logic insertion tools and test-pattern generators from various vendors are examined., Despite the dangers of ignoring testability, subtle costs can make designing an ASIC for test prohibitively expensive. Testability tools provide construction techniques that lower the cost of designing for test. [...]

Synchronous digital circuit design requires effective clock management in high-speed devices, which in turn requires knowledge and use of the right parts for clock generation, knowledge of high-speed layout methods, and the ability to simulate, analyze and test clock paths. Attention must be paid to feedback techniques, transmission-line characteristics, and other details once thought to be the exclusive domain of analog circuit design. Multiple copies of a clock signal must be generated that have fixed relationships to one another, and the clock copies must be distributed to various points within a board or a complete system without interfering with the relationships. Specialized clock drivers produce copies of clock signals with maximum skew of 0.5 to 1 nanosecond for TTL- and CMOS-compatible outputs; careful use of delay lines can be used in distribution to adjust clock signal characteristics as they travel through the system., You'll need a variety of practical skills and tools to tackle high-speed timing problems--even the best timing device presents no magical solution. Without effective clock management, the benefits of a [...]

Megahertz-range data transmission and communications requires wideband linear circuitry. By designing around a monolithic high-speed amplifier, you can easily implement a variety of standard high-performance communications circuits. The following circuits [...]

Once you acquire some familiarity with high-speed amplifiers and a respect for their design requirements, you can use these devices' speed to design a variety of application circuits. These circuits [...]

Measuring a high-speed linear circuit is a classic problem in observability. The problem is twofold: Stimulating and prbing the circuit without disturbing its behavior and ensuring that the waveforms on [...]

Computer simulations can save you valuable time by letting you work out the major bugs in a circuit design before building it in hardware. Unfortunately, if the device models you [...]