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This paper proposes a telemetering method that transmits the real-time data together with the time-delayed data and that merges both data after flight test. The method can minimize the error data which occur in the communication environment affected by the multipath fading and transmit antenna pattern when telemetry data are received during the flight test. This method was applied to the design of the telemetry unit and the development of data merging program. By merging the resulting data of flight test and analyzing synchronization errors, its efficiency for the telemetry link is verified.

It is rather difficult to improve flight control computer(FLCC) hardware(H/W) development schedule due to lack of commercial off-the-self(COTS) tools or target specific tools. Thus, it is suggested to develop an enhanced process utilizing modeling, simulation and virtual reality tools. This paper presents H/W design process enhancement tool(PET) for FLCC design requirements such as FLCC input/output(I/O) signal flow, I/O fault detection, failure management algorithm, circuit logic, PCB assembly configuration and installation utilizing simulation and visualization in virtual space. New tool will provide simulation capability of various FLCC design configuration including shop replaceable unit(SRU) level assembly/dis-assembly utilizing open flight format 3-D modeling data