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1. Implementation of Arithmetic Logic Unit Using Area-Efficient Adder

Author

Zade, Abhishek, Singha, Sumit Kumar, Talukdar, Jagritee, Prathima, Addanki, Mummaneni, Kavicharan, Bansal, Jagdish Chand, Series Editor, Deep, Kusum, Series Editor, Nagar, Atulya K., Series Editor, Das, Kedar Nath, editor, Das, Debasish, editor, Ray, Anjan Kumar, editor, and Suganthan, Ponnuthurai Nagaratnam, editor

Published
2022
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