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We demonstrate refinement-based formal development of the hybrid, ‘fixed virtual block’ approach to train movement control for the emerging European Rail Traffic Management System (ERTMS) level 3. Our approach uses iUML-B diagrams as a front end to the Event-B modelling language. We use abstraction to verify the principle of movement authority before gradually developing the details of the Virtual Block Detector component in subsequent refinements, thus verifying that it preserves the safety properties. We animate the refined models to demonstrate their validity using the scenarios from the Hybrid ERTMS Level 3 (HLIII) specification. We reflect on our team-based approach to finding useful modelling abstractions and demonstrate a systematic modelling method based on the state and class diagrams of iUML-B. The component and control flow architectures of the application, its environment and interacting systems emerge through the layered refinement process. The runtime semantics of the specification’s state-machine behaviour are modelled in the final refinements. We discuss how the model could be used to generate an implementation using code generation tools and techniques.

UML-B is a development process framework for Event-B based on a "UML-like" graphical formal notation that provides support for object-oriented modelling concepts, in particular, for class and state machine diagrams. However, this methodology has a gap for mapping requirements to formal specifications. To overcome this issue, we present a proposal for extending UML-B to support a conceptual model to provide an easier starting point for the actual development process. More precisely, we propose two diagrams to facilitate the passing from requirements to the initial formal model: a first one to represent system behavior based on UML 2 interaction overview diagram (IOD) and a second one for system structure based on boundary-control-entity stereotyped class diagram (BCE). We show how to translate the former into an Event-B specification and explain how to link the latter to the original UML-B using a simple ATM example as proof of concept.

The approach proposed in this paper introduces a hardware/software co-design framework for developing complex embedded systems. The method relies on formal proof of system properties at every phase of the co-design cycle. The key concept is the combined use of UML and the B language for system modeling and design, and the seamless transition from UML specifications to system descriptions in B. The final system prototype emerges from correct-by-construction subsystems described in the B language; the hardware components are translated in VHDL/SystemC, while for the software components C/C++ is used. The outcome is a formally proven correct system implementation. The efficiency of the proposed method is exhibited through the design of a case study from the telecommunication domain.